bddisasm/cr8_32.asm at e3855b464fdda3eaf863c066d3837f3d7da68497 - bddisasm - Gitea: Git with a cup of tea

arno/bddisasm

mirror of https://github.com/bitdefender/bddisasm.git synced 2024-11-17 21:18:27 +00:00

$BITDEFENDER\vlutas$ BITDEFENDER\vlutas 9ba1e6a2f9 Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.

Multiple minor fixes to existing instructions.
Moved x86 decoding tests in a separate directory & improved the test script.

2022-10-04 12:22:59 +03:00

8 lines

180 B

NASM

Raw Blame History

     bits 32
     ; These should operate on CR8, as per AMD hack to make CR8 accessible outside long mode.
     db 0xF0
     mov     eax, cr0
     db 0xF0
     mov     cr0, eax