arno/bddisasm
1
0
Fork 0
mirror of https://github.com/bitdefender/bddisasm.git synced 2024-11-17 21:18:27 +00:00
Code Issues Releases Wiki Activity
e3855b464f
bddisasm/bddisasm_test/x86/avx/avxvnni_64.result
BITDEFENDER\vlutas 9ba1e6a2f9 Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8. 
Multiple minor fixes to existing instructions.
Moved x86 decoding tests in a separate directory & improved the test script.
2022-10-04 12:22:59 +03:00

153 lines
9.7 KiB
Plaintext
Raw Blame History

0000000000000000 c4e2795023 VPDPBUSD xmm4, xmm0, xmmword ptr [rbx]
DSIZE: 32, ASIZE: 64, VLEN: 128
ISA Set: AVXVNNI, Ins cat: AVXVNNI, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 4
Exception class: SSE/VEX, exception type: 4
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 4, RegCount: 1
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
Segment: 3, Base: 3,
0000000000000005 c4e27d5023 VPDPBUSD ymm4, ymm0, ymmword ptr [rbx]
DSIZE: 32, ASIZE: 64, VLEN: 256
ISA Set: AVXVNNI, Ins cat: AVXVNNI, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 4
Exception class: SSE/VEX, exception type: 4
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 4, RegCount: 1
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
Segment: 3, Base: 3,
000000000000000A c4e2795123 VPDPBUSDS xmm4, xmm0, xmmword ptr [rbx]
DSIZE: 32, ASIZE: 64, VLEN: 128
ISA Set: AVXVNNI, Ins cat: AVXVNNI, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 4
Exception class: SSE/VEX, exception type: 4
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 4, RegCount: 1
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
Segment: 3, Base: 3,
000000000000000F c4e27d5123 VPDPBUSDS ymm4, ymm0, ymmword ptr [rbx]
DSIZE: 32, ASIZE: 64, VLEN: 256
ISA Set: AVXVNNI, Ins cat: AVXVNNI, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 4
Exception class: SSE/VEX, exception type: 4
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 4, RegCount: 1
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
Segment: 3, Base: 3,
0000000000000014 c4e2795223 VPDPWSSD xmm4, xmm0, xmmword ptr [rbx]
DSIZE: 32, ASIZE: 64, VLEN: 128
ISA Set: AVXVNNI, Ins cat: AVXVNNI, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 4
Exception class: SSE/VEX, exception type: 4
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 4, RegCount: 1
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
Segment: 3, Base: 3,
0000000000000019 c4e27d5223 VPDPWSSD ymm4, ymm0, ymmword ptr [rbx]
DSIZE: 32, ASIZE: 64, VLEN: 256
ISA Set: AVXVNNI, Ins cat: AVXVNNI, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 4
Exception class: SSE/VEX, exception type: 4
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 4, RegCount: 1
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
Segment: 3, Base: 3,
000000000000001E c4e2795323 VPDPWSSDS xmm4, xmm0, xmmword ptr [rbx]
DSIZE: 32, ASIZE: 64, VLEN: 128
ISA Set: AVXVNNI, Ins cat: AVXVNNI, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 4
Exception class: SSE/VEX, exception type: 4
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 16, RawSize: 16, Encoding: R, RegType: Vector, RegSize: 16, RegId: 4, RegCount: 1
Operand: 1, Acc: R-, Type: Register, Size: 16, RawSize: 16, Encoding: V, RegType: Vector, RegSize: 16, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Memory, Size: 16, RawSize: 16, Encoding: M,
Segment: 3, Base: 3,
0000000000000023 c4e27d5323 VPDPWSSDS ymm4, ymm0, ymmword ptr [rbx]
DSIZE: 32, ASIZE: 64, VLEN: 256
ISA Set: AVXVNNI, Ins cat: AVXVNNI, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000001, reg: eax, bit: 4
Exception class: SSE/VEX, exception type: 4
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: no, V8086: no, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 32, RawSize: 32, Encoding: R, RegType: Vector, RegSize: 32, RegId: 4, RegCount: 1
Operand: 1, Acc: R-, Type: Register, Size: 32, RawSize: 32, Encoding: V, RegType: Vector, RegSize: 32, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Memory, Size: 32, RawSize: 32, Encoding: M,
Segment: 3, Base: 3,
Reference in New Issue View Git Blame Copy Permalink