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mirror of https://github.com/bitdefender/bddisasm.git synced 2024-11-23 16:08:08 +00:00
bddisasm/bddisasm_test/x86/sm
vlutas c282f06215
Add support for SIMD Exceptions reporting and new x86 ISAs (#108)
* Add support for SIMD exceptions reporting in INSTRUX.
* Add support for new ISAs: MOVRS, MSR_IMM, AMX-FP8, AMX-TRANSPOSE, AMX-TF32, AMX-AVX512, AMX-MOVRS, EVEX-encoded SM4.

Co-authored-by: ianichitei (Rust bindings)
2024-11-07 12:15:29 +02:00
..
sm4_evex_64.result Add support for SIMD Exceptions reporting and new x86 ISAs (#108) 2024-11-07 12:15:29 +02:00
sm4_evex_64.test Add support for SIMD Exceptions reporting and new x86 ISAs (#108) 2024-11-07 12:15:29 +02:00
sm_64.asm Add support for SIMD Exceptions reporting and new x86 ISAs (#108) 2024-11-07 12:15:29 +02:00
sm_64.result Added support for new Intel ISA, per Intel® Architecture Instruction Set Extensions and Future Features document #319433-049 (June 2023): AVX-NNI-INT16, SHA512, SM3, SM4, TSE. 2023-07-21 09:38:49 +03:00
sm_64.test Added support for new Intel ISA, per Intel® Architecture Instruction Set Extensions and Future Features document #319433-049 (June 2023): AVX-NNI-INT16, SHA512, SM3, SM4, TSE. 2023-07-21 09:38:49 +03:00