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c282f06215
bddisasm/bddisasm_test/x86/simd
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vlutas c282f06215
Add support for SIMD Exceptions reporting and new x86 ISAs (#108) 
* Add support for SIMD exceptions reporting in INSTRUX.
* Add support for new ISAs: MOVRS, MSR_IMM, AMX-FP8, AMX-TRANSPOSE, AMX-TF32, AMX-AVX512, AMX-MOVRS, EVEX-encoded SM4.

Co-authored-by: ianichitei (Rust bindings)
2024-11-07 12:15:29 +02:00
..
3dnow_64.asm Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8. 2022-10-04 12:22:59 +03:00
3dnow_64.result Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8. 2022-10-04 12:22:59 +03:00
3dnow_64.test Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8. 2022-10-04 12:22:59 +03:00
mmx_64.asm Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8. 2022-10-04 12:22:59 +03:00
mmx_64.result Add support for SIMD Exceptions reporting and new x86 ISAs (#108) 2024-11-07 12:15:29 +02:00
mmx_64.test Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8. 2022-10-04 12:22:59 +03:00
sse2_64.asm Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8. 2022-10-04 12:22:59 +03:00
sse2_64.result Add support for SIMD Exceptions reporting and new x86 ISAs (#108) 2024-11-07 12:15:29 +02:00
sse2_64.test Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8. 2022-10-04 12:22:59 +03:00
sse3_64.asm Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8. 2022-10-04 12:22:59 +03:00
sse3_64.result Add support for SIMD Exceptions reporting and new x86 ISAs (#108) 2024-11-07 12:15:29 +02:00
sse3_64.test Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8. 2022-10-04 12:22:59 +03:00
sse4_64.asm Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8. 2022-10-04 12:22:59 +03:00
sse4_64.result Add support for SIMD Exceptions reporting and new x86 ISAs (#108) 2024-11-07 12:15:29 +02:00
sse4_64.test Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8. 2022-10-04 12:22:59 +03:00