1
0
mirror of https://github.com/bitdefender/bddisasm.git synced 2024-11-29 02:48:07 +00:00
bddisasm/bddisasm_test/x86/basic/enqcmd_64.result
BITDEFENDER\vlutas 9ba1e6a2f9 Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.
Multiple minor fixes to existing instructions.
Moved x86 decoding tests in a separate directory & improved the test script.
2022-10-04 12:22:59 +03:00

78 lines
4.5 KiB
Plaintext

0000000000000000 660f38f807 MOVDIR64B zmmword ptr [rax], zmmword ptr [rdi]
DSIZE: 32, ASIZE: 64, VLEN: -
ISA Set: MOVDIR64B, Ins cat: MOVDIR64B, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 28
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: -W, Type: Memory, Size: 64, RawSize: 64, Encoding: R,
Segment: 0, Base: 0,
Operand: 1, Acc: R-, Type: Memory, Size: 64, RawSize: 64, Encoding: M,
Segment: 3, Base: 7,
0000000000000005 0f38f900 MOVDIRI dword ptr [rax], eax
DSIZE: 32, ASIZE: 64, VLEN: -
ISA Set: MOVDIRI, Ins cat: MOVDIRI, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 27
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: -W, Type: Memory, Size: 4, RawSize: 4, Encoding: M,
Segment: 3, Base: 0,
Operand: 1, Acc: R-, Type: Register, Size: 4, RawSize: 4, Encoding: R, RegType: General Purpose, RegSize: 4, RegId: 0, RegCount: 1
0000000000000009 f20f38f800 ENQCMD [rax], zmmword ptr [rax]
DSIZE: 32, ASIZE: 64, VLEN: -
ISA Set: ENQCMD, Ins cat: ENQCMD, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 29
FLAGS access
CF: 0, PF: 0, AF: 0, ZF: m, SF: 0, OF: 0,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: -W, Type: Memory, Size: -1, RawSize: -1, Encoding: R,
Segment: 0, Base: 0,
Operand: 1, Acc: R-, Type: Memory, Size: 64, RawSize: 64, Encoding: M,
Segment: 3, Base: 0,
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
000000000000000E f30f38f800 ENQCMDS [rax], zmmword ptr [rax]
DSIZE: 32, ASIZE: 64, VLEN: -
ISA Set: ENQCMD, Ins cat: ENQCMD, CET tracked: no
CPUID leaf: 0x00000007, sub-leaf: 0x00000000, reg: ecx, bit: 29
FLAGS access
CF: 0, PF: 0, AF: 0, ZF: m, SF: 0, OF: 0,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM on: yes, SMM off: yes, SGX on: yes, SGX off: yes, TSX on: yes, TSX off: yes
VMXRoot: yes, VMXNonRoot: yes, VMXRoot SEAM: yes, VMXNonRoot SEAM: yes, VMX off: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: -W, Type: Memory, Size: -1, RawSize: -1, Encoding: R,
Segment: 0, Base: 0,
Operand: 1, Acc: R-, Type: Memory, Size: 64, RawSize: 64, Encoding: M,
Segment: 3, Base: 0,
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1