mirror of
https://github.com/bitdefender/bddisasm.git
synced 2024-11-26 17:38:09 +00:00
227 lines
8.2 KiB
NASM
227 lines
8.2 KiB
NASM
bits 64
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vexp2pd zmm24, zmm31
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vexp2pd zmm24, zmm31, {sae}
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vexp2pd zmm24, [rbx]
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vexp2pd zmm24, [rbx]{1to8}
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vexp2pd zmm24, [rbx+r11*8+256]
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vexp2pd zmm24, [rbx+r11*8-256]
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vexp2pd zmm24{k5}, zmm31
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vexp2pd zmm24{k5}, zmm31, {sae}
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vexp2pd zmm24{k5}, [rbx]
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vexp2pd zmm24{k5}, [rbx]{1to8}
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vexp2pd zmm24{k5}, [rbx+r11*8+256]
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vexp2pd zmm24{k5}, [rbx+r11*8-256]
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vexp2pd zmm24{z}, zmm31
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vexp2pd zmm24{z}, zmm31, {sae}
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vexp2pd zmm24{z}, [rbx]
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vexp2pd zmm24{z}, [rbx]{1to8}
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vexp2pd zmm24{z}, [rbx+r11*8+256]
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vexp2pd zmm24{z}, [rbx+r11*8-256]
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vexp2pd zmm24{k5}{z}, zmm31
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vexp2pd zmm24{k5}{z}, zmm31, {sae}
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vexp2pd zmm24{k5}{z}, [rbx]
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vexp2pd zmm24{k5}{z}, [rbx]{1to8}
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vexp2pd zmm24{k5}{z}, [rbx+r11*8+256]
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vexp2pd zmm24{k5}{z}, [rbx+r11*8-256]
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vexp2ps zmm24, zmm31
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vexp2ps zmm24, zmm31, {sae}
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vexp2ps zmm24, [rbx]
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vexp2ps zmm24, [rbx]{1to16}
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vexp2ps zmm24, [rbx+r11*8+256]
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vexp2ps zmm24, [rbx+r11*8-256]
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vexp2ps zmm24{k5}, zmm31
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vexp2ps zmm24{k5}, zmm31, {sae}
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vexp2ps zmm24{k5}, [rbx]
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vexp2ps zmm24{k5}, [rbx]{1to16}
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vexp2ps zmm24{k5}, [rbx+r11*8+256]
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vexp2ps zmm24{k5}, [rbx+r11*8-256]
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vexp2ps zmm24{z}, zmm31
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vexp2ps zmm24{z}, zmm31, {sae}
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vexp2ps zmm24{z}, [rbx]
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vexp2ps zmm24{z}, [rbx]{1to16}
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vexp2ps zmm24{z}, [rbx+r11*8+256]
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vexp2ps zmm24{z}, [rbx+r11*8-256]
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vexp2ps zmm24{k5}{z}, zmm31
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vexp2ps zmm24{k5}{z}, zmm31, {sae}
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vexp2ps zmm24{k5}{z}, [rbx]
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vexp2ps zmm24{k5}{z}, [rbx]{1to16}
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vexp2ps zmm24{k5}{z}, [rbx+r11*8+256]
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vexp2ps zmm24{k5}{z}, [rbx+r11*8-256]
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vrcp28pd zmm24, zmm31
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vrcp28pd zmm24, zmm31, {sae}
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vrcp28pd zmm24, [rbx]
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vrcp28pd zmm24, [rbx]{1to8}
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vrcp28pd zmm24, [rbx+r11*8+256]
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vrcp28pd zmm24, [rbx+r11*8-256]
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vrcp28pd zmm24{k5}, zmm31
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vrcp28pd zmm24{k5}, zmm31, {sae}
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vrcp28pd zmm24{k5}, [rbx]
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vrcp28pd zmm24{k5}, [rbx]{1to8}
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vrcp28pd zmm24{k5}, [rbx+r11*8+256]
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vrcp28pd zmm24{k5}, [rbx+r11*8-256]
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vrcp28pd zmm24{z}, zmm31
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vrcp28pd zmm24{z}, zmm31, {sae}
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vrcp28pd zmm24{z}, [rbx]
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vrcp28pd zmm24{z}, [rbx]{1to8}
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vrcp28pd zmm24{z}, [rbx+r11*8+256]
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vrcp28pd zmm24{z}, [rbx+r11*8-256]
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vrcp28pd zmm24{k5}{z}, zmm31
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vrcp28pd zmm24{k5}{z}, zmm31, {sae}
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vrcp28pd zmm24{k5}{z}, [rbx]
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vrcp28pd zmm24{k5}{z}, [rbx]{1to8}
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vrcp28pd zmm24{k5}{z}, [rbx+r11*8+256]
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vrcp28pd zmm24{k5}{z}, [rbx+r11*8-256]
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vrcp28ps zmm24, zmm31
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vrcp28ps zmm24, zmm31, {sae}
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vrcp28ps zmm24, [rbx]
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vrcp28ps zmm24, [rbx]{1to16}
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vrcp28ps zmm24, [rbx+r11*8+256]
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vrcp28ps zmm24, [rbx+r11*8-256]
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vrcp28ps zmm24{k5}, zmm31
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vrcp28ps zmm24{k5}, zmm31, {sae}
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vrcp28ps zmm24{k5}, [rbx]
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vrcp28ps zmm24{k5}, [rbx]{1to16}
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vrcp28ps zmm24{k5}, [rbx+r11*8+256]
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vrcp28ps zmm24{k5}, [rbx+r11*8-256]
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vrcp28ps zmm24{z}, zmm31
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vrcp28ps zmm24{z}, zmm31, {sae}
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vrcp28ps zmm24{z}, [rbx]
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vrcp28ps zmm24{z}, [rbx]{1to16}
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vrcp28ps zmm24{z}, [rbx+r11*8+256]
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vrcp28ps zmm24{z}, [rbx+r11*8-256]
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vrcp28ps zmm24{k5}{z}, zmm31
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vrcp28ps zmm24{k5}{z}, zmm31, {sae}
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vrcp28ps zmm24{k5}{z}, [rbx]
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vrcp28ps zmm24{k5}{z}, [rbx]{1to16}
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vrcp28ps zmm24{k5}{z}, [rbx+r11*8+256]
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vrcp28ps zmm24{k5}{z}, [rbx+r11*8-256]
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vrcp28sd xmm2, xmm7, xmm0
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vrcp28sd xmm2, xmm7, xmm0, {sae}
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vrcp28sd xmm2, xmm7, [rbx]
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vrcp28sd xmm2, xmm7, [rbx+r11*8+256]
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vrcp28sd xmm2, xmm7, [rbx+r11*8-256]
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vrcp28sd xmm2{k5}, xmm7, xmm0
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vrcp28sd xmm2{k5}, xmm7, xmm0, {sae}
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vrcp28sd xmm2{k5}, xmm7, [rbx]
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vrcp28sd xmm2{k5}, xmm7, [rbx+r11*8+256]
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vrcp28sd xmm2{k5}, xmm7, [rbx+r11*8-256]
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vrcp28sd xmm2{z}, xmm7, xmm0
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vrcp28sd xmm2{z}, xmm7, xmm0, {sae}
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vrcp28sd xmm2{z}, xmm7, [rbx]
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vrcp28sd xmm2{z}, xmm7, [rbx+r11*8+256]
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vrcp28sd xmm2{z}, xmm7, [rbx+r11*8-256]
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vrcp28sd xmm2{k5}{z}, xmm7, xmm0
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vrcp28sd xmm2{k5}{z}, xmm7, xmm0, {sae}
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vrcp28sd xmm2{k5}{z}, xmm7, [rbx]
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vrcp28sd xmm2{k5}{z}, xmm7, [rbx+r11*8+256]
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vrcp28sd xmm2{k5}{z}, xmm7, [rbx+r11*8-256]
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vrcp28ss xmm2, xmm7, xmm0
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vrcp28ss xmm2, xmm7, xmm0, {sae}
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vrcp28ss xmm2, xmm7, [rbx]
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vrcp28ss xmm2, xmm7, [rbx+r11*8+256]
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vrcp28ss xmm2, xmm7, [rbx+r11*8-256]
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vrcp28ss xmm2{k5}, xmm7, xmm0
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vrcp28ss xmm2{k5}, xmm7, xmm0, {sae}
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vrcp28ss xmm2{k5}, xmm7, [rbx]
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vrcp28ss xmm2{k5}, xmm7, [rbx+r11*8+256]
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vrcp28ss xmm2{k5}, xmm7, [rbx+r11*8-256]
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vrcp28ss xmm2{z}, xmm7, xmm0
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vrcp28ss xmm2{z}, xmm7, xmm0, {sae}
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vrcp28ss xmm2{z}, xmm7, [rbx]
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vrcp28ss xmm2{z}, xmm7, [rbx+r11*8+256]
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vrcp28ss xmm2{z}, xmm7, [rbx+r11*8-256]
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vrcp28ss xmm2{k5}{z}, xmm7, xmm0
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vrcp28ss xmm2{k5}{z}, xmm7, xmm0, {sae}
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vrcp28ss xmm2{k5}{z}, xmm7, [rbx]
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vrcp28ss xmm2{k5}{z}, xmm7, [rbx+r11*8+256]
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vrcp28ss xmm2{k5}{z}, xmm7, [rbx+r11*8-256]
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vrsqrt28pd zmm24, zmm31
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vrsqrt28pd zmm24, zmm31, {sae}
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vrsqrt28pd zmm24, [rbx]
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vrsqrt28pd zmm24, [rbx]{1to8}
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vrsqrt28pd zmm24, [rbx+r11*8+256]
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vrsqrt28pd zmm24, [rbx+r11*8-256]
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vrsqrt28pd zmm24{k5}, zmm31
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vrsqrt28pd zmm24{k5}, zmm31, {sae}
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vrsqrt28pd zmm24{k5}, [rbx]
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vrsqrt28pd zmm24{k5}, [rbx]{1to8}
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vrsqrt28pd zmm24{k5}, [rbx+r11*8+256]
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vrsqrt28pd zmm24{k5}, [rbx+r11*8-256]
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vrsqrt28pd zmm24{z}, zmm31
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vrsqrt28pd zmm24{z}, zmm31, {sae}
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vrsqrt28pd zmm24{z}, [rbx]
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vrsqrt28pd zmm24{z}, [rbx]{1to8}
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vrsqrt28pd zmm24{z}, [rbx+r11*8+256]
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vrsqrt28pd zmm24{z}, [rbx+r11*8-256]
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vrsqrt28pd zmm24{k5}{z}, zmm31
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vrsqrt28pd zmm24{k5}{z}, zmm31, {sae}
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vrsqrt28pd zmm24{k5}{z}, [rbx]
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vrsqrt28pd zmm24{k5}{z}, [rbx]{1to8}
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vrsqrt28pd zmm24{k5}{z}, [rbx+r11*8+256]
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vrsqrt28pd zmm24{k5}{z}, [rbx+r11*8-256]
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vrsqrt28ps zmm24, zmm31
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vrsqrt28ps zmm24, zmm31, {sae}
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vrsqrt28ps zmm24, [rbx]
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vrsqrt28ps zmm24, [rbx]{1to16}
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vrsqrt28ps zmm24, [rbx+r11*8+256]
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vrsqrt28ps zmm24, [rbx+r11*8-256]
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vrsqrt28ps zmm24{k5}, zmm31
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vrsqrt28ps zmm24{k5}, zmm31, {sae}
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vrsqrt28ps zmm24{k5}, [rbx]
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vrsqrt28ps zmm24{k5}, [rbx]{1to16}
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vrsqrt28ps zmm24{k5}, [rbx+r11*8+256]
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vrsqrt28ps zmm24{k5}, [rbx+r11*8-256]
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vrsqrt28ps zmm24{z}, zmm31
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vrsqrt28ps zmm24{z}, zmm31, {sae}
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vrsqrt28ps zmm24{z}, [rbx]
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vrsqrt28ps zmm24{z}, [rbx]{1to16}
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vrsqrt28ps zmm24{z}, [rbx+r11*8+256]
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vrsqrt28ps zmm24{z}, [rbx+r11*8-256]
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vrsqrt28ps zmm24{k5}{z}, zmm31
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vrsqrt28ps zmm24{k5}{z}, zmm31, {sae}
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vrsqrt28ps zmm24{k5}{z}, [rbx]
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vrsqrt28ps zmm24{k5}{z}, [rbx]{1to16}
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vrsqrt28ps zmm24{k5}{z}, [rbx+r11*8+256]
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vrsqrt28ps zmm24{k5}{z}, [rbx+r11*8-256]
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vrsqrt28sd xmm2, xmm7, xmm0
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vrsqrt28sd xmm2, xmm7, xmm0, {sae}
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vrsqrt28sd xmm2, xmm7, [rbx]
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vrsqrt28sd xmm2, xmm7, [rbx+r11*8+256]
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vrsqrt28sd xmm2, xmm7, [rbx+r11*8-256]
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vrsqrt28sd xmm2{k5}, xmm7, xmm0
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vrsqrt28sd xmm2{k5}, xmm7, xmm0, {sae}
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vrsqrt28sd xmm2{k5}, xmm7, [rbx]
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vrsqrt28sd xmm2{k5}, xmm7, [rbx+r11*8+256]
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vrsqrt28sd xmm2{k5}, xmm7, [rbx+r11*8-256]
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vrsqrt28sd xmm2{z}, xmm7, xmm0
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vrsqrt28sd xmm2{z}, xmm7, xmm0, {sae}
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vrsqrt28sd xmm2{z}, xmm7, [rbx]
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vrsqrt28sd xmm2{z}, xmm7, [rbx+r11*8+256]
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vrsqrt28sd xmm2{z}, xmm7, [rbx+r11*8-256]
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vrsqrt28sd xmm2{k5}{z}, xmm7, xmm0
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vrsqrt28sd xmm2{k5}{z}, xmm7, xmm0, {sae}
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vrsqrt28sd xmm2{k5}{z}, xmm7, [rbx]
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vrsqrt28sd xmm2{k5}{z}, xmm7, [rbx+r11*8+256]
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vrsqrt28sd xmm2{k5}{z}, xmm7, [rbx+r11*8-256]
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vrsqrt28ss xmm2, xmm7, xmm0
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vrsqrt28ss xmm2, xmm7, xmm0, {sae}
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vrsqrt28ss xmm2, xmm7, [rbx]
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vrsqrt28ss xmm2, xmm7, [rbx+r11*8+256]
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vrsqrt28ss xmm2, xmm7, [rbx+r11*8-256]
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vrsqrt28ss xmm2{k5}, xmm7, xmm0
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vrsqrt28ss xmm2{k5}, xmm7, xmm0, {sae}
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vrsqrt28ss xmm2{k5}, xmm7, [rbx]
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vrsqrt28ss xmm2{k5}, xmm7, [rbx+r11*8+256]
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vrsqrt28ss xmm2{k5}, xmm7, [rbx+r11*8-256]
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vrsqrt28ss xmm2{z}, xmm7, xmm0
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vrsqrt28ss xmm2{z}, xmm7, xmm0, {sae}
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vrsqrt28ss xmm2{z}, xmm7, [rbx]
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vrsqrt28ss xmm2{z}, xmm7, [rbx+r11*8+256]
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vrsqrt28ss xmm2{z}, xmm7, [rbx+r11*8-256]
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vrsqrt28ss xmm2{k5}{z}, xmm7, xmm0
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vrsqrt28ss xmm2{k5}{z}, xmm7, xmm0, {sae}
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vrsqrt28ss xmm2{k5}{z}, xmm7, [rbx]
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vrsqrt28ss xmm2{k5}{z}, xmm7, [rbx+r11*8+256]
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vrsqrt28ss xmm2{k5}{z}, xmm7, [rbx+r11*8-256]
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