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bddisasm
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bddisasm/bddisasm/include/instructions.h

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//
// This file was auto-generated by generate_tables.py from defs.dat. DO NOT MODIFY!
//
#ifndef _INSTRUCTIONS_H_
#define _INSTRUCTIONS_H_
const ND_INSTRUCTION gInstructions[2554] =
{
// Pos:0 Instruction:"AAA" Encoding:"0x37"/""
{
ND_INS_AAA, ND_CAT_DECIMAL, ND_SET_I86, 0,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_AF,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_GPR_AH, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1 Instruction:"AAD Ib" Encoding:"0xD5 ib"/"I"
{
ND_INS_AAD, ND_CAT_DECIMAL, ND_SET_I86, 1,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_CF|REG_RFLAG_AF|REG_RFLAG_OF,
0|REG_RFLAG_CF|REG_RFLAG_AF|REG_RFLAG_OF,
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_AH, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2 Instruction:"AAM Ib" Encoding:"0xD4 ib"/"I"
{
ND_INS_AAM, ND_CAT_DECIMAL, ND_SET_I86, 2,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_CF|REG_RFLAG_AF|REG_RFLAG_OF,
0|REG_RFLAG_CF|REG_RFLAG_AF|REG_RFLAG_OF,
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_AH, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:3 Instruction:"AAS" Encoding:"0x3F"/""
{
ND_INS_AAS, ND_CAT_DECIMAL, ND_SET_I86, 3,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_AF,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_GPR_AH, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:4 Instruction:"ADC Eb,Gb" Encoding:"0x10 /r"/"MR"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:5 Instruction:"ADC Ev,Gv" Encoding:"0x11 /r"/"MR"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:6 Instruction:"ADC Gb,Eb" Encoding:"0x12 /r"/"RM"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_G, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:7 Instruction:"ADC Gv,Ev" Encoding:"0x13 /r"/"RM"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:8 Instruction:"ADC AL,Ib" Encoding:"0x14 ib"/"I"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:9 Instruction:"ADC rAX,Iz" Encoding:"0x15 iz"/"I"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:10 Instruction:"ADC Eb,Ib" Encoding:"0x80 /2 ib"/"MI"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:11 Instruction:"ADC Ev,Iz" Encoding:"0x81 /2 iz"/"MI"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:12 Instruction:"ADC Ev,Iz" Encoding:"0x82 /2 iz"/"MI"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_I64, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:13 Instruction:"ADC Ev,Ib" Encoding:"0x83 /2 ib"/"MI"
{
ND_INS_ADC, ND_CAT_ARITH, ND_SET_I86, 4,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:14 Instruction:"ADCX Gy,Ey" Encoding:"0x66 0x0F 0x38 0xF6 /r"/"RM"
{
ND_INS_ADCX, ND_CAT_ARITH, ND_SET_ADX, 5,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_ADX,
0,
0|REG_RFLAG_CF,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:15 Instruction:"ADD Eb,Gb" Encoding:"0x00 /r"/"MR"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:16 Instruction:"ADD Ev,Gv" Encoding:"0x01 /r"/"MR"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:17 Instruction:"ADD Gb,Eb" Encoding:"0x02 /r"/"RM"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_G, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:18 Instruction:"ADD Gv,Ev" Encoding:"0x03 /r"/"RM"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:19 Instruction:"ADD AL,Ib" Encoding:"0x04 ib"/"I"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:20 Instruction:"ADD rAX,Iz" Encoding:"0x05 iz"/"I"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:21 Instruction:"ADD Eb,Ib" Encoding:"0x80 /0 ib"/"MI"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:22 Instruction:"ADD Ev,Iz" Encoding:"0x81 /0 iz"/"MI"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:23 Instruction:"ADD Ev,Iz" Encoding:"0x82 /0 iz"/"MI"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_I64, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:24 Instruction:"ADD Ev,Ib" Encoding:"0x83 /0 ib"/"MI"
{
ND_INS_ADD, ND_CAT_ARITH, ND_SET_I86, 6,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:25 Instruction:"ADDPD Vpd,Wpd" Encoding:"0x66 0x0F 0x58 /r"/"RM"
{
ND_INS_ADDPD, ND_CAT_SSE, ND_SET_SSE2, 7,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:26 Instruction:"ADDPS Vps,Wps" Encoding:"NP 0x0F 0x58 /r"/"RM"
{
ND_INS_ADDPS, ND_CAT_SSE, ND_SET_SSE, 8,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:27 Instruction:"ADDSD Vsd,Wsd" Encoding:"0xF2 0x0F 0x58 /r"/"RM"
{
ND_INS_ADDSD, ND_CAT_SSE, ND_SET_SSE2, 9,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:28 Instruction:"ADDSS Vss,Wss" Encoding:"0xF3 0x0F 0x58 /r"/"RM"
{
ND_INS_ADDSS, ND_CAT_SSE, ND_SET_SSE, 10,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:29 Instruction:"ADDSUBPD Vpd,Wpd" Encoding:"0x66 0x0F 0xD0 /r"/"RM"
{
ND_INS_ADDSUBPD, ND_CAT_SSE, ND_SET_SSE3, 11,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:30 Instruction:"ADDSUBPS Vps,Wps" Encoding:"0xF2 0x0F 0xD0 /r"/"RM"
{
ND_INS_ADDSUBPS, ND_CAT_SSE, ND_SET_SSE3, 12,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:31 Instruction:"ADOX Gy,Ey" Encoding:"0xF3 0x0F 0x38 0xF6 /r"/"RM"
{
ND_INS_ADOX, ND_CAT_ARITH, ND_SET_ADX, 13,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_ADX,
0,
0|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:32 Instruction:"AESDEC Vdq,Wdq" Encoding:"0x66 0x0F 0x38 0xDE /r"/"RM"
{
ND_INS_AESDEC, ND_CAT_AES, ND_SET_AES, 14,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AES,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:33 Instruction:"AESDECLAST Vdq,Wdq" Encoding:"0x66 0x0F 0x38 0xDF /r"/"RM"
{
ND_INS_AESDECLAST, ND_CAT_AES, ND_SET_AES, 15,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AES,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:34 Instruction:"AESENC Vdq,Wdq" Encoding:"0x66 0x0F 0x38 0xDC /r"/"RM"
{
ND_INS_AESENC, ND_CAT_AES, ND_SET_AES, 16,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AES,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:35 Instruction:"AESENCLAST Vdq,Wdq" Encoding:"0x66 0x0F 0x38 0xDD /r"/"RM"
{
ND_INS_AESENCLAST, ND_CAT_AES, ND_SET_AES, 17,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AES,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:36 Instruction:"AESIMC Vdq,Wdq" Encoding:"0x66 0x0F 0x38 0xDB /r"/"RM"
{
ND_INS_AESIMC, ND_CAT_AES, ND_SET_AES, 18,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AES,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:37 Instruction:"AESKEYGENASSIST Vdq,Wdq,Ib" Encoding:"0x66 0x0F 0x3A 0xDF /r ib"/"RMI"
{
ND_INS_AESKEYGENASSIST, ND_CAT_AES, ND_SET_AES, 19,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AES,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:38 Instruction:"ALTINST" Encoding:"0x0F 0x3F"/""
{
ND_INS_ALTINST, ND_CAT_SYSTEM, ND_SET_CYRIX, 20,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
},
// Pos:39 Instruction:"AND Eb,Gb" Encoding:"0x20 /r"/"MR"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 21,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:40 Instruction:"AND Ev,Gv" Encoding:"0x21 /r"/"MR"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 21,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:41 Instruction:"AND Gb,Eb" Encoding:"0x22 /r"/"RM"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 21,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_G, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:42 Instruction:"AND Gv,Ev" Encoding:"0x23 /r"/"RM"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 21,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:43 Instruction:"AND AL,Ib" Encoding:"0x24 ib"/"I"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 21,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:44 Instruction:"AND rAX,Iz" Encoding:"0x25 iz"/"I"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 21,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:45 Instruction:"AND Eb,Ib" Encoding:"0x80 /4 ib"/"MI"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 21,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:46 Instruction:"AND Ev,Iz" Encoding:"0x81 /4 iz"/"MI"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 21,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:47 Instruction:"AND Ev,Iz" Encoding:"0x82 /4 iz"/"MI"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 21,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_I64, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:48 Instruction:"AND Ev,Ib" Encoding:"0x83 /4 ib"/"MI"
{
ND_INS_AND, ND_CAT_LOGIC, ND_SET_I86, 21,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:49 Instruction:"ANDN Gy,By,Ey" Encoding:"vex m:2 p:0 l:0 w:x 0xF2 /r"/"RVM"
{
ND_INS_ANDN, ND_CAT_BMI1, ND_SET_BMI1, 22,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 1), 0, ND_EXT_13, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI1,
0,
0|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_PF|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_PF|REG_RFLAG_AF,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_B, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:50 Instruction:"ANDNPD Vpd,Wpd" Encoding:"0x66 0x0F 0x55 /r"/"RM"
{
ND_INS_ANDNPD, ND_CAT_LOGICAL_FP, ND_SET_SSE2, 23,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:51 Instruction:"ANDNPS Vps,Wps" Encoding:"NP 0x0F 0x55 /r"/"RM"
{
ND_INS_ANDNPS, ND_CAT_LOGICAL_FP, ND_SET_SSE, 24,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:52 Instruction:"ANDPD Vpd,Wpd" Encoding:"0x66 0x0F 0x54 /r"/"RM"
{
ND_INS_ANDPD, ND_CAT_LOGICAL_FP, ND_SET_SSE2, 25,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:53 Instruction:"ANDPS Vps,Wps" Encoding:"NP 0x0F 0x54 /r"/"RM"
{
ND_INS_ANDPS, ND_CAT_LOGICAL_FP, ND_SET_SSE, 26,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:54 Instruction:"ARPL Ew,Gw" Encoding:"0x63 /r"/"MR"
{
ND_INS_ARPL, ND_CAT_SYSTEM, ND_SET_I286PROT, 27,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_I64, 0,
0,
0|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_E, ND_OPS_w, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:55 Instruction:"BEXTR Gy,Ey,By" Encoding:"vex m:2 p:0 l:0 w:x 0xF7 /r"/"RMV"
{
ND_INS_BEXTR, ND_CAT_BMI1, ND_SET_BMI1, 28,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 1), 0, ND_EXT_13, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI1,
0,
0|REG_RFLAG_ZF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_B, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:56 Instruction:"BEXTR Gy,Ey,Id" Encoding:"xop m:A 0x10 /r id"/"RMI"
{
ND_INS_BEXTR, ND_CAT_BITBYTE, ND_SET_TBM, 28,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TBM,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:57 Instruction:"BLCFILL By,Ey" Encoding:"xop m:9 0x01 /1"/"VM"
{
ND_INS_BLCFILL, ND_CAT_BITBYTE, ND_SET_TBM, 29,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TBM,
0,
0,
0,
0,
OP(ND_OPT_B, ND_OPS_y, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:58 Instruction:"BLCI By,Ey" Encoding:"xop m:9 0x02 /6"/"VM"
{
ND_INS_BLCI, ND_CAT_BITBYTE, ND_SET_TBM, 30,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TBM,
0,
0,
0,
0,
OP(ND_OPT_B, ND_OPS_y, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:59 Instruction:"BLCIC By,Ey" Encoding:"xop m:9 0x01 /5"/"VM"
{
ND_INS_BLCIC, ND_CAT_BITBYTE, ND_SET_TBM, 31,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TBM,
0,
0,
0,
0,
OP(ND_OPT_B, ND_OPS_y, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:60 Instruction:"BLCMSK By,Ey" Encoding:"xop m:9 0x02 /1"/"VM"
{
ND_INS_BLCMSK, ND_CAT_BITBYTE, ND_SET_TBM, 32,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TBM,
0,
0,
0,
0,
OP(ND_OPT_B, ND_OPS_y, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:61 Instruction:"BLCS By,Ey" Encoding:"xop m:9 0x01 /3"/"VM"
{
ND_INS_BLCS, ND_CAT_BITBYTE, ND_SET_TBM, 33,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TBM,
0,
0,
0,
0,
OP(ND_OPT_B, ND_OPS_y, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:62 Instruction:"BLENDPD Vx,Wx,Ib" Encoding:"0x66 0x0F 0x3A 0x0D /r ib"/"RMI"
{
ND_INS_BLENDPD, ND_CAT_SSE, ND_SET_SSE4, 34,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:63 Instruction:"BLENDPS Vx,Wx,Ib" Encoding:"0x66 0x0F 0x3A 0x0C /r ib"/"RMI"
{
ND_INS_BLENDPS, ND_CAT_SSE, ND_SET_SSE4, 35,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:64 Instruction:"BLENDVPD Vdq,Wdq" Encoding:"0x66 0x0F 0x38 0x15 /r"/"RM"
{
ND_INS_BLENDVPD, ND_CAT_SSE, ND_SET_SSE4, 36,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_SSE_XMM0, ND_OPS_dq, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:65 Instruction:"BLENDVPS Vdq,Wdq" Encoding:"0x66 0x0F 0x38 0x14 /r"/"RM"
{
ND_INS_BLENDVPS, ND_CAT_SSE, ND_SET_SSE4, 37,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_SSE_XMM0, ND_OPS_dq, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:66 Instruction:"BLSFILL By,Ey" Encoding:"xop m:9 0x01 /2"/"VM"
{
ND_INS_BLSFILL, ND_CAT_BITBYTE, ND_SET_TBM, 38,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TBM,
0,
0,
0,
0,
OP(ND_OPT_B, ND_OPS_y, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:67 Instruction:"BLSI By,Ey" Encoding:"vex m:2 p:0 l:0 w:x 0xF3 /3"/"VM"
{
ND_INS_BLSI, ND_CAT_BMI1, ND_SET_BMI1, 39,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_13, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI1,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_PF|REG_RFLAG_AF,
0|REG_RFLAG_OF|REG_RFLAG_PF|REG_RFLAG_AF,
OP(ND_OPT_B, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:68 Instruction:"BLSIC By,Ey" Encoding:"xop m:9 0x01 /6"/"VM"
{
ND_INS_BLSIC, ND_CAT_BITBYTE, ND_SET_TBM, 40,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TBM,
0,
0,
0,
0,
OP(ND_OPT_B, ND_OPS_y, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:69 Instruction:"BLSMSK By,Ey" Encoding:"vex m:2 p:0 l:0 w:x 0xF3 /2"/"VM"
{
ND_INS_BLSMSK, ND_CAT_BMI1, ND_SET_BMI1, 41,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_13, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI1,
0,
0|REG_RFLAG_CF|REG_RFLAG_SF,
0|REG_RFLAG_PF|REG_RFLAG_AF,
0|REG_RFLAG_ZF|REG_RFLAG_OF|REG_RFLAG_PF|REG_RFLAG_AF,
OP(ND_OPT_B, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:70 Instruction:"BLSR By,Ey" Encoding:"vex m:2 p:0 l:0 w:x 0xF3 /1"/"VM"
{
ND_INS_BLSR, ND_CAT_BMI1, ND_SET_BMI1, 42,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_13, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI1,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_PF|REG_RFLAG_AF,
0|REG_RFLAG_OF|REG_RFLAG_PF|REG_RFLAG_AF,
OP(ND_OPT_B, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:71 Instruction:"BNDCL rBl,Ey" Encoding:"0xF3 0x0F 0x1A /r"/"RM"
{
ND_INS_BNDCL, ND_CAT_MPX, ND_SET_MPX, 43,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_AG|ND_FLAG_F64|ND_FLAG_MODRM, ND_CFF_MPX,
0,
0,
0,
0,
OP(ND_OPT_rB, ND_OPS_l, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:72 Instruction:"BNDCN rBl,Ey" Encoding:"0xF2 0x0F 0x1B /r"/"RM"
{
ND_INS_BNDCN, ND_CAT_MPX, ND_SET_MPX, 44,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_AG|ND_FLAG_F64|ND_FLAG_MODRM, ND_CFF_MPX,
0,
0,
0,
0,
OP(ND_OPT_rB, ND_OPS_l, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:73 Instruction:"BNDCU rBl,Ey" Encoding:"0xF2 0x0F 0x1A /r"/"RM"
{
ND_INS_BNDCU, ND_CAT_MPX, ND_SET_MPX, 45,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_AG|ND_FLAG_F64|ND_FLAG_MODRM, ND_CFF_MPX,
0,
0,
0,
0,
OP(ND_OPT_rB, ND_OPS_l, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:74 Instruction:"BNDLDX rBl,Mmib" Encoding:"0x0F 0x1A /r:mem mib"/"RM"
{
ND_INS_BNDLDX, ND_CAT_MPX, ND_SET_MPX, 46,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_AG|ND_FLAG_NOA16|ND_FLAG_NO_RIP_REL|ND_FLAG_MODRM|ND_FLAG_MIB, ND_CFF_MPX,
0,
0,
0,
0,
OP(ND_OPT_rB, ND_OPS_l, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_mib, ND_OPF_R, 0, 0),
},
// Pos:75 Instruction:"BNDMK rBl,My" Encoding:"0xF3 0x0F 0x1B /r:mem"/"RM"
{
ND_INS_BNDMK, ND_CAT_MPX, ND_SET_MPX, 47,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_NOA16|ND_FLAG_NO_RIP_REL|ND_FLAG_MODRM, ND_CFF_MPX,
0,
0,
0,
0,
OP(ND_OPT_rB, ND_OPS_l, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:76 Instruction:"BNDMOV rBl,mBl" Encoding:"0x66 0x0F 0x1A /r"/"RM"
{
ND_INS_BNDMOV, ND_CAT_MPX, ND_SET_MPX, 48,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_NOA16|ND_FLAG_MODRM, ND_CFF_MPX,
0,
0,
0,
0,
OP(ND_OPT_rB, ND_OPS_l, ND_OPF_W, 0, 0),
OP(ND_OPT_mB, ND_OPS_l, ND_OPF_R, 0, 0),
},
// Pos:77 Instruction:"BNDMOV mBl,rBl" Encoding:"0x66 0x0F 0x1B /r"/"MR"
{
ND_INS_BNDMOV, ND_CAT_MPX, ND_SET_MPX, 48,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_NOA16|ND_FLAG_MODRM, ND_CFF_MPX,
0,
0,
0,
0,
OP(ND_OPT_mB, ND_OPS_l, ND_OPF_W, 0, 0),
OP(ND_OPT_rB, ND_OPS_l, ND_OPF_R, 0, 0),
},
// Pos:78 Instruction:"BNDSTX Mmib,rBl" Encoding:"0x0F 0x1B /r:mem mib"/"MR"
{
ND_INS_BNDSTX, ND_CAT_MPX, ND_SET_MPX, 49,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_AG|ND_FLAG_NOA16|ND_FLAG_NO_RIP_REL|ND_FLAG_MODRM|ND_FLAG_MIB, ND_CFF_MPX,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_mib, ND_OPF_W, 0, 0),
OP(ND_OPT_rB, ND_OPS_l, ND_OPF_R, 0, 0),
},
// Pos:79 Instruction:"BOUND Gv,Ma" Encoding:"0x62 /r:mem"/"RM"
{
ND_INS_BOUND, ND_CAT_INTERRUPT, ND_SET_I186, 50,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_I64, 0,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_a, ND_OPF_R, 0, 0),
},
// Pos:80 Instruction:"BSF Gv,Ev" Encoding:"0x0F 0xBC /r"/"RM"
{
ND_INS_BSF, ND_CAT_I386, ND_SET_I386, 51,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_ZF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:81 Instruction:"BSR Gv,Ev" Encoding:"0x0F 0xBD /r"/"RM"
{
ND_INS_BSR, ND_CAT_BITBYTE, ND_SET_I386, 52,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_ZF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:82 Instruction:"BSWAP Zv" Encoding:"0x0F 0xC8"/"O"
{
ND_INS_BSWAP, ND_CAT_DATAXFER, ND_SET_I486REAL, 53,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
},
// Pos:83 Instruction:"BSWAP Zv" Encoding:"0x0F 0xC9"/"O"
{
ND_INS_BSWAP, ND_CAT_DATAXFER, ND_SET_I486REAL, 53,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
},
// Pos:84 Instruction:"BSWAP Zv" Encoding:"0x0F 0xCA"/"O"
{
ND_INS_BSWAP, ND_CAT_DATAXFER, ND_SET_I486REAL, 53,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
},
// Pos:85 Instruction:"BSWAP Zv" Encoding:"0x0F 0xCB"/"O"
{
ND_INS_BSWAP, ND_CAT_DATAXFER, ND_SET_I486REAL, 53,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
},
// Pos:86 Instruction:"BSWAP Zv" Encoding:"0x0F 0xCC"/"O"
{
ND_INS_BSWAP, ND_CAT_DATAXFER, ND_SET_I486REAL, 53,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
},
// Pos:87 Instruction:"BSWAP Zv" Encoding:"0x0F 0xCD"/"O"
{
ND_INS_BSWAP, ND_CAT_DATAXFER, ND_SET_I486REAL, 53,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
},
// Pos:88 Instruction:"BSWAP Zv" Encoding:"0x0F 0xCE"/"O"
{
ND_INS_BSWAP, ND_CAT_DATAXFER, ND_SET_I486REAL, 53,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
},
// Pos:89 Instruction:"BSWAP Zv" Encoding:"0x0F 0xCF"/"O"
{
ND_INS_BSWAP, ND_CAT_DATAXFER, ND_SET_I486REAL, 53,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
},
// Pos:90 Instruction:"BT Ev,Gv" Encoding:"0x0F 0xA3 /r bitbase"/"MR"
{
ND_INS_BT, ND_CAT_BITBYTE, ND_SET_I386, 54,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_BITBASE, 0,
0,
0|REG_RFLAG_CF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:91 Instruction:"BT Ev,Ib" Encoding:"0x0F 0xBA /4 ib"/"MI"
{
ND_INS_BT, ND_CAT_BITBYTE, ND_SET_I386, 54,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:92 Instruction:"BTC Ev,Ib" Encoding:"0x0F 0xBA /7 ib"/"MI"
{
ND_INS_BTC, ND_CAT_BITBYTE, ND_SET_I386, 55,
ND_MOD_ANY,
ND_PREF_LOCK|ND_PREF_HLE, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:93 Instruction:"BTC Ev,Gv" Encoding:"0x0F 0xBB /r bitbase"/"MR"
{
ND_INS_BTC, ND_CAT_I386, ND_SET_I386, 55,
ND_MOD_ANY,
ND_PREF_LOCK|ND_PREF_HLE, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_BITBASE, 0,
0,
0|REG_RFLAG_CF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:94 Instruction:"BTR Ev,Gv" Encoding:"0x0F 0xB3 /r bitbase"/"MR"
{
ND_INS_BTR, ND_CAT_BITBYTE, ND_SET_I386, 56,
ND_MOD_ANY,
ND_PREF_LOCK|ND_PREF_HLE, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_BITBASE, 0,
0,
0|REG_RFLAG_CF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:95 Instruction:"BTR Ev,Ib" Encoding:"0x0F 0xBA /6 ib"/"MI"
{
ND_INS_BTR, ND_CAT_BITBYTE, ND_SET_I386, 56,
ND_MOD_ANY,
ND_PREF_LOCK|ND_PREF_HLE, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:96 Instruction:"BTS Ev,Gv" Encoding:"0x0F 0xAB /r bitbase"/"MR"
{
ND_INS_BTS, ND_CAT_BITBYTE, ND_SET_I386, 57,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_BITBASE, 0,
0,
0|REG_RFLAG_CF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:97 Instruction:"BTS Ev,Ib" Encoding:"0x0F 0xBA /5 ib"/"MI"
{
ND_INS_BTS, ND_CAT_BITBYTE, ND_SET_I386, 57,
ND_MOD_ANY,
ND_PREF_LOCK|ND_PREF_HLE, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:98 Instruction:"BZHI Gy,Ey,By" Encoding:"vex m:2 p:0 l:0 w:x 0xF5 /r"/"RMV"
{
ND_INS_BZHI, ND_CAT_BMI2, ND_SET_BMI2, 58,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 1), 0, ND_EXT_13, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI2,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_PF|REG_RFLAG_AF,
0|REG_RFLAG_OF|REG_RFLAG_PF|REG_RFLAG_AF,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_B, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:99 Instruction:"CALL Jz" Encoding:"0xE8 cz"/"D"
{
ND_INS_CALLNR, ND_CAT_CALL, ND_SET_I86, 59,
ND_MOD_ANY,
ND_PREF_BND, 0, ND_OPS_CNT(1, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_F64, 0,
0,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_MEM_SHSP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:100 Instruction:"CALL Ev" Encoding:"0xFF /2"/"M"
{
ND_INS_CALLNI, ND_CAT_CALL, ND_SET_I86, 59,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_DNT, 0, ND_OPS_CNT(1, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_CETT|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_MEM_SHSP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:101 Instruction:"CALLF Ap" Encoding:"0x9A cp"/"D"
{
ND_INS_CALLFD, ND_CAT_CALL, ND_SET_I86, 60,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0,
0,
0,
OP(ND_OPT_A, ND_OPS_p, ND_OPF_R, 0, 0),
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v2, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_MEM_SHSP, ND_OPS_v2, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:102 Instruction:"CALLF Mp" Encoding:"0xFF /3:mem"/"M"
{
ND_INS_CALLFI, ND_CAT_CALL, ND_SET_I86, 60,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_CETT|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_p, ND_OPF_R, 0, 0),
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v2, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_MEM_SHSP, ND_OPS_v2, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:103 Instruction:"CBW" Encoding:"ds16 0x98"/""
{
ND_INS_CBW, ND_CAT_CONVERT, ND_SET_I386, 61,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:104 Instruction:"CDQ" Encoding:"ds32 0x99"/""
{
ND_INS_CDQ, ND_CAT_CONVERT, ND_SET_I386, 62,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:105 Instruction:"CDQE" Encoding:"ds64 0x98"/""
{
ND_INS_CDQE, ND_CAT_CONVERT, ND_SET_I386, 63,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:106 Instruction:"CL1INVMB" Encoding:"0x0F 0x0A"/""
{
ND_INS_CL1INVMB, ND_CAT_SYSTEM, ND_SET_SCC, 64,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
},
// Pos:107 Instruction:"CLAC" Encoding:"NP 0x0F 0x01 /0xCA"/""
{
ND_INS_CLAC, ND_CAT_SMAP, ND_SET_SMAP, 65,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SMAP,
0,
0,
0,
0|REG_RFLAG_AC,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:108 Instruction:"CLC" Encoding:"0xF8"/""
{
ND_INS_CLC, ND_CAT_FLAGOP, ND_SET_I86, 66,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0|REG_RFLAG_CF,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:109 Instruction:"CLD" Encoding:"0xFC"/""
{
ND_INS_CLD, ND_CAT_FLAGOP, ND_SET_I86, 67,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0|REG_RFLAG_DF,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:110 Instruction:"CLDEMOTE Mcl" Encoding:"NP 0x0F 0x1C /0:mem"/"M"
{
ND_INS_CLDEMOTE, ND_CAT_CLDEMOTE, ND_SET_CLDEMOTE, 68,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CLDEMOTE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_cl, ND_OPF_W, 0, 0),
},
// Pos:111 Instruction:"CLEVICT0 M?" Encoding:"vex m:1 p:3 0xAE /7:mem"/"M"
{
ND_INS_CLEVICT0, ND_CAT_UNKNOWN, ND_SET_UNKNOWN, 69,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_unknown, ND_OPF_N, 0, 0),
},
// Pos:112 Instruction:"CLEVICT1 M?" Encoding:"vex m:1 p:2 0xAE /7:mem"/"M"
{
ND_INS_CLEVICT1, ND_CAT_UNKNOWN, ND_SET_UNKNOWN, 70,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_unknown, ND_OPF_N, 0, 0),
},
// Pos:113 Instruction:"CLFLUSH Mcl" Encoding:"NP 0x0F 0xAE /7:mem"/"M"
{
ND_INS_CLFLUSH, ND_CAT_MISC, ND_SET_CLFSH, 71,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CLFSH,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_cl, ND_OPF_R, 0, 0),
},
// Pos:114 Instruction:"CLFLUSHOPT Mcl" Encoding:"0x66 0x0F 0xAE /7:mem"/"M"
{
ND_INS_CLFLUSHOPT, ND_CAT_MISC, ND_SET_CLFSHOPT, 72,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CLFSHOPT,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_cl, ND_OPF_R, 0, 0),
},
// Pos:115 Instruction:"CLGI" Encoding:"0x0F 0x01 /0xDD"/""
{
ND_INS_CLGI, ND_CAT_SYSTEM, ND_SET_SVM, 73,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_LONG|ND_MOD_VMXR,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SVM,
0,
0,
0,
0,
},
// Pos:116 Instruction:"CLI" Encoding:"0xFA"/""
{
ND_INS_CLI, ND_CAT_FLAGOP, ND_SET_I86, 74,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0|REG_RFLAG_IF,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:117 Instruction:"CLRSSBSY Mq" Encoding:"0xF3 0x0F 0xAE /6:mem"/"M"
{
ND_INS_CLRSSBSY, ND_CAT_CET, ND_SET_CET, 75,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_SHS|ND_FLAG_MODRM, ND_CFF_CET,
0,
0|REG_RFLAG_CF,
0,
0|REG_RFLAG_ZF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_OF|REG_RFLAG_SF,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_SSP, ND_OPS_yf, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:118 Instruction:"CLTS" Encoding:"0x0F 0x06"/""
{
ND_INS_CLTS, ND_CAT_SYSTEM, ND_SET_I286REAL, 76,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_CR_0, ND_OPS_yf, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:119 Instruction:"CLWB Mcl" Encoding:"0x66 0x0F 0xAE /6:mem"/"M"
{
ND_INS_CLWB, ND_CAT_MISC, ND_SET_CLWB, 77,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CLWB,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_cl, ND_OPF_W, 0, 0),
},
// Pos:120 Instruction:"CLZERO" Encoding:"0x0F 0x01 /0xFC"/""
{
ND_INS_CLZERO, ND_CAT_MISC, ND_SET_CLZERO, 78,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:121 Instruction:"CMC" Encoding:"0xF5"/""
{
ND_INS_CMC, ND_CAT_FLAGOP, ND_SET_I86, 79,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|REG_RFLAG_CF,
0,
0,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:122 Instruction:"CMOVBE Gv,Ev" Encoding:"0x0F 0x46 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 80,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:123 Instruction:"CMOVC Gv,Ev" Encoding:"0x0F 0x42 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 81,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|REG_RFLAG_CF,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:124 Instruction:"CMOVL Gv,Ev" Encoding:"0x0F 0x4C /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 82,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:125 Instruction:"CMOVLE Gv,Ev" Encoding:"0x0F 0x4E /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 83,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|REG_RFLAG_SF|REG_RFLAG_ZF|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:126 Instruction:"CMOVNBE Gv,Ev" Encoding:"0x0F 0x47 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 84,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:127 Instruction:"CMOVNC Gv,Ev" Encoding:"0x0F 0x43 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 85,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|REG_RFLAG_CF,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:128 Instruction:"CMOVNL Gv,Ev" Encoding:"0x0F 0x4D /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 86,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:129 Instruction:"CMOVNLE Gv,Ev" Encoding:"0x0F 0x4F /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 87,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|REG_RFLAG_SF|REG_RFLAG_ZF|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:130 Instruction:"CMOVNO Gv,Ev" Encoding:"0x0F 0x41 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 88,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:131 Instruction:"CMOVNP Gv,Ev" Encoding:"0x0F 0x4B /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 89,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|REG_RFLAG_PF,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:132 Instruction:"CMOVNS Gv,Ev" Encoding:"0x0F 0x49 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 90,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|REG_RFLAG_SF,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:133 Instruction:"CMOVNZ Gv,Ev" Encoding:"0x0F 0x45 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 91,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:134 Instruction:"CMOVO Gv,Ev" Encoding:"0x0F 0x40 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 92,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:135 Instruction:"CMOVP Gv,Ev" Encoding:"0x0F 0x4A /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 93,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|REG_RFLAG_PF,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:136 Instruction:"CMOVS Gv,Ev" Encoding:"0x0F 0x48 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 94,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|REG_RFLAG_SF,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:137 Instruction:"CMOVZ Gv,Ev" Encoding:"0x0F 0x44 /r"/"RM"
{
ND_INS_CMOVcc, ND_CAT_CMOV, ND_SET_PPRO, 95,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, ND_CFF_CMOV,
0|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:138 Instruction:"CMP Eb,Gb" Encoding:"0x38 /r"/"MR"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 96,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:139 Instruction:"CMP Ev,Gv" Encoding:"0x39 /r"/"MR"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 96,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:140 Instruction:"CMP Gb,Eb" Encoding:"0x3A /r"/"RM"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 96,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_G, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:141 Instruction:"CMP Gv,Ev" Encoding:"0x3B /r"/"RM"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 96,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:142 Instruction:"CMP AL,Ib" Encoding:"0x3C ib"/"I"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 96,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:143 Instruction:"CMP rAX,Iz" Encoding:"0x3D iz"/"I"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 96,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:144 Instruction:"CMP Eb,Ib" Encoding:"0x80 /7 ib"/"MI"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 96,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:145 Instruction:"CMP Ev,Iz" Encoding:"0x81 /7 iz"/"MI"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 96,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:146 Instruction:"CMP Ev,Iz" Encoding:"0x82 /7 iz"/"MI"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 96,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_I64, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:147 Instruction:"CMP Ev,Ib" Encoding:"0x83 /7 ib"/"MI"
{
ND_INS_CMP, ND_CAT_ARITH, ND_SET_I86, 96,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:148 Instruction:"CMPPD Vpd,Wpd,Ib" Encoding:"0x66 0x0F 0xC2 /r ib"/"RMI"
{
ND_INS_CMPPD, ND_CAT_SSE, ND_SET_SSE2, 97,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:149 Instruction:"CMPPS Vps,Wps,Ib" Encoding:"NP 0x0F 0xC2 /r ib"/"RMI"
{
ND_INS_CMPPS, ND_CAT_SSE, ND_SET_SSE, 98,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:150 Instruction:"CMPSB Xb,Yb" Encoding:"0xA6"/""
{
ND_INS_CMPS, ND_CAT_STRINGOP, ND_SET_I86, 99,
ND_MOD_ANY,
ND_PREF_REPC, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_X, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_Y, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:151 Instruction:"CMPSB Xb,Yb" Encoding:"rep 0xA6"/""
{
ND_INS_CMPS, ND_CAT_STRINGOP, ND_SET_I86, 99,
ND_MOD_ANY,
ND_PREF_REPC, 0, ND_OPS_CNT(2, 4), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_ZF|REG_RFLAG_DF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_X, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_Y, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:152 Instruction:"CMPSD Vsd,Wsd,Ib" Encoding:"0xF2 0x0F 0xC2 /r ib"/"RMI"
{
ND_INS_CMPSD, ND_CAT_SSE, ND_SET_SSE2, 100,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:153 Instruction:"CMPSD Xv,Yv" Encoding:"ds32 0xA7"/""
{
ND_INS_CMPS, ND_CAT_STRINGOP, ND_SET_I86, 100,
ND_MOD_ANY,
ND_PREF_REPC, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:154 Instruction:"CMPSD Xv,Yv" Encoding:"rep ds32 0xA7"/""
{
ND_INS_CMPS, ND_CAT_STRINGOP, ND_SET_I86, 100,
ND_MOD_ANY,
ND_PREF_REPC, 0, ND_OPS_CNT(2, 4), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_ZF|REG_RFLAG_DF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:155 Instruction:"CMPSQ Xv,Yv" Encoding:"ds64 0xA7"/""
{
ND_INS_CMPS, ND_CAT_STRINGOP, ND_SET_I86, 101,
ND_MOD_ANY,
ND_PREF_REPC, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:156 Instruction:"CMPSQ Xv,Yv" Encoding:"rep ds64 0xA7"/""
{
ND_INS_CMPS, ND_CAT_STRINGOP, ND_SET_I86, 101,
ND_MOD_ANY,
ND_PREF_REPC, 0, ND_OPS_CNT(2, 4), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_ZF|REG_RFLAG_DF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:157 Instruction:"CMPSS Vss,Wss,Ib" Encoding:"0xF3 0x0F 0xC2 /r ib"/"RMI"
{
ND_INS_CMPSS, ND_CAT_SSE, ND_SET_SSE, 102,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:158 Instruction:"CMPSW Xv,Yv" Encoding:"ds16 0xA7"/""
{
ND_INS_CMPS, ND_CAT_STRINGOP, ND_SET_I86, 103,
ND_MOD_ANY,
ND_PREF_REPC, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:159 Instruction:"CMPSW Xv,Yv" Encoding:"rep ds16 0xA7"/""
{
ND_INS_CMPS, ND_CAT_STRINGOP, ND_SET_I86, 103,
ND_MOD_ANY,
ND_PREF_REPC, 0, ND_OPS_CNT(2, 4), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_ZF|REG_RFLAG_DF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:160 Instruction:"CMPXCHG Eb,Gb" Encoding:"0x0F 0xB0 /r"/"MR"
{
ND_INS_CMPXCHG, ND_CAT_SEMAPHORE, ND_SET_I486REAL, 104,
ND_MOD_ANY,
ND_PREF_LOCK|ND_PREF_HLE, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RCW, 0, 0),
OP(ND_OPT_G, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:161 Instruction:"CMPXCHG Ev,Gv" Encoding:"0x0F 0xB1 /r"/"MR"
{
ND_INS_CMPXCHG, ND_CAT_SEMAPHORE, ND_SET_I486REAL, 104,
ND_MOD_ANY,
ND_PREF_LOCK|ND_PREF_HLE, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RCW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:162 Instruction:"CMPXCHG16B Mdq" Encoding:"rexw 0x0F 0xC7 /1:mem"/"M"
{
ND_INS_CMPXCHG16B, ND_CAT_SEMAPHORE, ND_SET_CMPXCHG16B, 105,
ND_MOD_ANY,
ND_PREF_LOCK|ND_PREF_HLE, 0, ND_OPS_CNT(1, 5), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CX8,
0,
0|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_M, ND_OPS_dq, ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rBX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:163 Instruction:"CMPXCHG8B Mq" Encoding:"0x0F 0xC7 /1:mem"/"M"
{
ND_INS_CMPXCHG8B, ND_CAT_SEMAPHORE, ND_SET_PENTIUMREAL, 106,
ND_MOD_ANY,
ND_PREF_LOCK|ND_PREF_HLE, 0, ND_OPS_CNT(1, 5), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CX8,
0,
0|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rBX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:164 Instruction:"COMISD Vsd,Wsd" Encoding:"0x66 0x0F 0x2F /r"/"RM"
{
ND_INS_COMISD, ND_CAT_SSE2, ND_SET_SSE2, 107,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:165 Instruction:"COMISS Vss,Wss" Encoding:"NP 0x0F 0x2F /r"/"RM"
{
ND_INS_COMISS, ND_CAT_SSE, ND_SET_SSE, 108,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:166 Instruction:"CPUID" Encoding:"0x0F 0xA2"/""
{
ND_INS_CPUID, ND_CAT_MISC, ND_SET_I486REAL, 109,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rBX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_CRW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:167 Instruction:"CPU_READ" Encoding:"0x0F 0x3D"/""
{
ND_INS_CPU_READ, ND_CAT_SYSTEM, ND_SET_CYRIX, 110,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
},
// Pos:168 Instruction:"CPU_WRITE" Encoding:"0x0F 0x3C"/""
{
ND_INS_CPU_WRITE, ND_CAT_SYSTEM, ND_SET_CYRIX, 111,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
},
// Pos:169 Instruction:"CQO" Encoding:"ds64 0x99"/""
{
ND_INS_CQO, ND_CAT_CONVERT, ND_SET_I386, 112,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rDX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:170 Instruction:"CRC32 Gy,Eb" Encoding:"0xF2 0x0F 0x38 0xF0 /r"/"RM"
{
ND_INS_CRC32, ND_CAT_SSE, ND_SET_SSE42, 113,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSE42,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:171 Instruction:"CRC32 Gy,Eb" Encoding:"0x66 0xF2 0x0F 0x38 0xF0 /r"/"RM"
{
ND_INS_CRC32, ND_CAT_SSE, ND_SET_SSE42, 113,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_S66|ND_FLAG_MODRM, ND_CFF_SSE42,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:172 Instruction:"CRC32 Gy,Ev" Encoding:"0xF2 0x0F 0x38 0xF1 /r"/"RM"
{
ND_INS_CRC32, ND_CAT_SSE, ND_SET_SSE42, 113,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSE42,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:173 Instruction:"CRC32 Gy,Ev" Encoding:"0x66 0xF2 0x0F 0x38 0xF1 /r"/"RM"
{
ND_INS_CRC32, ND_CAT_SSE, ND_SET_SSE42, 113,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_S66|ND_FLAG_MODRM, ND_CFF_SSE42,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:174 Instruction:"CVTDQ2PD Vx,Wpd" Encoding:"0xF3 0x0F 0xE6 /r"/"RM"
{
ND_INS_CVTDQ2PD, ND_CAT_CONVERT, ND_SET_SSE2, 114,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:175 Instruction:"CVTDQ2PS Vps,Wdq" Encoding:"NP 0x0F 0x5B /r"/"RM"
{
ND_INS_CVTDQ2PS, ND_CAT_CONVERT, ND_SET_SSE2, 115,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:176 Instruction:"CVTPD2DQ Vx,Wpd" Encoding:"0xF2 0x0F 0xE6 /r"/"RM"
{
ND_INS_CVTPD2DQ, ND_CAT_CONVERT, ND_SET_SSE2, 116,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:177 Instruction:"CVTPD2PI Pq,Wpd" Encoding:"0x66 0x0F 0x2D /r"/"RM"
{
ND_INS_CVTPD2PI, ND_CAT_CONVERT, ND_SET_SSE2, 117,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:178 Instruction:"CVTPD2PS Vps,Wpd" Encoding:"0x66 0x0F 0x5A /r"/"RM"
{
ND_INS_CVTPD2PS, ND_CAT_CONVERT, ND_SET_SSE2, 118,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:179 Instruction:"CVTPI2PD Vpd,Qq" Encoding:"0x66 0x0F 0x2A /r"/"RM"
{
ND_INS_CVTPI2PD, ND_CAT_CONVERT, ND_SET_SSE2, 119,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:180 Instruction:"CVTPI2PS Vq,Qq" Encoding:"NP 0x0F 0x2A /r"/"RM"
{
ND_INS_CVTPI2PS, ND_CAT_CONVERT, ND_SET_SSE, 120,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:181 Instruction:"CVTPS2DQ Vdq,Wps" Encoding:"0x66 0x0F 0x5B /r"/"RM"
{
ND_INS_CVTPS2DQ, ND_CAT_CONVERT, ND_SET_SSE2, 121,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:182 Instruction:"CVTPS2PD Vpd,Wq" Encoding:"NP 0x0F 0x5A /r"/"RM"
{
ND_INS_CVTPS2PD, ND_CAT_CONVERT, ND_SET_SSE2, 122,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:183 Instruction:"CVTPS2PI Pq,Wq" Encoding:"NP 0x0F 0x2D /r"/"RM"
{
ND_INS_CVTPS2PI, ND_CAT_CONVERT, ND_SET_SSE, 123,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:184 Instruction:"CVTSD2SI Gy,Wsd" Encoding:"0xF2 0x0F 0x2D /r"/"RM"
{
ND_INS_CVTSD2SI, ND_CAT_CONVERT, ND_SET_SSE2, 124,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:185 Instruction:"CVTSD2SS Vss,Wsd" Encoding:"0xF2 0x0F 0x5A /r"/"RM"
{
ND_INS_CVTSD2SS, ND_CAT_CONVERT, ND_SET_SSE2, 125,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:186 Instruction:"CVTSI2SD Vsd,Ey" Encoding:"0xF2 0x0F 0x2A /r"/"RM"
{
ND_INS_CVTSI2SD, ND_CAT_CONVERT, ND_SET_SSE2, 126,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:187 Instruction:"CVTSI2SS Vss,Ey" Encoding:"0xF3 0x0F 0x2A /r"/"RM"
{
ND_INS_CVTSI2SS, ND_CAT_CONVERT, ND_SET_SSE, 127,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:188 Instruction:"CVTSS2SD Vsd,Wss" Encoding:"0xF3 0x0F 0x5A /r"/"RM"
{
ND_INS_CVTSS2SD, ND_CAT_CONVERT, ND_SET_SSE2, 128,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:189 Instruction:"CVTSS2SI Gy,Wss" Encoding:"0xF3 0x0F 0x2D /r"/"RM"
{
ND_INS_CVTSS2SI, ND_CAT_CONVERT, ND_SET_SSE, 129,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:190 Instruction:"CVTTPD2DQ Vx,Wpd" Encoding:"0x66 0x0F 0xE6 /r"/"RM"
{
ND_INS_CVTTPD2DQ, ND_CAT_CONVERT, ND_SET_SSE2, 130,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:191 Instruction:"CVTTPD2PI Pq,Wpd" Encoding:"0x66 0x0F 0x2C /r"/"RM"
{
ND_INS_CVTTPD2PI, ND_CAT_CONVERT, ND_SET_SSE2, 131,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:192 Instruction:"CVTTPS2DQ Vdq,Wps" Encoding:"0xF3 0x0F 0x5B /r"/"RM"
{
ND_INS_CVTTPS2DQ, ND_CAT_CONVERT, ND_SET_SSE2, 132,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:193 Instruction:"CVTTPS2PI Pq,Wq" Encoding:"NP 0x0F 0x2C /r"/"RM"
{
ND_INS_CVTTPS2PI, ND_CAT_CONVERT, ND_SET_SSE, 133,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:194 Instruction:"CVTTSD2SI Gy,Wsd" Encoding:"0xF2 0x0F 0x2C /r"/"RM"
{
ND_INS_CVTTSD2SI, ND_CAT_CONVERT, ND_SET_SSE2, 134,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:195 Instruction:"CVTTSS2SI Gy,Wss" Encoding:"0xF3 0x0F 0x2C /r"/"RM"
{
ND_INS_CVTTSS2SI, ND_CAT_CONVERT, ND_SET_SSE, 135,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:196 Instruction:"CWD" Encoding:"ds16 0x99"/""
{
ND_INS_CWD, ND_CAT_CONVERT, ND_SET_I386, 136,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rDX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:197 Instruction:"CWDE" Encoding:"ds32 0x98"/""
{
ND_INS_CWDE, ND_CAT_CONVERT, ND_SET_I386, 137,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:198 Instruction:"DAA" Encoding:"0x27"/""
{
ND_INS_DAA, ND_CAT_DECIMAL, ND_SET_I86, 138,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0|REG_RFLAG_CF|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF,
0|REG_RFLAG_OF,
0|REG_RFLAG_OF,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:199 Instruction:"DAS" Encoding:"0x2F"/""
{
ND_INS_DAS, ND_CAT_DECIMAL, ND_SET_I86, 139,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0|REG_RFLAG_CF|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_OF,
0|REG_RFLAG_OF,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:200 Instruction:"DEC Zv" Encoding:"0x48"/"O"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 140,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:201 Instruction:"DEC Zv" Encoding:"0x49"/"O"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 140,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:202 Instruction:"DEC Zv" Encoding:"0x4A"/"O"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 140,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:203 Instruction:"DEC Zv" Encoding:"0x4B"/"O"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 140,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:204 Instruction:"DEC Zv" Encoding:"0x4C"/"O"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 140,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:205 Instruction:"DEC Zv" Encoding:"0x4D"/"O"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 140,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:206 Instruction:"DEC Zv" Encoding:"0x4E"/"O"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 140,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:207 Instruction:"DEC Zv" Encoding:"0x4F"/"O"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 140,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:208 Instruction:"DEC Eb" Encoding:"0xFE /1"/"M"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 140,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:209 Instruction:"DEC Ev" Encoding:"0xFF /1"/"M"
{
ND_INS_DEC, ND_CAT_ARITH, ND_SET_I86, 140,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:210 Instruction:"DELAY Ry" Encoding:"vex m:1 p:2 0xAE /6:reg"/"M"
{
ND_INS_DELAY, ND_CAT_UNKNOWN, ND_SET_UNKNOWN, 141,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:211 Instruction:"DIV Eb" Encoding:"0xF6 /6"/"M"
{
ND_INS_DIV, ND_CAT_ARITH, ND_SET_I86, 142,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_AH, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:212 Instruction:"DIV Ev" Encoding:"0xF7 /6"/"M"
{
ND_INS_DIV, ND_CAT_ARITH, ND_SET_I86, 142,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:213 Instruction:"DIVPD Vpd,Wpd" Encoding:"0x66 0x0F 0x5E /r"/"RM"
{
ND_INS_DIVPD, ND_CAT_SSE, ND_SET_SSE2, 143,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:214 Instruction:"DIVPS Vps,Wps" Encoding:"NP 0x0F 0x5E /r"/"RM"
{
ND_INS_DIVPS, ND_CAT_SSE, ND_SET_SSE, 144,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:215 Instruction:"DIVSD Vsd,Wsd" Encoding:"0xF2 0x0F 0x5E /r"/"RM"
{
ND_INS_DIVSD, ND_CAT_SSE, ND_SET_SSE2, 145,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:216 Instruction:"DIVSS Vss,Wss" Encoding:"0xF3 0x0F 0x5E /r"/"RM"
{
ND_INS_DIVSS, ND_CAT_SSE, ND_SET_SSE, 146,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:217 Instruction:"DMINT" Encoding:"0x0F 0x39"/""
{
ND_INS_DMINT, ND_CAT_SYSTEM, ND_SET_CYRIX, 147,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
},
// Pos:218 Instruction:"DPPD Vdq,Wdq,Ib" Encoding:"0x66 0x0F 0x3A 0x41 /r ib"/"RMI"
{
ND_INS_DPPD, ND_CAT_SSE, ND_SET_SSE4, 148,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:219 Instruction:"DPPS Vx,Wx,Ib" Encoding:"0x66 0x0F 0x3A 0x40 /r ib"/"RMI"
{
ND_INS_DPPS, ND_CAT_SSE, ND_SET_SSE4, 149,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:220 Instruction:"EMMS" Encoding:"NP 0x0F 0x77"/""
{
ND_INS_EMMS, ND_CAT_MMX, ND_SET_MMX, 150,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, 0, ND_CFF_MMX,
0,
0,
0,
0,
},
// Pos:221 Instruction:"ENCLS" Encoding:"NP 0x0F 0x01 /0xCF"/""
{
ND_INS_ENCLS, ND_CAT_SGX, ND_SET_SGX, 151,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SGX,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rBX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_CRW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_CRW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_CRW, 0, 0),
},
// Pos:222 Instruction:"ENCLU" Encoding:"NP 0x0F 0x01 /0xD7"/""
{
ND_INS_ENCLU, ND_CAT_SGX, ND_SET_SGX, 152,
ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX,
0, 0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SGX,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rBX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_CRW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_CRW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_CRW, 0, 0),
},
// Pos:223 Instruction:"ENCLV" Encoding:"NP 0x0F 0x01 /0xC0"/""
{
ND_INS_ENCLV, ND_CAT_SGX, ND_SET_SGX, 153,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN,
0, 0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SGX,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rBX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_CRW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_CRW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_CRW, 0, 0),
},
// Pos:224 Instruction:"ENDBR32" Encoding:"a0xF3 0x0F 0x1E /0xFB"/""
{
ND_INS_ENDBR, ND_CAT_CET, ND_SET_CET, 154,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CET,
0,
0,
0,
0,
},
// Pos:225 Instruction:"ENDBR64" Encoding:"a0xF3 0x0F 0x1E /0xFA"/""
{
ND_INS_ENDBR, ND_CAT_CET, ND_SET_CET, 155,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CET,
0,
0,
0,
0,
},
// Pos:226 Instruction:"ENQCMD rM?,Moq" Encoding:"0xF2 0x0F 0x38 0xF8 /r:mem"/"M"
{
ND_INS_ENQCMD, ND_CAT_ENQCMD, ND_SET_ENQCMD, 156,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_ENQCMD,
0,
0|REG_RFLAG_ZF,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_rM, ND_OPS_unknown, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_oq, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:227 Instruction:"ENQCMDS rM?,Moq" Encoding:"0xF3 0x0F 0x38 0xF8 /r:mem"/"M"
{
ND_INS_ENQCMDS, ND_CAT_ENQCMD, ND_SET_ENQCMD, 157,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_ENQCMD,
0,
0|REG_RFLAG_ZF,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_rM, ND_OPS_unknown, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_oq, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:228 Instruction:"ENTER Iw,Ib" Encoding:"0xC8 iw ib"/"II"
{
ND_INS_ENTER, ND_CAT_MISC, ND_SET_I186, 158,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_I, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rBP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rSP, ND_OPS_ssz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:229 Instruction:"EXTRACTPS Ed,Vdq,Ib" Encoding:"0x66 0x0F 0x3A 0x17 /r ib"/"MRI"
{
ND_INS_EXTRACTPS, ND_CAT_SSE, ND_SET_SSE4, 159,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:230 Instruction:"EXTRQ Uq,Ib,Ib" Encoding:"0x66 0x0F 0x78 /0 modrmpmp ib ib"/"MII"
{
ND_INS_EXTRQ, ND_CAT_BITBYTE, ND_SET_SSE4A, 160,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4A,
0,
0,
0,
0,
OP(ND_OPT_U, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:231 Instruction:"EXTRQ Vdq,Uq" Encoding:"0x66 0x0F 0x79 /r:reg"/"RM"
{
ND_INS_EXTRQ, ND_CAT_BITBYTE, ND_SET_SSE4A, 160,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4A,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:232 Instruction:"F2XM1" Encoding:"0xD9 /0xF0"/""
{
ND_INS_F2XM1, ND_CAT_X87_ALU, ND_SET_X87, 161,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:233 Instruction:"FABS" Encoding:"0xD9 /0xE1"/""
{
ND_INS_FABS, ND_CAT_X87_ALU, ND_SET_X87, 162,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xf3, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:234 Instruction:"FADD ST(0),Mfd" Encoding:"0xD8 /0:mem"/"M"
{
ND_INS_FADD, ND_CAT_X87_ALU, ND_SET_X87, 163,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_fd, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:235 Instruction:"FADD ST(0),ST(i)" Encoding:"0xD8 /0:reg"/"M"
{
ND_INS_FADD, ND_CAT_X87_ALU, ND_SET_X87, 163,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:236 Instruction:"FADD ST(0),Mfq" Encoding:"0xDC /0:mem"/"M"
{
ND_INS_FADD, ND_CAT_X87_ALU, ND_SET_X87, 163,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_fq, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:237 Instruction:"FADD ST(i),ST(0)" Encoding:"0xDC /0:reg"/"M"
{
ND_INS_FADD, ND_CAT_X87_ALU, ND_SET_X87, 163,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:238 Instruction:"FADDP ST(i),ST(0)" Encoding:"0xDE /0:reg"/"M"
{
ND_INS_FADDP, ND_CAT_X87_ALU, ND_SET_X87, 164,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:239 Instruction:"FBLD ST(0),Mfa" Encoding:"0xDF /4:mem"/"M"
{
ND_INS_FBLD, ND_CAT_X87_ALU, ND_SET_X87, 165,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_fa, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:240 Instruction:"FBSTP Mfa,ST(0)" Encoding:"0xDF /6:mem"/"M"
{
ND_INS_FBSTP, ND_CAT_X87_ALU, ND_SET_X87, 166,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_fa, ND_OPF_W, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:241 Instruction:"FCHS" Encoding:"0xD9 /0xE0"/""
{
ND_INS_FCHS, ND_CAT_X87_ALU, ND_SET_X87, 167,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xf3, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:242 Instruction:"FCMOVB ST(0),ST(i)" Encoding:"0xDA /0:reg"/"M"
{
ND_INS_FCMOVB, ND_CAT_X87_ALU, ND_SET_X87, 168,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_CW, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:243 Instruction:"FCMOVBE ST(0),ST(i)" Encoding:"0xDA /2:reg"/"M"
{
ND_INS_FCMOVBE, ND_CAT_X87_ALU, ND_SET_X87, 169,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_CW, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:244 Instruction:"FCMOVE ST(0),ST(i)" Encoding:"0xDA /1:reg"/"M"
{
ND_INS_FCMOVE, ND_CAT_X87_ALU, ND_SET_X87, 170,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_CW, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:245 Instruction:"FCMOVNB ST(0),ST(i)" Encoding:"0xDB /0:reg"/"M"
{
ND_INS_FCMOVNB, ND_CAT_X87_ALU, ND_SET_X87, 171,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_CW, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:246 Instruction:"FCMOVNBE ST(0),ST(i)" Encoding:"0xDB /2:reg"/"M"
{
ND_INS_FCMOVNBE, ND_CAT_X87_ALU, ND_SET_X87, 172,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_CW, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:247 Instruction:"FCMOVNE ST(0),ST(i)" Encoding:"0xDB /1:reg"/"M"
{
ND_INS_FCMOVNE, ND_CAT_X87_ALU, ND_SET_X87, 173,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_CW, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:248 Instruction:"FCMOVNU ST(0),ST(i)" Encoding:"0xDB /3:reg"/"M"
{
ND_INS_FCMOVNU, ND_CAT_X87_ALU, ND_SET_X87, 174,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_PF,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_CW, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:249 Instruction:"FCMOVU ST(0),ST(i)" Encoding:"0xDA /3:reg"/"M"
{
ND_INS_FCMOVU, ND_CAT_X87_ALU, ND_SET_X87, 175,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_PF,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_CW, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:250 Instruction:"FCOM ST(0),Mfd" Encoding:"0xD8 /2:mem"/"M"
{
ND_INS_FCOM, ND_CAT_X87_ALU, ND_SET_X87, 176,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xa2, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_fd, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:251 Instruction:"FCOM ST(0),ST(i)" Encoding:"0xD8 /2:reg"/"M"
{
ND_INS_FCOM, ND_CAT_X87_ALU, ND_SET_X87, 176,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xa2, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:252 Instruction:"FCOM ST(0),Mfq" Encoding:"0xDC /2:mem"/"M"
{
ND_INS_FCOM, ND_CAT_X87_ALU, ND_SET_X87, 176,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xa2, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_fq, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:253 Instruction:"FCOM ST(i),ST(0)" Encoding:"0xDC /2:reg"/"M"
{
ND_INS_FCOM, ND_CAT_X87_ALU, ND_SET_X87, 176,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xa2, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:254 Instruction:"FCOMI ST(0),ST(i)" Encoding:"0xDB /6:reg"/"M"
{
ND_INS_FCOMI, ND_CAT_X87_ALU, ND_SET_X87, 177,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0xa2, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_OF,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:255 Instruction:"FCOMIP ST(0),ST(i)" Encoding:"0xDF /6:reg"/"M"
{
ND_INS_FCOMIP, ND_CAT_X87_ALU, ND_SET_X87, 178,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0xa2, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_OF,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:256 Instruction:"FCOMP ST(0),Mfd" Encoding:"0xD8 /3:mem"/"M"
{
ND_INS_FCOMP, ND_CAT_X87_ALU, ND_SET_X87, 179,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xa2, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_fd, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:257 Instruction:"FCOMP ST(0),ST(i)" Encoding:"0xD8 /3:reg"/"M"
{
ND_INS_FCOMP, ND_CAT_X87_ALU, ND_SET_X87, 179,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xa2, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:258 Instruction:"FCOMP ST(0),Mfq" Encoding:"0xDC /3:mem"/"M"
{
ND_INS_FCOMP, ND_CAT_X87_ALU, ND_SET_X87, 179,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xa2, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_fq, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:259 Instruction:"FCOMP ST(i),ST(0)" Encoding:"0xDC /3:reg"/"M"
{
ND_INS_FCOMP, ND_CAT_X87_ALU, ND_SET_X87, 179,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xa2, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:260 Instruction:"FCOMP ST(0),ST(i)" Encoding:"0xDE /2:reg"/"M"
{
ND_INS_FCOMP, ND_CAT_X87_ALU, ND_SET_X87, 179,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xa2, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:261 Instruction:"FCOMPP" Encoding:"0xDE /0xD9"/""
{
ND_INS_FCOMPP, ND_CAT_X87_ALU, ND_SET_X87, 180,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xa2, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:262 Instruction:"FCOS" Encoding:"0xD9 /0xFF"/""
{
ND_INS_FCOS, ND_CAT_X87_ALU, ND_SET_X87, 181,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xeb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:263 Instruction:"FDECSTP" Encoding:"0xD9 /0xF6"/""
{
ND_INS_FDECSTP, ND_CAT_X87_ALU, ND_SET_X87, 182,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xf3, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:264 Instruction:"FDIV ST(0),Mfd" Encoding:"0xD8 /6:mem"/"M"
{
ND_INS_FDIV, ND_CAT_X87_ALU, ND_SET_X87, 183,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_fd, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:265 Instruction:"FDIV ST(0),ST(i)" Encoding:"0xD8 /6:reg"/"M"
{
ND_INS_FDIV, ND_CAT_X87_ALU, ND_SET_X87, 183,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:266 Instruction:"FDIV ST(0),Mfq" Encoding:"0xDC /6:mem"/"M"
{
ND_INS_FDIV, ND_CAT_X87_ALU, ND_SET_X87, 183,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_fq, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:267 Instruction:"FDIV ST(i),ST(0)" Encoding:"0xDC /7:reg"/"M"
{
ND_INS_FDIV, ND_CAT_X87_ALU, ND_SET_X87, 183,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:268 Instruction:"FDIVP ST(i),ST(0)" Encoding:"0xDE /7:reg"/"M"
{
ND_INS_FDIVP, ND_CAT_X87_ALU, ND_SET_X87, 184,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:269 Instruction:"FDIVR ST(0),Mfd" Encoding:"0xD8 /7:mem"/"M"
{
ND_INS_FDIVR, ND_CAT_X87_ALU, ND_SET_X87, 185,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_fd, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:270 Instruction:"FDIVR ST(0),ST(i)" Encoding:"0xD8 /7:reg"/"M"
{
ND_INS_FDIVR, ND_CAT_X87_ALU, ND_SET_X87, 185,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:271 Instruction:"FDIVR ST(0),Mfq" Encoding:"0xDC /7:mem"/"M"
{
ND_INS_FDIVR, ND_CAT_X87_ALU, ND_SET_X87, 185,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_fq, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:272 Instruction:"FDIVR ST(i),ST(0)" Encoding:"0xDC /6:reg"/"M"
{
ND_INS_FDIVR, ND_CAT_X87_ALU, ND_SET_X87, 185,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:273 Instruction:"FDIVRP ST(i),ST(0)" Encoding:"0xDE /6:reg"/"M"
{
ND_INS_FDIVRP, ND_CAT_X87_ALU, ND_SET_X87, 186,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:274 Instruction:"FEMMS" Encoding:"0x0F 0x0E"/""
{
ND_INS_FEMMS, ND_CAT_MMX, ND_SET_3DNOW, 187,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, 0, ND_CFF_3DNOW,
0,
0,
0,
0,
},
// Pos:275 Instruction:"FFREE ST(i)" Encoding:"0xDD /0:reg"/"M"
{
ND_INS_FFREE, ND_CAT_X87_ALU, ND_SET_X87, 188,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0xff, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_TAG, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:276 Instruction:"FFREEP ST(i)" Encoding:"0xDF /0:reg"/"M"
{
ND_INS_FFREEP, ND_CAT_X87_ALU, ND_SET_X87, 189,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0xff, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_TAG, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:277 Instruction:"FIADD ST(0),Md" Encoding:"0xDA /0:mem"/"M"
{
ND_INS_FIADD, ND_CAT_X87_ALU, ND_SET_X87, 190,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:278 Instruction:"FIADD ST(0),Mw" Encoding:"0xDE /0:mem"/"M"
{
ND_INS_FIADD, ND_CAT_X87_ALU, ND_SET_X87, 190,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:279 Instruction:"FICOM ST(0),Md" Encoding:"0xDA /2:mem"/"M"
{
ND_INS_FICOM, ND_CAT_X87_ALU, ND_SET_X87, 191,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xaa, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:280 Instruction:"FICOM ST(0),Mw" Encoding:"0xDE /2:mem"/"M"
{
ND_INS_FICOM, ND_CAT_X87_ALU, ND_SET_X87, 191,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xaa, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:281 Instruction:"FICOMP ST(0),Md" Encoding:"0xDA /3:mem"/"M"
{
ND_INS_FICOMP, ND_CAT_X87_ALU, ND_SET_X87, 192,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xaa, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:282 Instruction:"FICOMP ST(0),Mw" Encoding:"0xDE /3:mem"/"M"
{
ND_INS_FICOMP, ND_CAT_X87_ALU, ND_SET_X87, 192,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xaa, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:283 Instruction:"FIDIV ST(0),Md" Encoding:"0xDA /6:mem"/"M"
{
ND_INS_FIDIV, ND_CAT_X87_ALU, ND_SET_X87, 193,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:284 Instruction:"FIDIV ST(0),Mw" Encoding:"0xDE /6:mem"/"M"
{
ND_INS_FIDIV, ND_CAT_X87_ALU, ND_SET_X87, 193,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:285 Instruction:"FIDIVR ST(0),Md" Encoding:"0xDA /7:mem"/"M"
{
ND_INS_FIDIVR, ND_CAT_X87_ALU, ND_SET_X87, 194,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:286 Instruction:"FIDIVR ST(0),Mw" Encoding:"0xDE /7:mem"/"M"
{
ND_INS_FIDIVR, ND_CAT_X87_ALU, ND_SET_X87, 194,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:287 Instruction:"FILD ST(0),Md" Encoding:"0xDB /0:mem"/"M"
{
ND_INS_FILD, ND_CAT_X87_ALU, ND_SET_X87, 195,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:288 Instruction:"FILD ST(0),Mw" Encoding:"0xDF /0:mem"/"M"
{
ND_INS_FILD, ND_CAT_X87_ALU, ND_SET_X87, 195,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:289 Instruction:"FILD ST(0),Mq" Encoding:"0xDF /5:mem"/"M"
{
ND_INS_FILD, ND_CAT_X87_ALU, ND_SET_X87, 195,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:290 Instruction:"FIMUL ST(0),Md" Encoding:"0xDA /1:mem"/"M"
{
ND_INS_FIMUL, ND_CAT_X87_ALU, ND_SET_X87, 196,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:291 Instruction:"FIMUL ST(0),Mw" Encoding:"0xDE /1:mem"/"M"
{
ND_INS_FIMUL, ND_CAT_X87_ALU, ND_SET_X87, 196,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:292 Instruction:"FINCSTP" Encoding:"0xD9 /0xF7"/""
{
ND_INS_FINCSTP, ND_CAT_X87_ALU, ND_SET_X87, 197,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xf3, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:293 Instruction:"FIST Md,ST(0)" Encoding:"0xDB /2:mem"/"M"
{
ND_INS_FIST, ND_CAT_X87_ALU, ND_SET_X87, 198,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:294 Instruction:"FIST Mw,ST(0)" Encoding:"0xDF /2:mem"/"M"
{
ND_INS_FIST, ND_CAT_X87_ALU, ND_SET_X87, 198,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:295 Instruction:"FISTP Md,ST(0)" Encoding:"0xDB /3:mem"/"M"
{
ND_INS_FISTP, ND_CAT_X87_ALU, ND_SET_X87, 199,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:296 Instruction:"FISTP Mw,ST(0)" Encoding:"0xDF /3:mem"/"M"
{
ND_INS_FISTP, ND_CAT_X87_ALU, ND_SET_X87, 199,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:297 Instruction:"FISTP Mq,ST(0)" Encoding:"0xDF /7:mem"/"M"
{
ND_INS_FISTP, ND_CAT_X87_ALU, ND_SET_X87, 199,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:298 Instruction:"FISTTP Md,ST(0)" Encoding:"0xDB /1:mem"/"M"
{
ND_INS_FISTTP, ND_CAT_X87_ALU, ND_SET_X87, 200,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xf3, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:299 Instruction:"FISTTP Mq,ST(0)" Encoding:"0xDD /1:mem"/"M"
{
ND_INS_FISTTP, ND_CAT_X87_ALU, ND_SET_X87, 200,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xf3, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:300 Instruction:"FISTTP Mw,ST(0)" Encoding:"0xDF /1:mem"/"M"
{
ND_INS_FISTTP, ND_CAT_X87_ALU, ND_SET_X87, 200,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xf3, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:301 Instruction:"FISUB ST(0),Md" Encoding:"0xDA /4:mem"/"M"
{
ND_INS_FISUB, ND_CAT_X87_ALU, ND_SET_X87, 201,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:302 Instruction:"FISUB ST(0),Mw" Encoding:"0xDE /4:mem"/"M"
{
ND_INS_FISUB, ND_CAT_X87_ALU, ND_SET_X87, 201,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:303 Instruction:"FISUBR ST(0),Md" Encoding:"0xDA /5:mem"/"M"
{
ND_INS_FISUBR, ND_CAT_X87_ALU, ND_SET_X87, 202,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:304 Instruction:"FISUBR ST(0),Mw" Encoding:"0xDE /5:mem"/"M"
{
ND_INS_FISUBR, ND_CAT_X87_ALU, ND_SET_X87, 202,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:305 Instruction:"FLD ST(0),Mfd" Encoding:"0xD9 /0:mem"/"M"
{
ND_INS_FLD, ND_CAT_X87_ALU, ND_SET_X87, 203,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_fd, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:306 Instruction:"FLD ST(0),ST(i)" Encoding:"0xD9 /0:reg"/"M"
{
ND_INS_FLD, ND_CAT_X87_ALU, ND_SET_X87, 203,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_W, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:307 Instruction:"FLD ST(0),Mft" Encoding:"0xDB /5:mem"/"M"
{
ND_INS_FLD, ND_CAT_X87_ALU, ND_SET_X87, 203,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:308 Instruction:"FLD ST(0),Mfq" Encoding:"0xDD /0:mem"/"M"
{
ND_INS_FLD, ND_CAT_X87_ALU, ND_SET_X87, 203,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_fq, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:309 Instruction:"FLD1" Encoding:"0xD9 /0xE8"/""
{
ND_INS_FLD1, ND_CAT_X87_ALU, ND_SET_X87, 204,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:310 Instruction:"FLDCW Mw" Encoding:"0xD9 /5:mem"/"M"
{
ND_INS_FLDCW, ND_CAT_X87_ALU, ND_SET_X87, 205,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0xff, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_CONTROL, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:311 Instruction:"FLDENV Mfe" Encoding:"0xD9 /4:mem"/"M"
{
ND_INS_FLDENV, ND_CAT_X87_ALU, ND_SET_X87, 206,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0xaa, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_fe, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:312 Instruction:"FLDL2E" Encoding:"0xD9 /0xEA"/""
{
ND_INS_FLDL2E, ND_CAT_X87_ALU, ND_SET_X87, 207,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:313 Instruction:"FLDL2T" Encoding:"0xD9 /0xE9"/""
{
ND_INS_FLDL2T, ND_CAT_X87_ALU, ND_SET_X87, 208,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:314 Instruction:"FLDLG2" Encoding:"0xD9 /0xEC"/""
{
ND_INS_FLDLG2, ND_CAT_X87_ALU, ND_SET_X87, 209,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:315 Instruction:"FLDLN2" Encoding:"0xD9 /0xED"/""
{
ND_INS_FLDLN2, ND_CAT_X87_ALU, ND_SET_X87, 210,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:316 Instruction:"FLDPI" Encoding:"0xD9 /0xEB"/""
{
ND_INS_FLDPI, ND_CAT_X87_ALU, ND_SET_X87, 211,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:317 Instruction:"FLDZ" Encoding:"0xD9 /0xEE"/""
{
ND_INS_FLDZ, ND_CAT_X87_ALU, ND_SET_X87, 212,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:318 Instruction:"FMUL ST(0),Mfd" Encoding:"0xD8 /1:mem"/"M"
{
ND_INS_FMUL, ND_CAT_X87_ALU, ND_SET_X87, 213,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_fd, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:319 Instruction:"FMUL ST(0),ST(i)" Encoding:"0xD8 /1:reg"/"M"
{
ND_INS_FMUL, ND_CAT_X87_ALU, ND_SET_X87, 213,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:320 Instruction:"FMUL ST(0),Mfq" Encoding:"0xDC /1:mem"/"M"
{
ND_INS_FMUL, ND_CAT_X87_ALU, ND_SET_X87, 213,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_fq, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:321 Instruction:"FMUL ST(i),ST(0)" Encoding:"0xDC /1:reg"/"M"
{
ND_INS_FMUL, ND_CAT_X87_ALU, ND_SET_X87, 213,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:322 Instruction:"FMULP ST(i),ST(0)" Encoding:"0xDE /1:reg"/"M"
{
ND_INS_FMULP, ND_CAT_X87_ALU, ND_SET_X87, 214,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:323 Instruction:"FNCLEX" Encoding:"0xDB /0xE2"/""
{
ND_INS_FNCLEX, ND_CAT_X87_ALU, ND_SET_X87, 215,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xff, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:324 Instruction:"FNDISI" Encoding:"0xDB /0xE1"/""
{
ND_INS_FNDISI, ND_CAT_X87_ALU, ND_SET_X87, 216,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0xff, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
},
// Pos:325 Instruction:"FNINIT" Encoding:"0xDB /0xE3"/""
{
ND_INS_FNINIT, ND_CAT_X87_ALU, ND_SET_X87, 217,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 3), 0, 0, 0, 0x00, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_CONTROL, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_X87_TAG, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:326 Instruction:"FNOP" Encoding:"0xD9 /0xD0"/""
{
ND_INS_FNOP, ND_CAT_X87_ALU, ND_SET_X87, 218,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0xff, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
},
// Pos:327 Instruction:"FNOP" Encoding:"0xDB /0xE0"/""
{
ND_INS_FNOP, ND_CAT_X87_ALU, ND_SET_X87, 218,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0xff, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
},
// Pos:328 Instruction:"FNOP" Encoding:"0xDB /0xE4"/""
{
ND_INS_FNOP, ND_CAT_X87_ALU, ND_SET_X87, 218,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0xff, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
},
// Pos:329 Instruction:"FNSAVE Mfs" Encoding:"0xDD /6:mem"/"M"
{
ND_INS_FNSAVE, ND_CAT_X87_ALU, ND_SET_X87, 219,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 3), 0, 0, 0, 0x00, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_fs, ND_OPF_W, 0, 0),
OP(ND_OPT_X87_CONTROL, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_X87_TAG, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:330 Instruction:"FNSTCW Mw" Encoding:"0xD9 /7:mem"/"M"
{
ND_INS_FNSTCW, ND_CAT_X87_ALU, ND_SET_X87, 220,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0xff, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_X87_CONTROL, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:331 Instruction:"FNSTENV Mfe" Encoding:"0xD9 /6:mem"/"M"
{
ND_INS_FNSTENV, ND_CAT_X87_ALU, ND_SET_X87, 221,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0xff, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_fe, ND_OPF_W, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:332 Instruction:"FNSTSW Mw" Encoding:"0xDD /7:mem"/"M"
{
ND_INS_FNSTSW, ND_CAT_X87_ALU, ND_SET_X87, 222,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0xff, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:333 Instruction:"FNSTSW AX" Encoding:"0xDF /0xE0"/""
{
ND_INS_FNSTSW, ND_CAT_X87_ALU, ND_SET_X87, 222,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0xff, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:334 Instruction:"FPATAN" Encoding:"0xD9 /0xF3"/""
{
ND_INS_FPATAN, ND_CAT_X87_ALU, ND_SET_X87, 223,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:335 Instruction:"FPREM" Encoding:"0xD9 /0xF8"/""
{
ND_INS_FPREM, ND_CAT_X87_ALU, ND_SET_X87, 224,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xaa, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:336 Instruction:"FPREM1" Encoding:"0xD9 /0xF5"/""
{
ND_INS_FPREM1, ND_CAT_X87_ALU, ND_SET_X87, 225,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xaa, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:337 Instruction:"FPTAN" Encoding:"0xD9 /0xF2"/""
{
ND_INS_FPTAN, ND_CAT_X87_ALU, ND_SET_X87, 226,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xeb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:338 Instruction:"FRINEAR" Encoding:"0xDF /0xFC"/""
{
ND_INS_FRINEAR, ND_CAT_X87_ALU, ND_SET_X87, 227,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0xff, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
},
// Pos:339 Instruction:"FRNDINT" Encoding:"0xD9 /0xFC"/""
{
ND_INS_FRNDINT, ND_CAT_X87_ALU, ND_SET_X87, 228,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:340 Instruction:"FRSTOR Mfs" Encoding:"0xDD /4:mem"/"M"
{
ND_INS_FRSTOR, ND_CAT_X87_ALU, ND_SET_X87, 229,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0xaa, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_fs, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_CONTROL, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:341 Instruction:"FSCALE" Encoding:"0xD9 /0xFD"/""
{
ND_INS_FSCALE, ND_CAT_X87_ALU, ND_SET_X87, 230,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:342 Instruction:"FSIN" Encoding:"0xD9 /0xFE"/""
{
ND_INS_FSIN, ND_CAT_X87_ALU, ND_SET_X87, 231,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xeb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:343 Instruction:"FSINCOS" Encoding:"0xD9 /0xFB"/""
{
ND_INS_FSINCOS, ND_CAT_X87_ALU, ND_SET_X87, 232,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xeb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:344 Instruction:"FSQRT" Encoding:"0xD9 /0xFA"/""
{
ND_INS_FSQRT, ND_CAT_X87_ALU, ND_SET_X87, 233,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:345 Instruction:"FST Mfd,ST(0)" Encoding:"0xD9 /2:mem"/"M"
{
ND_INS_FST, ND_CAT_X87_ALU, ND_SET_X87, 234,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_fd, ND_OPF_W, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:346 Instruction:"FST Mfq,ST(0)" Encoding:"0xDD /2:mem"/"M"
{
ND_INS_FST, ND_CAT_X87_ALU, ND_SET_X87, 234,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_fq, ND_OPF_W, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:347 Instruction:"FST ST(0),ST(i)" Encoding:"0xDD /2:reg"/"M"
{
ND_INS_FST, ND_CAT_X87_ALU, ND_SET_X87, 234,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_W, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:348 Instruction:"FSTDW AX" Encoding:"0xDF /0xE1"/""
{
ND_INS_FSTDW, ND_CAT_X87_ALU, ND_SET_X87, 235,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0xff, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_W, 0, 0),
},
// Pos:349 Instruction:"FSTP Mfd,ST(0)" Encoding:"0xD9 /3:mem"/"M"
{
ND_INS_FSTP, ND_CAT_X87_ALU, ND_SET_X87, 236,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_fd, ND_OPF_W, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:350 Instruction:"FSTP Mft,ST(0)" Encoding:"0xDB /7:mem"/"M"
{
ND_INS_FSTP, ND_CAT_X87_ALU, ND_SET_X87, 236,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_ft, ND_OPF_W, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:351 Instruction:"FSTP Mfq,ST(0)" Encoding:"0xDD /3:mem"/"M"
{
ND_INS_FSTP, ND_CAT_X87_ALU, ND_SET_X87, 236,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_fq, ND_OPF_W, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:352 Instruction:"FSTP ST(0),ST(i)" Encoding:"0xDD /3:reg"/"M"
{
ND_INS_FSTP, ND_CAT_X87_ALU, ND_SET_X87, 236,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_W, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:353 Instruction:"FSTP ST(i),ST(0)" Encoding:"0xDF /2:reg"/"M"
{
ND_INS_FSTP, ND_CAT_X87_ALU, ND_SET_X87, 236,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_W, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:354 Instruction:"FSTP ST(i),ST(0)" Encoding:"0xDF /3:reg"/"M"
{
ND_INS_FSTP, ND_CAT_X87_ALU, ND_SET_X87, 236,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_W, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:355 Instruction:"FSTPNCE ST(i),ST(0)" Encoding:"0xD9 /3:reg"/"M"
{
ND_INS_FSTPNCE, ND_CAT_X87_ALU, ND_SET_X87, 237,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xff, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_W, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:356 Instruction:"FSTSG AX" Encoding:"0xDF /0xE2"/""
{
ND_INS_FSTSG, ND_CAT_X87_ALU, ND_SET_X87, 238,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0xff, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_W, 0, 0),
},
// Pos:357 Instruction:"FSUB ST(0),Mfd" Encoding:"0xD8 /4:mem"/"M"
{
ND_INS_FSUB, ND_CAT_X87_ALU, ND_SET_X87, 239,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_fd, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:358 Instruction:"FSUB ST(0),ST(i)" Encoding:"0xD8 /4:reg"/"M"
{
ND_INS_FSUB, ND_CAT_X87_ALU, ND_SET_X87, 239,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:359 Instruction:"FSUB ST(0),Mfq" Encoding:"0xDC /4:mem"/"M"
{
ND_INS_FSUB, ND_CAT_X87_ALU, ND_SET_X87, 239,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_fq, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:360 Instruction:"FSUB ST(i),ST(0)" Encoding:"0xDC /5:reg"/"M"
{
ND_INS_FSUB, ND_CAT_X87_ALU, ND_SET_X87, 239,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:361 Instruction:"FSUBP ST(i),ST(0)" Encoding:"0xDE /5:reg"/"M"
{
ND_INS_FSUBP, ND_CAT_X87_ALU, ND_SET_X87, 240,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:362 Instruction:"FSUBR ST(0),Mfd" Encoding:"0xD8 /5:mem"/"M"
{
ND_INS_FSUBR, ND_CAT_X87_ALU, ND_SET_X87, 241,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_fd, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:363 Instruction:"FSUBR ST(0),ST(i)" Encoding:"0xD8 /5:reg"/"M"
{
ND_INS_FSUBR, ND_CAT_X87_ALU, ND_SET_X87, 241,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:364 Instruction:"FSUBR ST(0),Mfq" Encoding:"0xDC /5:mem"/"M"
{
ND_INS_FSUBR, ND_CAT_X87_ALU, ND_SET_X87, 241,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_fq, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:365 Instruction:"FSUBR ST(i),ST(0)" Encoding:"0xDC /4:reg"/"M"
{
ND_INS_FSUBR, ND_CAT_X87_ALU, ND_SET_X87, 241,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:366 Instruction:"FSUBRP ST(i),ST(0)" Encoding:"0xDE /4:reg"/"M"
{
ND_INS_FSUBRP, ND_CAT_X87_ALU, ND_SET_X87, 242,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:367 Instruction:"FTST" Encoding:"0xD9 /0xE4"/""
{
ND_INS_FTST, ND_CAT_X87_ALU, ND_SET_X87, 243,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xa2, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:368 Instruction:"FUCOM ST(0),ST(i)" Encoding:"0xDD /4:reg"/"M"
{
ND_INS_FUCOM, ND_CAT_X87_ALU, ND_SET_X87, 244,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xaa, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:369 Instruction:"FUCOMI ST(0),ST(i)" Encoding:"0xDB /5:reg"/"M"
{
ND_INS_FUCOMI, ND_CAT_X87_ALU, ND_SET_X87, 245,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0xa2, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_OF,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:370 Instruction:"FUCOMIP ST(0),ST(i)" Encoding:"0xDF /5:reg"/"M"
{
ND_INS_FUCOMIP, ND_CAT_X87_ALU, ND_SET_X87, 246,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0xa2, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_OF,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:371 Instruction:"FUCOMP ST(0),ST(i)" Encoding:"0xDD /5:reg"/"M"
{
ND_INS_FUCOMP, ND_CAT_X87_ALU, ND_SET_X87, 247,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xaa, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:372 Instruction:"FUCOMPP" Encoding:"0xDA /0xE9"/""
{
ND_INS_FUCOMPP, ND_CAT_X87_ALU, ND_SET_X87, 248,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xaa, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:373 Instruction:"FXAM" Encoding:"0xD9 /0xE5"/""
{
ND_INS_FXAM, ND_CAT_X87_ALU, ND_SET_X87, 249,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xaa, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:374 Instruction:"FXCH ST(0),ST(i)" Encoding:"0xD9 /1:reg"/"M"
{
ND_INS_FXCH, ND_CAT_X87_ALU, ND_SET_X87, 250,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xf3, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_RW, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:375 Instruction:"FXCH ST(0),ST(i)" Encoding:"0xDD /1:reg"/"M"
{
ND_INS_FXCH, ND_CAT_X87_ALU, ND_SET_X87, 250,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xf3, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_W, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:376 Instruction:"FXCH ST(0),ST(i)" Encoding:"0xDF /1:reg"/"M"
{
ND_INS_FXCH, ND_CAT_X87_ALU, ND_SET_X87, 250,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0xf3, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_FPU_ST0, ND_OPS_ft, ND_OPF_R, 0, 0),
OP(ND_OPT_FPU_STX, ND_OPS_ft, ND_OPF_W, 0, 0),
OP(ND_OPT_X87_TAG, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:377 Instruction:"FXRSTOR Mrx" Encoding:"NP 0x0F 0xAE /1:mem"/"M"
{
ND_INS_FXRSTOR, ND_CAT_SSE, ND_SET_FXSAVE, 251,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_FXSAVE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_rx, ND_OPF_R, 0, 0),
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:378 Instruction:"FXSAVE Mrx" Encoding:"NP 0x0F 0xAE /0:mem"/"M"
{
ND_INS_FXSAVE, ND_CAT_SSE, ND_SET_FXSAVE, 252,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_FXSAVE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_rx, ND_OPF_W, 0, 0),
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:379 Instruction:"FXTRACT" Encoding:"0xD9 /0xF4"/""
{
ND_INS_FXTRACT, ND_CAT_X87_ALU, ND_SET_X87, 253,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:380 Instruction:"FYL2X" Encoding:"0xD9 /0xF1"/""
{
ND_INS_FYL2X, ND_CAT_X87_ALU, ND_SET_X87, 254,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:381 Instruction:"FYL2XP1" Encoding:"0xD9 /0xF9"/""
{
ND_INS_FYL2XP1, ND_CAT_X87_ALU, ND_SET_X87, 255,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0xfb, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_X87_STATUS, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:382 Instruction:"GETSEC" Encoding:"NP 0x0F 0x37"/""
{
ND_INS_GETSEC, ND_CAT_SYSTEM, ND_SET_SMX, 256,
ND_MOD_R0|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, 0, ND_CFF_SMX,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rBX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:383 Instruction:"GF2P8AFFINEINVQB Vdq,Wdq,Ib" Encoding:"0x66 0x0F 0x3A 0xCF /r ib"/"RMI"
{
ND_INS_GF2P8AFFINEINVQB, ND_CAT_GFNI, ND_SET_GFNI, 257,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_GFNI,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:384 Instruction:"GF2P8AFFINEQB Vdq,Wdq,Ib" Encoding:"0x66 0x0F 0x3A 0xCE /r ib"/"RMI"
{
ND_INS_GF2P8AFFINEQB, ND_CAT_GFNI, ND_SET_GFNI, 258,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_GFNI,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:385 Instruction:"GF2P8MULB Vdq,Wdq" Encoding:"0x66 0x0F 0x38 0xCF /r"/"RM"
{
ND_INS_GF2P8MULB, ND_CAT_GFNI, ND_SET_GFNI, 259,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_GFNI,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:386 Instruction:"HADDPD Vpd,Wpd" Encoding:"0x66 0x0F 0x7C /r"/"RM"
{
ND_INS_HADDPD, ND_CAT_SSE, ND_SET_SSE3, 260,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:387 Instruction:"HADDPS Vps,Wps" Encoding:"0xF2 0x0F 0x7C /r"/"RM"
{
ND_INS_HADDPS, ND_CAT_SSE, ND_SET_SSE3, 261,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:388 Instruction:"HLT" Encoding:"0xF4"/""
{
ND_INS_HLT, ND_CAT_SYSTEM, ND_SET_I86, 262,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
},
// Pos:389 Instruction:"HSUBPD Vpd,Wpd" Encoding:"0x66 0x0F 0x7D /r"/"RM"
{
ND_INS_HSUBPD, ND_CAT_SSE, ND_SET_SSE3, 263,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:390 Instruction:"HSUBPS Vps,Wps" Encoding:"0xF2 0x0F 0x7D /r"/"RM"
{
ND_INS_HSUBPS, ND_CAT_SSE, ND_SET_SSE3, 264,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:391 Instruction:"IDIV Eb" Encoding:"0xF6 /7"/"M"
{
ND_INS_IDIV, ND_CAT_ARITH, ND_SET_I86, 265,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_AH, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:392 Instruction:"IDIV Ev" Encoding:"0xF7 /7"/"M"
{
ND_INS_IDIV, ND_CAT_ARITH, ND_SET_I86, 265,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:393 Instruction:"IMUL Gv,Ev" Encoding:"0x0F 0xAF /r"/"RM"
{
ND_INS_IMUL, ND_CAT_ARITH, ND_SET_I86, 266,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:394 Instruction:"IMUL Gv,Ev,Iz" Encoding:"0x69 /r iz"/"RMI"
{
ND_INS_IMUL, ND_CAT_ARITH, ND_SET_I86, 266,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:395 Instruction:"IMUL Gv,Ev,Ib" Encoding:"0x6B /r ib"/"RMI"
{
ND_INS_IMUL, ND_CAT_ARITH, ND_SET_I86, 266,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:396 Instruction:"IMUL Eb" Encoding:"0xF6 /5"/"M"
{
ND_INS_IMUL, ND_CAT_ARITH, ND_SET_I86, 266,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:397 Instruction:"IMUL Ev" Encoding:"0xF7 /5"/"M"
{
ND_INS_IMUL, ND_CAT_ARITH, ND_SET_I86, 266,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:398 Instruction:"IN AL,Ib" Encoding:"0xE4 ib"/"I"
{
ND_INS_IN, ND_CAT_IO, ND_SET_I86, 267,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:399 Instruction:"IN eAX,Ib" Encoding:"0xE5 ib"/"I"
{
ND_INS_IN, ND_CAT_IO, ND_SET_I86, 267,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_z, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:400 Instruction:"IN AL,DX" Encoding:"0xEC"/""
{
ND_INS_IN, ND_CAT_IO, ND_SET_I86, 267,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:401 Instruction:"IN eAX,DX" Encoding:"0xED"/""
{
ND_INS_IN, ND_CAT_IO, ND_SET_I86, 267,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_z, ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:402 Instruction:"INC Zv" Encoding:"0x40"/"O"
{
ND_INS_INC, ND_CAT_ARITH, ND_SET_I86, 268,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:403 Instruction:"INC Zv" Encoding:"0x41"/"O"
{
ND_INS_INC, ND_CAT_ARITH, ND_SET_I86, 268,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:404 Instruction:"INC Zv" Encoding:"0x42"/"O"
{
ND_INS_INC, ND_CAT_ARITH, ND_SET_I86, 268,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:405 Instruction:"INC Zv" Encoding:"0x43"/"O"
{
ND_INS_INC, ND_CAT_ARITH, ND_SET_I86, 268,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:406 Instruction:"INC Zv" Encoding:"0x44"/"O"
{
ND_INS_INC, ND_CAT_ARITH, ND_SET_I86, 268,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:407 Instruction:"INC Zv" Encoding:"0x45"/"O"
{
ND_INS_INC, ND_CAT_ARITH, ND_SET_I86, 268,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:408 Instruction:"INC Zv" Encoding:"0x46"/"O"
{
ND_INS_INC, ND_CAT_ARITH, ND_SET_I86, 268,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:409 Instruction:"INC Zv" Encoding:"0x47"/"O"
{
ND_INS_INC, ND_CAT_ARITH, ND_SET_I86, 268,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:410 Instruction:"INC Eb" Encoding:"0xFE /0"/"M"
{
ND_INS_INC, ND_CAT_ARITH, ND_SET_I86, 268,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:411 Instruction:"INC Ev" Encoding:"0xFF /0"/"M"
{
ND_INS_INC, ND_CAT_ARITH, ND_SET_I86, 268,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:412 Instruction:"INCSSPD Rd" Encoding:"0xF3 0x0F 0xAE /5:reg"/"M"
{
ND_INS_INCSSP, ND_CAT_CET, ND_SET_CET, 269,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CET,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_MEM_SHS, ND_OPS_v2, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_SSP, ND_OPS_yf, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:413 Instruction:"INCSSPQ Rq" Encoding:"0xF3 rexw 0x0F 0xAE /5:reg"/"M"
{
ND_INS_INCSSP, ND_CAT_CET, ND_SET_CET, 270,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CET,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_MEM_SHS, ND_OPS_v2, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_SSP, ND_OPS_yf, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:414 Instruction:"INSB Yb,DX" Encoding:"0x6C"/""
{
ND_INS_INS, ND_CAT_IOSTRINGOP, ND_SET_I86, 271,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
ND_PREF_REP, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:415 Instruction:"INSB Yb,DX" Encoding:"rep 0x6C"/""
{
ND_INS_INS, ND_CAT_IOSTRINGOP, ND_SET_I86, 271,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
ND_PREF_REP, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_CW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:416 Instruction:"INSD Yz,DX" Encoding:"0x6D"/""
{
ND_INS_INS, ND_CAT_IOSTRINGOP, ND_SET_I86, 272,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
ND_PREF_REP, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_z, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:417 Instruction:"INSD Yz,DX" Encoding:"rep 0x6D"/""
{
ND_INS_INS, ND_CAT_IOSTRINGOP, ND_SET_I86, 272,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
ND_PREF_REP, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_z, ND_OPF_DEFAULT|ND_OPF_CW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:418 Instruction:"INSERTPS Vdq,Md,Ib" Encoding:"0x66 0x0F 0x3A 0x21 /r:mem ib"/"RMI"
{
ND_INS_INSERTPS, ND_CAT_SSE, ND_SET_SSE4, 273,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:419 Instruction:"INSERTPS Vdq,Udq,Ib" Encoding:"0x66 0x0F 0x3A 0x21 /r:reg ib"/"RMI"
{
ND_INS_INSERTPS, ND_CAT_SSE, ND_SET_SSE4, 273,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_U, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:420 Instruction:"INSERTQ Vdq,Udq,Ib,Ib" Encoding:"0xF2 0x0F 0x78 /r ib ib"/"RMII"
{
ND_INS_INSERTQ, ND_CAT_BITBYTE, ND_SET_SSE4A, 274,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4A,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:421 Instruction:"INSERTQ Vdq,Udq" Encoding:"0xF2 0x0F 0x79 /r:reg"/"RM"
{
ND_INS_INSERTQ, ND_CAT_BITBYTE, ND_SET_SSE4A, 274,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4A,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:422 Instruction:"INSW Yz,DX" Encoding:"ds16 0x6D"/""
{
ND_INS_INS, ND_CAT_IOSTRINGOP, ND_SET_I86, 275,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
ND_PREF_REP, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_z, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:423 Instruction:"INSW Yz,DX" Encoding:"rep ds16 0x6D"/""
{
ND_INS_INS, ND_CAT_IOSTRINGOP, ND_SET_I86, 275,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
ND_PREF_REP, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_z, ND_OPF_DEFAULT|ND_OPF_CW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:424 Instruction:"INT Ib" Encoding:"0xCD ib"/"I"
{
ND_INS_INT, ND_CAT_INTERRUPT, ND_SET_I86, 276,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 5), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_VM,
0|REG_RFLAG_VM|REG_RFLAG_IF|REG_RFLAG_NT|REG_RFLAG_AC|REG_RFLAG_RF|REG_RFLAG_TF,
0,
0,
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_K, ND_OPS_v3, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_MEM_SHSP, ND_OPS_v3, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:425 Instruction:"INT1" Encoding:"0xF1"/""
{
ND_INS_INT1, ND_CAT_INTERRUPT, ND_SET_I86, 277,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_VM,
0|REG_RFLAG_VM|REG_RFLAG_IF|REG_RFLAG_NT|REG_RFLAG_AC|REG_RFLAG_RF|REG_RFLAG_TF,
0,
0,
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_K, ND_OPS_v3, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:426 Instruction:"INT3" Encoding:"0xCC"/""
{
ND_INS_INT3, ND_CAT_INTERRUPT, ND_SET_I86, 278,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 5), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_VM,
0|REG_RFLAG_VM|REG_RFLAG_IF|REG_RFLAG_NT|REG_RFLAG_AC|REG_RFLAG_RF|REG_RFLAG_TF,
0,
0,
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_K, ND_OPS_v3, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_MEM_SHSP, ND_OPS_v3, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:427 Instruction:"INTO" Encoding:"0xCE"/""
{
ND_INS_INTO, ND_CAT_INTERRUPT, ND_SET_I86, 279,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 5), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_VM,
0|REG_RFLAG_VM|REG_RFLAG_IF|REG_RFLAG_NT|REG_RFLAG_AC|REG_RFLAG_RF|REG_RFLAG_TF,
0,
0,
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_K, ND_OPS_v3, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_MEM_SHSP, ND_OPS_v3, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:428 Instruction:"INVD" Encoding:"0x0F 0x08"/""
{
ND_INS_INVD, ND_CAT_SYSTEM, ND_SET_I486REAL, 280,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL, 0,
0,
0,
0,
0,
},
// Pos:429 Instruction:"INVEPT Gy,Mdq" Encoding:"0x66 0x0F 0x38 0x80 /r:mem"/"RM"
{
ND_INS_INVEPT, ND_CAT_VTX, ND_SET_VTX, 281,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_LONG|ND_MOD_VMXR,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_SERIAL|ND_FLAG_MODRM, ND_CFF_VTX,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:430 Instruction:"INVLPG Mb" Encoding:"0x0F 0x01 /7:mem"/"M"
{
ND_INS_INVLPG, ND_CAT_SYSTEM, ND_SET_I486REAL, 282,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_AG|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:431 Instruction:"INVLPGA" Encoding:"0x0F 0x01 /0xDF"/""
{
ND_INS_INVLPGA, ND_CAT_SYSTEM, ND_SET_SVM, 283,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_LONG|ND_MOD_VMXR,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SVM,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:432 Instruction:"INVLPGB" Encoding:"0x0F 0x01 /0xFE"/""
{
ND_INS_INVLPGB, ND_CAT_SYSTEM, ND_SET_INVLPGB, 284,
ND_MOD_R0|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_INVLPGB,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:433 Instruction:"INVPCID Gy,Mdq" Encoding:"0x66 0x0F 0x38 0x82 /r:mem"/"RM"
{
ND_INS_INVPCID, ND_CAT_MISC, ND_SET_INVPCID, 285,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_MODRM, ND_CFF_INVPCID,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:434 Instruction:"INVVPID Gy,Mdq" Encoding:"0x66 0x0F 0x38 0x81 /r:mem"/"RM"
{
ND_INS_INVVPID, ND_CAT_VTX, ND_SET_VTX, 286,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_LONG|ND_MOD_VMXR,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_SERIAL|ND_FLAG_MODRM, ND_CFF_VTX,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:435 Instruction:"IRETD" Encoding:"ds32 0xCF"/""
{
ND_INS_IRET, ND_CAT_RET, ND_SET_I86, 287,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 5), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL, 0,
0,
0,
0,
0,
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v3, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_MEM_SHSP, ND_OPS_v3, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:436 Instruction:"IRETQ" Encoding:"ds64 0xCF"/""
{
ND_INS_IRET, ND_CAT_RET, ND_SET_I86, 288,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 5), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL, 0,
0,
0,
0,
0,
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v3, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_MEM_SHSP, ND_OPS_v3, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:437 Instruction:"IRETW" Encoding:"ds16 0xCF"/""
{
ND_INS_IRET, ND_CAT_RET, ND_SET_I86, 289,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 5), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL, 0,
0,
0,
0,
0,
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v3, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_MEM_SHSP, ND_OPS_v3, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:438 Instruction:"JBE Jz" Encoding:"0x0F 0x86 cz"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 290,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:439 Instruction:"JBE Jb" Encoding:"0x76 cb"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 290,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:440 Instruction:"JC Jz" Encoding:"0x0F 0x82 cz"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 291,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_CF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:441 Instruction:"JC Jb" Encoding:"0x72 cb"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 291,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_CF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:442 Instruction:"JCXZ Jb" Encoding:"as16 0xE3 cb"/"D"
{
ND_INS_JrCXZ, ND_CAT_COND_BR, ND_SET_I86, 292,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64, 0,
0,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:443 Instruction:"JECXZ Jb" Encoding:"as32 0xE3 cb"/"D"
{
ND_INS_JrCXZ, ND_CAT_COND_BR, ND_SET_I86, 293,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64, 0,
0,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:444 Instruction:"JL Jz" Encoding:"0x0F 0x8C cz"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 294,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:445 Instruction:"JL Jb" Encoding:"0x7C cb"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 294,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:446 Instruction:"JLE Jz" Encoding:"0x0F 0x8E cz"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 295,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_SF|REG_RFLAG_ZF|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:447 Instruction:"JLE Jb" Encoding:"0x7E cb"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 295,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_SF|REG_RFLAG_ZF|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:448 Instruction:"JMP Jz" Encoding:"0xE9 cz"/"D"
{
ND_INS_JMPNR, ND_CAT_UNCOND_BR, ND_SET_I86, 296,
ND_MOD_ANY,
ND_PREF_BND, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_F64, 0,
0,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:449 Instruction:"JMP Jb" Encoding:"0xEB cb"/"D"
{
ND_INS_JMPNR, ND_CAT_UNCOND_BR, ND_SET_I86, 296,
ND_MOD_ANY,
ND_PREF_BND, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_F64, 0,
0,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:450 Instruction:"JMP Ev" Encoding:"0xFF /4"/"M"
{
ND_INS_JMPNI, ND_CAT_UNCOND_BR, ND_SET_I86, 296,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_DNT, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_CETT|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:451 Instruction:"JMPE Ev" Encoding:"0x0F 0x00 /6"/"M"
{
ND_INS_JMPE, ND_CAT_SYSTEM, ND_SET_I64, 297,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_I64, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:452 Instruction:"JMPE Jz" Encoding:"0x0F 0xB8 cz"/"D"
{
ND_INS_JMPE, ND_CAT_UNCOND_BR, ND_SET_I64, 297,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:453 Instruction:"JMPF Ap" Encoding:"0xEA cp"/"D"
{
ND_INS_JMPFD, ND_CAT_UNCOND_BR, ND_SET_I86, 298,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0,
0,
0,
OP(ND_OPT_A, ND_OPS_p, ND_OPF_R, 0, 0),
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:454 Instruction:"JMPF Mp" Encoding:"0xFF /5:mem"/"M"
{
ND_INS_JMPFI, ND_CAT_UNCOND_BR, ND_SET_I86, 298,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_CETT|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_p, ND_OPF_R, 0, 0),
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:455 Instruction:"JNBE Jz" Encoding:"0x0F 0x87 cz"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 299,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:456 Instruction:"JNBE Jb" Encoding:"0x77 cb"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 299,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:457 Instruction:"JNC Jz" Encoding:"0x0F 0x83 cz"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 300,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_CF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:458 Instruction:"JNC Jb" Encoding:"0x73 cb"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 300,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_CF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:459 Instruction:"JNL Jz" Encoding:"0x0F 0x8D cz"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 301,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:460 Instruction:"JNL Jb" Encoding:"0x7D cb"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 301,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:461 Instruction:"JNLE Jz" Encoding:"0x0F 0x8F cz"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 302,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_SF|REG_RFLAG_ZF|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:462 Instruction:"JNLE Jb" Encoding:"0x7F cb"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 302,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_SF|REG_RFLAG_ZF|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:463 Instruction:"JNO Jz" Encoding:"0x0F 0x81 cz"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 303,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:464 Instruction:"JNO Jb" Encoding:"0x71 cb"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 303,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:465 Instruction:"JNP Jz" Encoding:"0x0F 0x8B cz"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 304,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_PF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:466 Instruction:"JNP Jb" Encoding:"0x7B cb"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 304,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_PF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:467 Instruction:"JNS Jz" Encoding:"0x0F 0x89 cz"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 305,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_SF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:468 Instruction:"JNS Jb" Encoding:"0x79 cb"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 305,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_SF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:469 Instruction:"JNZ Jz" Encoding:"0x0F 0x85 cz"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 306,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:470 Instruction:"JNZ Jb" Encoding:"0x75 cb"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 306,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:471 Instruction:"JO Jz" Encoding:"0x0F 0x80 cz"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 307,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:472 Instruction:"JO Jb" Encoding:"0x70 cb"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 307,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:473 Instruction:"JP Jz" Encoding:"0x0F 0x8A cz"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 308,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_PF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:474 Instruction:"JP Jb" Encoding:"0x7A cb"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 308,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_PF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:475 Instruction:"JRCXZ Jb" Encoding:"as64 0xE3 cb"/"D"
{
ND_INS_JrCXZ, ND_CAT_COND_BR, ND_SET_I86, 309,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64, 0,
0,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:476 Instruction:"JS Jz" Encoding:"0x0F 0x88 cz"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 310,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_SF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:477 Instruction:"JS Jb" Encoding:"0x78 cb"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 310,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_SF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:478 Instruction:"JZ Jz" Encoding:"0x0F 0x84 cz"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 311,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:479 Instruction:"JZ Jb" Encoding:"0x74 cb"/"D"
{
ND_INS_Jcc, ND_CAT_COND_BR, ND_SET_I86, 311,
ND_MOD_ANY,
ND_PREF_BND|ND_PREF_BHINT, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_COND, 0,
0|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:480 Instruction:"KADDB rKb,vKb,mKb" Encoding:"vex m:1 p:1 l:1 w:0 0x4A /r:reg"/"RVM"
{
ND_INS_KADD, ND_CAT_KMASK, ND_SET_AVX512DQ, 312,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:481 Instruction:"KADDD rKd,vKd,mKd" Encoding:"vex m:1 p:1 l:1 w:1 0x4A /r:reg"/"RVM"
{
ND_INS_KADD, ND_CAT_KMASK, ND_SET_AVX512BW, 313,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:482 Instruction:"KADDQ rKq,vKq,mKq" Encoding:"vex m:1 p:0 l:1 w:1 0x4A /r:reg"/"RVM"
{
ND_INS_KADD, ND_CAT_KMASK, ND_SET_AVX512BW, 314,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:483 Instruction:"KADDW rKw,vKw,mKw" Encoding:"vex m:1 p:0 l:1 w:0 0x4A /r:reg"/"RVM"
{
ND_INS_KADD, ND_CAT_KMASK, ND_SET_AVX512DQ, 315,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:484 Instruction:"KANDB rKb,vKb,mKb" Encoding:"vex m:1 p:1 l:1 w:0 0x41 /r:reg"/"RVM"
{
ND_INS_KAND, ND_CAT_KMASK, ND_SET_AVX512DQ, 316,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:485 Instruction:"KANDD rKd,vKd,mKd" Encoding:"vex m:1 p:1 l:1 w:1 0x41 /r:reg"/"RVM"
{
ND_INS_KAND, ND_CAT_KMASK, ND_SET_AVX512BW, 317,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:486 Instruction:"KANDNB rKb,vKb,mKb" Encoding:"vex m:1 p:1 l:1 w:0 0x42 /r:reg"/"RVM"
{
ND_INS_KANDN, ND_CAT_KMASK, ND_SET_AVX512DQ, 318,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:487 Instruction:"KANDND rKd,vKd,mKd" Encoding:"vex m:1 p:1 l:1 w:1 0x42 /r:reg"/"RVM"
{
ND_INS_KANDN, ND_CAT_KMASK, ND_SET_AVX512BW, 319,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:488 Instruction:"KANDNQ rKq,vKq,mKq" Encoding:"vex m:1 p:0 l:1 w:1 0x42 /r:reg"/"RVM"
{
ND_INS_KANDN, ND_CAT_KMASK, ND_SET_AVX512BW, 320,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:489 Instruction:"KANDNW rKw,vKw,mKw" Encoding:"vex m:1 p:0 l:1 w:0 0x42 /r:reg"/"RVM"
{
ND_INS_KANDN, ND_CAT_KMASK, ND_SET_AVX512F, 321,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:490 Instruction:"KANDQ rKq,vKq,mKq" Encoding:"vex m:1 p:0 l:1 w:1 0x41 /r:reg"/"RVM"
{
ND_INS_KAND, ND_CAT_KMASK, ND_SET_AVX512BW, 322,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:491 Instruction:"KANDW rKw,vKw,mKw" Encoding:"vex m:1 p:0 l:1 w:0 0x41 /r:reg"/"RVM"
{
ND_INS_KAND, ND_CAT_KMASK, ND_SET_AVX512F, 323,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:492 Instruction:"KMERGE2L1H rKw,mKw" Encoding:"vex m:1 p:0 l:0 w:0 0x48 /r:reg"/"RM"
{
ND_INS_KMERGE2L1H, ND_CAT_UNKNOWN, ND_SET_UNKNOWN, 324,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:493 Instruction:"KMERGE2L1L rKw,mKw" Encoding:"vex m:1 p:0 l:0 w:0 0x49 /r:reg"/"RM"
{
ND_INS_KMERGE2L1L, ND_CAT_UNKNOWN, ND_SET_UNKNOWN, 325,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:494 Instruction:"KMOVB rKb,Mb" Encoding:"vex m:1 p:1 l:0 w:0 0x90 /r:mem"/"RM"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512DQ, 326,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K21, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:495 Instruction:"KMOVB rKb,mKb" Encoding:"vex m:1 p:1 l:0 w:0 0x90 /r:reg"/"RM"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512DQ, 326,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:496 Instruction:"KMOVB Mb,rKb" Encoding:"vex m:1 p:1 l:0 w:0 0x91 /r:mem"/"MR"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512DQ, 326,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K21, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_rK, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:497 Instruction:"KMOVB rKb,Ry" Encoding:"vex m:1 p:1 l:0 w:0 0x92 /r:reg"/"RM"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512DQ, 326,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_R, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:498 Instruction:"KMOVB Gy,mKb" Encoding:"vex m:1 p:1 l:0 w:0 0x93 /r:reg"/"RM"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512DQ, 326,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:499 Instruction:"KMOVD rKd,Md" Encoding:"vex m:1 p:1 l:0 w:1 0x90 /r:mem"/"RM"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512BW, 327,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K21, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:500 Instruction:"KMOVD rKd,mKd" Encoding:"vex m:1 p:1 l:0 w:1 0x90 /r:reg"/"RM"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512BW, 327,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:501 Instruction:"KMOVD Md,rKd" Encoding:"vex m:1 p:1 l:0 w:1 0x91 /r:mem"/"MR"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512BW, 327,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K21, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_rK, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:502 Instruction:"KMOVD rKd,Ry" Encoding:"vex m:1 p:3 l:0 w:0 0x92 /r:reg"/"RM"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512BW, 327,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_R, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:503 Instruction:"KMOVD Gy,mKd" Encoding:"vex m:1 p:3 l:0 w:0 0x93 /r:reg"/"RM"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512BW, 327,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:504 Instruction:"KMOVQ rKq,Mq" Encoding:"vex m:1 p:0 l:0 w:1 0x90 /r:mem"/"RM"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512BW, 328,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K21, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:505 Instruction:"KMOVQ rKq,mKq" Encoding:"vex m:1 p:0 l:0 w:1 0x90 /r:reg"/"RM"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512BW, 328,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:506 Instruction:"KMOVQ Mq,rKq" Encoding:"vex m:1 p:0 l:0 w:1 0x91 /r:mem"/"MR"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512BW, 328,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K21, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:507 Instruction:"KMOVQ rKq,Ry" Encoding:"vex m:1 p:3 l:0 w:1 0x92 /r:reg"/"RM"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512BW, 328,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_R, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:508 Instruction:"KMOVQ Gy,mKq" Encoding:"vex m:1 p:3 l:0 w:1 0x93 /r:reg"/"RM"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512BW, 328,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:509 Instruction:"KMOVW rKw,Mw" Encoding:"vex m:1 p:0 l:0 w:0 0x90 /r:mem"/"RM"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512F, 329,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K21, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:510 Instruction:"KMOVW rKw,mKw" Encoding:"vex m:1 p:0 l:0 w:0 0x90 /r:reg"/"RM"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512F, 329,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:511 Instruction:"KMOVW Mw,rKw" Encoding:"vex m:1 p:0 l:0 w:0 0x91 /r:mem"/"MR"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512F, 329,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K21, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_rK, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:512 Instruction:"KMOVW rKw,Ry" Encoding:"vex m:1 p:0 l:0 w:0 0x92 /r:reg"/"RM"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512F, 329,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_R, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:513 Instruction:"KMOVW Gy,mKw" Encoding:"vex m:1 p:0 l:0 w:0 0x93 /r:reg"/"RM"
{
ND_INS_KMOV, ND_CAT_KMASK, ND_SET_AVX512F, 329,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:514 Instruction:"KNOTB rKb,mKb" Encoding:"vex m:1 p:1 l:0 w:0 0x44 /r:reg"/"RM"
{
ND_INS_KNOT, ND_CAT_KMASK, ND_SET_AVX512DQ, 330,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:515 Instruction:"KNOTD rKd,mKd" Encoding:"vex m:1 p:1 l:0 w:1 0x44 /r:reg"/"RM"
{
ND_INS_KNOT, ND_CAT_KMASK, ND_SET_AVX512BW, 331,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:516 Instruction:"KNOTQ rKq,mKq" Encoding:"vex m:1 p:0 l:0 w:1 0x44 /r:reg"/"RM"
{
ND_INS_KNOT, ND_CAT_KMASK, ND_SET_AVX512BW, 332,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:517 Instruction:"KNOTW rKw,mKw" Encoding:"vex m:1 p:0 l:0 w:0 0x44 /r:reg"/"RM"
{
ND_INS_KNOT, ND_CAT_KMASK, ND_SET_AVX512F, 333,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:518 Instruction:"KORB rKb,vKb,mKb" Encoding:"vex m:1 p:1 l:1 w:0 0x45 /r:reg"/"RVM"
{
ND_INS_KOR, ND_CAT_KMASK, ND_SET_AVX512DQ, 334,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:519 Instruction:"KORD rKd,vKd,mKd" Encoding:"vex m:1 p:1 l:1 w:1 0x45 /r:reg"/"RVM"
{
ND_INS_KOR, ND_CAT_KMASK, ND_SET_AVX512BW, 335,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:520 Instruction:"KORQ rKq,vKq,mKq" Encoding:"vex m:1 p:0 l:1 w:1 0x45 /r:reg"/"RVM"
{
ND_INS_KOR, ND_CAT_KMASK, ND_SET_AVX512BW, 336,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:521 Instruction:"KORTESTB rKb,mKb" Encoding:"vex m:1 p:1 l:0 w:0 0x98 /r:reg"/"RM"
{
ND_INS_KORTEST, ND_CAT_KMASK, ND_SET_AVX512DQ, 337,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512DQ,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_rK, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:522 Instruction:"KORTESTD rKd,mKd" Encoding:"vex m:1 p:1 l:0 w:1 0x98 /r:reg"/"RM"
{
ND_INS_KORTEST, ND_CAT_KMASK, ND_SET_AVX512BW, 338,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_rK, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:523 Instruction:"KORTESTQ rKq,mKq" Encoding:"vex m:1 p:0 l:0 w:1 0x98 /r:reg"/"RM"
{
ND_INS_KORTEST, ND_CAT_KMASK, ND_SET_AVX512BW, 339,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:524 Instruction:"KORTESTW rKw,mKw" Encoding:"vex m:1 p:0 l:0 w:0 0x98 /r:reg"/"RM"
{
ND_INS_KORTEST, ND_CAT_KMASK, ND_SET_AVX512F, 340,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512F,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_rK, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:525 Instruction:"KORW rKw,vKw,mKw" Encoding:"vex m:1 p:0 l:1 w:0 0x45 /r:reg"/"RVM"
{
ND_INS_KOR, ND_CAT_KMASK, ND_SET_AVX512F, 341,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:526 Instruction:"KSHIFTLB rKb,mKb,Ib" Encoding:"vex m:3 p:1 l:0 w:0 0x32 /r:reg ib"/"RMI"
{
ND_INS_KSHIFTL, ND_CAT_KMASK, ND_SET_AVX512DQ, 342,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:527 Instruction:"KSHIFTLD rKd,mKd,Ib" Encoding:"vex m:3 p:1 l:0 w:0 0x33 /r:reg ib"/"RMI"
{
ND_INS_KSHIFTL, ND_CAT_KMASK, ND_SET_AVX512BW, 343,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:528 Instruction:"KSHIFTLQ rKq,mKq,Ib" Encoding:"vex m:3 p:1 l:0 w:1 0x33 /r:reg ib"/"RMI"
{
ND_INS_KSHIFTL, ND_CAT_KMASK, ND_SET_AVX512BW, 344,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:529 Instruction:"KSHIFTLW rKw,mKw,Ib" Encoding:"vex m:3 p:1 l:0 w:1 0x32 /r:reg ib"/"RMI"
{
ND_INS_KSHIFTL, ND_CAT_KMASK, ND_SET_AVX512F, 345,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:530 Instruction:"KSHIFTRB rKb,mKb,Ib" Encoding:"vex m:3 p:1 l:0 w:0 0x30 /r:reg ib"/"RMI"
{
ND_INS_KSHIFTR, ND_CAT_KMASK, ND_SET_AVX512DQ, 346,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:531 Instruction:"KSHIFTRD rKd,mKd,Ib" Encoding:"vex m:3 p:1 l:0 w:0 0x31 /r:reg ib"/"RMI"
{
ND_INS_KSHIFTR, ND_CAT_KMASK, ND_SET_AVX512BW, 347,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:532 Instruction:"KSHIFTRQ rKq,mKq,Ib" Encoding:"vex m:3 p:1 l:0 w:1 0x31 /r:reg ib"/"RMI"
{
ND_INS_KSHIFTR, ND_CAT_KMASK, ND_SET_AVX512BW, 348,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:533 Instruction:"KSHIFTRW rKw,mKw,Ib" Encoding:"vex m:3 p:1 l:0 w:1 0x30 /r:reg ib"/"RMI"
{
ND_INS_KSHIFTR, ND_CAT_KMASK, ND_SET_AVX512F, 349,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:534 Instruction:"KTESTB rKb,mKb" Encoding:"vex m:1 p:1 l:0 w:0 0x99 /r:reg"/"RM"
{
ND_INS_KTEST, ND_CAT_KMASK, ND_SET_AVX512DQ, 350,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:535 Instruction:"KTESTD rKd,mKd" Encoding:"vex m:1 p:1 l:0 w:1 0x99 /r:reg"/"RM"
{
ND_INS_KTEST, ND_CAT_KMASK, ND_SET_AVX512BW, 351,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:536 Instruction:"KTESTQ rKq,mKq" Encoding:"vex m:1 p:0 l:0 w:1 0x99 /r:reg"/"RM"
{
ND_INS_KTEST, ND_CAT_KMASK, ND_SET_AVX512BW, 352,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:537 Instruction:"KTESTW rKw,mKw" Encoding:"vex m:1 p:0 l:0 w:0 0x99 /r:reg"/"RM"
{
ND_INS_KTEST, ND_CAT_KMASK, ND_SET_AVX512DQ, 353,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:538 Instruction:"KUNPCKBW rKw,vKb,mKb" Encoding:"vex m:1 p:1 l:1 w:0 0x4B /r:reg"/"RVM"
{
ND_INS_KUNPCKBW, ND_CAT_KMASK, ND_SET_AVX512F, 354,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:539 Instruction:"KUNPCKDQ rKq,vKd,mKd" Encoding:"vex m:1 p:0 l:1 w:1 0x4B /r:reg"/"RVM"
{
ND_INS_KUNPCKDQ, ND_CAT_KMASK, ND_SET_AVX512BW, 355,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:540 Instruction:"KUNPCKWD rKd,vKw,mKw" Encoding:"vex m:1 p:0 l:1 w:0 0x4B /r:reg"/"RVM"
{
ND_INS_KUNPCKWD, ND_CAT_KMASK, ND_SET_AVX512BW, 356,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:541 Instruction:"KXNORB rKb,vKb,mKb" Encoding:"vex m:1 p:1 l:1 w:0 0x46 /r:reg"/"RVM"
{
ND_INS_KXNOR, ND_CAT_KMASK, ND_SET_AVX512DQ, 357,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:542 Instruction:"KXNORD rKd,vKd,mKd" Encoding:"vex m:1 p:1 l:1 w:1 0x46 /r:reg"/"RVM"
{
ND_INS_KXNOR, ND_CAT_KMASK, ND_SET_AVX512BW, 358,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:543 Instruction:"KXNORQ rKq,vKq,mKq" Encoding:"vex m:1 p:0 l:1 w:1 0x46 /r:reg"/"RVM"
{
ND_INS_KXNOR, ND_CAT_KMASK, ND_SET_AVX512BW, 359,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:544 Instruction:"KXNORW rKw,vKw,mKw" Encoding:"vex m:1 p:0 l:1 w:0 0x46 /r:reg"/"RVM"
{
ND_INS_KXNOR, ND_CAT_KMASK, ND_SET_AVX512F, 360,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:545 Instruction:"KXORB rKb,vKb,mKb" Encoding:"vex m:1 p:1 l:1 w:0 0x47 /r:reg"/"RVM"
{
ND_INS_KXOR, ND_CAT_KMASK, ND_SET_AVX512DQ, 361,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:546 Instruction:"KXORD rKd,vKd,mKd" Encoding:"vex m:1 p:1 l:1 w:1 0x47 /r:reg"/"RVM"
{
ND_INS_KXOR, ND_CAT_KMASK, ND_SET_AVX512BW, 362,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:547 Instruction:"KXORQ rKq,vKq,mKq" Encoding:"vex m:1 p:0 l:1 w:1 0x47 /r:reg"/"RVM"
{
ND_INS_KXOR, ND_CAT_KMASK, ND_SET_AVX512BW, 363,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:548 Instruction:"KXORW rKw,vKw,mKw" Encoding:"vex m:1 p:0 l:1 w:0 0x47 /r:reg"/"RVM"
{
ND_INS_KXOR, ND_CAT_KMASK, ND_SET_AVX512F, 364,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_K20, ND_EXC_OPMASK, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_vK, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_mK, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:549 Instruction:"LAHF" Encoding:"0x9F"/""
{
ND_INS_LAHF, ND_CAT_FLAGOP, ND_SET_I86, 365,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF,
0,
0,
0,
OP(ND_OPT_GPR_AH, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:550 Instruction:"LAR Gv,Mw" Encoding:"0x0F 0x02 /r:mem"/"RM"
{
ND_INS_LAR, ND_CAT_SYSTEM, ND_SET_I286PROT, 366,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_M, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:551 Instruction:"LAR Gv,Rz" Encoding:"0x0F 0x02 /r:reg"/"RM"
{
ND_INS_LAR, ND_CAT_SYSTEM, ND_SET_I286PROT, 366,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_CW, 0, 0),
OP(ND_OPT_R, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:552 Instruction:"LDDQU Vx,Mx" Encoding:"0xF2 0x0F 0xF0 /r:mem"/"RM"
{
ND_INS_LDDQU, ND_CAT_SSE, ND_SET_SSE3, 367,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:553 Instruction:"LDMXCSR Md" Encoding:"NP 0x0F 0xAE /2:mem"/"M"
{
ND_INS_LDMXCSR, ND_CAT_SSE, ND_SET_SSE, 368,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_MXCSR, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:554 Instruction:"LDS Gz,Mp" Encoding:"0xC5 /r:mem"/"RM"
{
ND_INS_LDS, ND_CAT_SEGOP, ND_SET_I86, 369,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_I64, 0,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_z, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_p, ND_OPF_R, 0, 0),
OP(ND_OPT_SEG_DS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:555 Instruction:"LDTILECFG Moq" Encoding:"vex m:2 p:0 l:0 w:0 0x49 /0:mem"/"M"
{
ND_INS_LDTILECFG, ND_CAT_AMX, ND_SET_AMXTILE, 370,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX,
0, 0, ND_OPS_CNT(1, 0), 0, ND_EXT_AMX_E1, ND_EXC_AMX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_O64, ND_CFF_AMXTILE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_oq, ND_OPF_R, 0, 0),
},
// Pos:556 Instruction:"LEA Gv,M0" Encoding:"0x8D /r:mem"/"RM"
{
ND_INS_LEA, ND_CAT_MISC, ND_SET_I86, 371,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_AG|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_0, ND_OPF_N, 0, 0),
},
// Pos:557 Instruction:"LEAVE" Encoding:"0xC9"/""
{
ND_INS_LEAVE, ND_CAT_MISC, ND_SET_I186, 372,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rBP, ND_OPS_ssz, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rBP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rSP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:558 Instruction:"LES Gz,Mp" Encoding:"0xC4 /r:mem"/"RM"
{
ND_INS_LES, ND_CAT_SEGOP, ND_SET_I86, 373,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_I64, 0,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_z, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_p, ND_OPF_R, 0, 0),
OP(ND_OPT_SEG_ES, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:559 Instruction:"LFENCE" Encoding:"NP 0x0F 0xAE /5:reg"/""
{
ND_INS_LFENCE, ND_CAT_MISC, ND_SET_SSE2, 374,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSE2,
0,
0,
0,
0,
},
// Pos:560 Instruction:"LFS Gv,Mp" Encoding:"0x0F 0xB4 /r:mem"/"RM"
{
ND_INS_LFS, ND_CAT_SEGOP, ND_SET_I386, 375,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_p, ND_OPF_R, 0, 0),
OP(ND_OPT_SEG_FS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:561 Instruction:"LGDT Ms" Encoding:"0x0F 0x01 /2:mem"/"M"
{
ND_INS_LGDT, ND_CAT_SYSTEM, ND_SET_I286REAL, 376,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_s, ND_OPF_R, 0, 0),
OP(ND_OPT_SYS_GDTR, ND_OPS_s, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:562 Instruction:"LGS Gv,Mp" Encoding:"0x0F 0xB5 /r:mem"/"RM"
{
ND_INS_LGS, ND_CAT_SEGOP, ND_SET_I386, 377,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_p, ND_OPF_R, 0, 0),
OP(ND_OPT_SEG_GS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:563 Instruction:"LIDT Ms" Encoding:"0x0F 0x01 /3:mem"/"M"
{
ND_INS_LIDT, ND_CAT_SYSTEM, ND_SET_I286REAL, 378,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_s, ND_OPF_R, 0, 0),
OP(ND_OPT_SYS_IDTR, ND_OPS_s, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:564 Instruction:"LLDT Ew" Encoding:"0x0F 0x00 /2"/"M"
{
ND_INS_LLDT, ND_CAT_SYSTEM, ND_SET_I286PROT, 379,
ND_MOD_R0|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_SYS_LDTR, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:565 Instruction:"LLWPCB Ry" Encoding:"xop m:9 0x12 /0:reg"/"M"
{
ND_INS_LLWPCB, ND_CAT_LWP, ND_SET_LWP, 380,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_LWP,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:566 Instruction:"LMSW Ew" Encoding:"0x0F 0x01 /6"/"M"
{
ND_INS_LMSW, ND_CAT_SYSTEM, ND_SET_I286REAL, 381,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_CR_0, ND_OPS_yf, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:567 Instruction:"LOADALL" Encoding:"0x0F 0x05"/""
{
ND_INS_LOADALL, ND_CAT_UNDOC, ND_SET_I486REAL, 382,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:568 Instruction:"LOADALLD" Encoding:"0x0F 0x07"/""
{
ND_INS_LOADALLD, ND_CAT_UNDOC, ND_SET_I486REAL, 383,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:569 Instruction:"LODSB AL,Xb" Encoding:"0xAC"/""
{
ND_INS_LODS, ND_CAT_STRINGOP, ND_SET_I86, 384,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_X, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:570 Instruction:"LODSB AL,Xb" Encoding:"rep 0xAC"/""
{
ND_INS_LODS, ND_CAT_STRINGOP, ND_SET_I86, 384,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_CW, 0, 0),
OP(ND_OPT_X, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:571 Instruction:"LODSD EAX,Xv" Encoding:"ds32 0xAD"/""
{
ND_INS_LODS, ND_CAT_STRINGOP, ND_SET_I86, 385,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:572 Instruction:"LODSD EAX,Xv" Encoding:"rep ds32 0xAD"/""
{
ND_INS_LODS, ND_CAT_STRINGOP, ND_SET_I86, 385,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_CW, 0, 0),
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:573 Instruction:"LODSQ RAX,Xv" Encoding:"ds64 0xAD"/""
{
ND_INS_LODS, ND_CAT_STRINGOP, ND_SET_I86, 386,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:574 Instruction:"LODSQ RAX,Xv" Encoding:"rep ds64 0xAD"/""
{
ND_INS_LODS, ND_CAT_STRINGOP, ND_SET_I86, 386,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_CW, 0, 0),
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:575 Instruction:"LODSW AX,Xv" Encoding:"ds16 0xAD"/""
{
ND_INS_LODS, ND_CAT_STRINGOP, ND_SET_I86, 387,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:576 Instruction:"LODSW AX,Xv" Encoding:"rep ds16 0xAD"/""
{
ND_INS_LODS, ND_CAT_STRINGOP, ND_SET_I86, 387,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_CW, 0, 0),
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:577 Instruction:"LOOP Jb" Encoding:"0xE2 cb"/"D"
{
ND_INS_LOOP, ND_CAT_COND_BR, ND_SET_I86, 388,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_F64, 0,
0,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:578 Instruction:"LOOPNZ Jb" Encoding:"0xE0 cb"/"D"
{
ND_INS_LOOPNZ, ND_CAT_COND_BR, ND_SET_I86, 389,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_F64, 0,
0|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:579 Instruction:"LOOPZ Jb" Encoding:"0xE1 cb"/"D"
{
ND_INS_LOOPZ, ND_CAT_COND_BR, ND_SET_I86, 390,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_F64, 0,
0|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:580 Instruction:"LSL Gv,Mw" Encoding:"0x0F 0x03 /r:mem"/"RM"
{
ND_INS_LSL, ND_CAT_SYSTEM, ND_SET_I286PROT, 391,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:581 Instruction:"LSL Gv,Rz" Encoding:"0x0F 0x03 /r:reg"/"RM"
{
ND_INS_LSL, ND_CAT_SYSTEM, ND_SET_I286PROT, 391,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_R, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:582 Instruction:"LSS Gv,Mp" Encoding:"0x0F 0xB2 /r:mem"/"RM"
{
ND_INS_LSS, ND_CAT_SEGOP, ND_SET_I386, 392,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_p, ND_OPF_R, 0, 0),
OP(ND_OPT_SEG_SS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:583 Instruction:"LTR Ew" Encoding:"0x0F 0x00 /3"/"M"
{
ND_INS_LTR, ND_CAT_SYSTEM, ND_SET_I286PROT, 393,
ND_MOD_R0|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_SYS_TR, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:584 Instruction:"LWPINS By,Ed,Id" Encoding:"xop m:A 0x12 /0 id"/"VMI"
{
ND_INS_LWPINS, ND_CAT_LWP, ND_SET_LWP, 394,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_LWP,
0,
0,
0,
0,
OP(ND_OPT_B, ND_OPS_y, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:585 Instruction:"LWPVAL By,Ed,Id" Encoding:"xop m:A 0x12 /1 id"/"VMI"
{
ND_INS_LWPVAL, ND_CAT_LWP, ND_SET_LWP, 395,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_LWP,
0,
0,
0,
0,
OP(ND_OPT_B, ND_OPS_y, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:586 Instruction:"LZCNT Gv,Ev" Encoding:"a0xF3 0x0F 0xBD /r"/"RM"
{
ND_INS_LZCNT, ND_CAT_LZCNT, ND_SET_LZCNT, 396,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_LZCNT,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:587 Instruction:"MASKMOVDQU Vdq,Udq" Encoding:"0x66 0x0F 0xF7 /r:reg"/"RM"
{
ND_INS_MASKMOVDQU, ND_CAT_DATAXFER, ND_SET_SSE2, 397,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_U, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_MEM_rDI, ND_OPS_dq, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:588 Instruction:"MASKMOVQ Pq,Nq" Encoding:"NP 0x0F 0xF7 /r:reg"/"RM"
{
ND_INS_MASKMOVQ, ND_CAT_DATAXFER, ND_SET_MMX, 398,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_N, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_MEM_rDI, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:589 Instruction:"MAXPD Vpd,Wpd" Encoding:"0x66 0x0F 0x5F /r"/"RM"
{
ND_INS_MAXPD, ND_CAT_SSE, ND_SET_SSE2, 399,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:590 Instruction:"MAXPS Vps,Wps" Encoding:"NP 0x0F 0x5F /r"/"RM"
{
ND_INS_MAXPS, ND_CAT_SSE, ND_SET_SSE, 400,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:591 Instruction:"MAXSD Vsd,Wsd" Encoding:"0xF2 0x0F 0x5F /r"/"RM"
{
ND_INS_MAXSD, ND_CAT_SSE, ND_SET_SSE2, 401,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:592 Instruction:"MAXSS Vss,Wss" Encoding:"0xF3 0x0F 0x5F /r"/"RM"
{
ND_INS_MAXSS, ND_CAT_SSE, ND_SET_SSE, 402,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:593 Instruction:"MCOMMIT" Encoding:"0xF3 0x0F 0x01 /0xFA"/""
{
ND_INS_MCOMMIT, ND_CAT_MISC, ND_SET_MCOMMIT, 403,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MCOMMIT,
0,
0|REG_RFLAG_CF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:594 Instruction:"MFENCE" Encoding:"NP 0x0F 0xAE /6:reg"/""
{
ND_INS_MFENCE, ND_CAT_MISC, ND_SET_SSE2, 404,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSE2,
0,
0,
0,
0,
},
// Pos:595 Instruction:"MINPD Vpd,Wpd" Encoding:"0x66 0x0F 0x5D /r"/"RM"
{
ND_INS_MINPD, ND_CAT_SSE, ND_SET_SSE2, 405,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:596 Instruction:"MINPS Vps,Wps" Encoding:"NP 0x0F 0x5D /r"/"RM"
{
ND_INS_MINPS, ND_CAT_SSE, ND_SET_SSE, 406,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:597 Instruction:"MINSD Vsd,Wsd" Encoding:"0xF2 0x0F 0x5D /r"/"RM"
{
ND_INS_MINSD, ND_CAT_SSE, ND_SET_SSE2, 407,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:598 Instruction:"MINSS Vss,Wss" Encoding:"0xF3 0x0F 0x5D /r"/"RM"
{
ND_INS_MINSS, ND_CAT_SSE, ND_SET_SSE, 408,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:599 Instruction:"MONITOR" Encoding:"NP 0x0F 0x01 /0xC8"/""
{
ND_INS_MONITOR, ND_CAT_MISC, ND_SET_SSE3, 409,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MONITOR,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:600 Instruction:"MONITORX" Encoding:"NP 0x0F 0x01 /0xFA"/""
{
ND_INS_MONITORX, ND_CAT_SYSTEM, ND_SET_MWAITT, 410,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:601 Instruction:"MONTMUL" Encoding:"0xF3 0x0F 0xA6 /0xC0"/""
{
ND_INS_MONTMUL, ND_CAT_PADLOCK, ND_SET_CYRIX, 411,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
},
// Pos:602 Instruction:"MOV Ry,Cy" Encoding:"0x0F 0x20 /r"/"MR"
{
ND_INS_MOV_CR, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_LOCK_SPECIAL|ND_FLAG_MFR|ND_FLAG_F64|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_C, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:603 Instruction:"MOV Ry,Dy" Encoding:"0x0F 0x21 /r"/"MR"
{
ND_INS_MOV_DR, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MFR|ND_FLAG_F64|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_D, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:604 Instruction:"MOV Cy,Ry" Encoding:"0x0F 0x22 /r"/"RM"
{
ND_INS_MOV_CR, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_LOCK_SPECIAL|ND_FLAG_MFR|ND_FLAG_F64|ND_FLAG_SERIAL|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_C, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_R, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:605 Instruction:"MOV Dy,Ry" Encoding:"0x0F 0x23 /r"/"RM"
{
ND_INS_MOV_DR, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MFR|ND_FLAG_F64|ND_FLAG_SERIAL|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_D, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_R, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:606 Instruction:"MOV Ry,Ty" Encoding:"0x0F 0x24 /r"/"MR"
{
ND_INS_MOV_TR, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MFR|ND_FLAG_F64|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_T, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:607 Instruction:"MOV Ty,Ry" Encoding:"0x0F 0x26 /r"/"RM"
{
ND_INS_MOV_TR, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MFR|ND_FLAG_F64|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_T, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_R, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:608 Instruction:"MOV Eb,Gb" Encoding:"0x88 /r"/"MR"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
ND_PREF_XRELEASE|ND_PREF_HLE_WO_LOCK, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_G, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:609 Instruction:"MOV Ev,Gv" Encoding:"0x89 /r"/"MR"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
ND_PREF_XRELEASE|ND_PREF_HLE_WO_LOCK, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:610 Instruction:"MOV Gb,Eb" Encoding:"0x8A /r"/"RM"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:611 Instruction:"MOV Gv,Ev" Encoding:"0x8B /r"/"RM"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:612 Instruction:"MOV Mw,Sw" Encoding:"0x8C /r:mem"/"MR"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_S, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:613 Instruction:"MOV Rv,Sw" Encoding:"0x8C /r:reg"/"MR"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_S, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:614 Instruction:"MOV Sw,Mw" Encoding:"0x8E /r:mem"/"RM"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_S, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:615 Instruction:"MOV Sw,Rv" Encoding:"0x8E /r:reg"/"RM"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_S, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_R, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:616 Instruction:"MOV AL,Ob" Encoding:"0xA0"/"D"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_O, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:617 Instruction:"MOV rAX,Ov" Encoding:"0xA1"/"D"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_O, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:618 Instruction:"MOV Ob,AL" Encoding:"0xA2"/"D"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_O, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:619 Instruction:"MOV Ov,rAX" Encoding:"0xA3"/"D"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_O, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:620 Instruction:"MOV Zb,Ib" Encoding:"0xB0 ib"/"OI"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:621 Instruction:"MOV Zb,Ib" Encoding:"0xB1 ib"/"OI"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:622 Instruction:"MOV Zb,Ib" Encoding:"0xB2 ib"/"OI"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:623 Instruction:"MOV Zb,Ib" Encoding:"0xB3 ib"/"OI"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:624 Instruction:"MOV Zb,Ib" Encoding:"0xB4 ib"/"OI"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:625 Instruction:"MOV Zb,Ib" Encoding:"0xB5 ib"/"OI"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:626 Instruction:"MOV Zb,Ib" Encoding:"0xB6 ib"/"OI"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:627 Instruction:"MOV Zb,Ib" Encoding:"0xB7 ib"/"OI"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:628 Instruction:"MOV Zv,Iv" Encoding:"0xB8 iv"/"OI"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:629 Instruction:"MOV Zv,Iv" Encoding:"0xB9 iv"/"OI"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:630 Instruction:"MOV Zv,Iv" Encoding:"0xBA iv"/"OI"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:631 Instruction:"MOV Zv,Iv" Encoding:"0xBB iv"/"OI"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:632 Instruction:"MOV Zv,Iv" Encoding:"0xBC iv"/"OI"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:633 Instruction:"MOV Zv,Iv" Encoding:"0xBD iv"/"OI"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:634 Instruction:"MOV Zv,Iv" Encoding:"0xBE iv"/"OI"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:635 Instruction:"MOV Zv,Iv" Encoding:"0xBF iv"/"OI"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:636 Instruction:"MOV Eb,Ib" Encoding:"0xC6 /0 ib"/"MI"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
ND_PREF_XRELEASE|ND_PREF_HLE_WO_LOCK, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:637 Instruction:"MOV Ev,Iz" Encoding:"0xC7 /0 iz"/"MI"
{
ND_INS_MOV, ND_CAT_DATAXFER, ND_SET_I86, 412,
ND_MOD_ANY,
ND_PREF_XRELEASE|ND_PREF_HLE_WO_LOCK, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
},
// Pos:638 Instruction:"MOVAPD Vpd,Wpd" Encoding:"0x66 0x0F 0x28 /r"/"RM"
{
ND_INS_MOVAPD, ND_CAT_DATAXFER, ND_SET_SSE2, 413,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:639 Instruction:"MOVAPD Wpd,Vpd" Encoding:"0x66 0x0F 0x29 /r"/"MR"
{
ND_INS_MOVAPD, ND_CAT_DATAXFER, ND_SET_SSE2, 413,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:640 Instruction:"MOVAPS Vps,Wps" Encoding:"NP 0x0F 0x28 /r"/"RM"
{
ND_INS_MOVAPS, ND_CAT_DATAXFER, ND_SET_SSE, 414,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:641 Instruction:"MOVAPS Wps,Vps" Encoding:"NP 0x0F 0x29 /r"/"MR"
{
ND_INS_MOVAPS, ND_CAT_DATAXFER, ND_SET_SSE, 414,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:642 Instruction:"MOVBE Gv,Mv" Encoding:"0x0F 0x38 0xF0 /r:mem"/"RM"
{
ND_INS_MOVBE, ND_CAT_DATAXFER, ND_SET_MOVBE, 415,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MOVBE,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:643 Instruction:"MOVBE Gv,Mv" Encoding:"0x66 0x0F 0x38 0xF0 /r:mem"/"RM"
{
ND_INS_MOVBE, ND_CAT_DATAXFER, ND_SET_MOVBE, 415,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_S66|ND_FLAG_MODRM, ND_CFF_MOVBE,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:644 Instruction:"MOVBE Mv,Gv" Encoding:"0x0F 0x38 0xF1 /r:mem"/"MR"
{
ND_INS_MOVBE, ND_CAT_DATAXFER, ND_SET_MOVBE, 415,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MOVBE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:645 Instruction:"MOVBE Mv,Gv" Encoding:"0x66 0x0F 0x38 0xF1 /r:mem"/"MR"
{
ND_INS_MOVBE, ND_CAT_DATAXFER, ND_SET_MOVBE, 415,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_S66|ND_FLAG_MODRM, ND_CFF_MOVBE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:646 Instruction:"MOVD Pq,Ey" Encoding:"NP 0x0F 0x6E /r"/"RM"
{
ND_INS_MOVD, ND_CAT_DATAXFER, ND_SET_MMX, 416,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:647 Instruction:"MOVD Vdq,Ey" Encoding:"0x66 0x0F 0x6E /r"/"RM"
{
ND_INS_MOVD, ND_CAT_DATAXFER, ND_SET_SSE2, 416,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:648 Instruction:"MOVD Ey,Pd" Encoding:"NP 0x0F 0x7E /r"/"MR"
{
ND_INS_MOVD, ND_CAT_DATAXFER, ND_SET_MMX, 416,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_P, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:649 Instruction:"MOVD Ey,Vdq" Encoding:"0x66 0x0F 0x7E /r"/"MR"
{
ND_INS_MOVD, ND_CAT_DATAXFER, ND_SET_SSE2, 416,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:650 Instruction:"MOVDDUP Vdq,Wq" Encoding:"0xF2 0x0F 0x12 /r"/"RM"
{
ND_INS_MOVDDUP, ND_CAT_DATAXFER, ND_SET_SSE3, 417,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:651 Instruction:"MOVDIR64B rMoq,Moq" Encoding:"0x66 0x0F 0x38 0xF8 /r:mem"/"M"
{
ND_INS_MOVDIR64B, ND_CAT_MOVDIR64B, ND_SET_MOVDIR64B, 418,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MOVDIR64B,
0,
0,
0,
0,
OP(ND_OPT_rM, ND_OPS_oq, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_oq, ND_OPF_R, 0, 0),
},
// Pos:652 Instruction:"MOVDIRI My,Gy" Encoding:"NP 0x0F 0x38 0xF9 /r:mem"/"MR"
{
ND_INS_MOVDIRI, ND_CAT_MOVDIRI, ND_SET_MOVDIRI, 419,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MOVDIRI,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_G, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:653 Instruction:"MOVDQ2Q Pq,Uq" Encoding:"0xF2 0x0F 0xD6 /r:reg"/"RM"
{
ND_INS_MOVDQ2Q, ND_CAT_DATAXFER, ND_SET_SSE2, 420,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:654 Instruction:"MOVDQA Vx,Wx" Encoding:"0x66 0x0F 0x6F /r"/"RM"
{
ND_INS_MOVDQA, ND_CAT_DATAXFER, ND_SET_SSE2, 421,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:655 Instruction:"MOVDQA Wx,Vx" Encoding:"0x66 0x0F 0x7F /r"/"MR"
{
ND_INS_MOVDQA, ND_CAT_DATAXFER, ND_SET_SSE2, 421,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:656 Instruction:"MOVDQU Vx,Wx" Encoding:"0xF3 0x0F 0x6F /r"/"RM"
{
ND_INS_MOVDQU, ND_CAT_DATAXFER, ND_SET_SSE2, 422,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:657 Instruction:"MOVDQU Wx,Vx" Encoding:"0xF3 0x0F 0x7F /r"/"MR"
{
ND_INS_MOVDQU, ND_CAT_DATAXFER, ND_SET_SSE2, 422,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:658 Instruction:"MOVHPD Vq,Mq" Encoding:"0x66 0x0F 0x16 /r:mem"/"RM"
{
ND_INS_MOVHPD, ND_CAT_DATAXFER, ND_SET_SSE2, 423,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:659 Instruction:"MOVHPD Mq,Vq" Encoding:"0x66 0x0F 0x17 /r:mem"/"MR"
{
ND_INS_MOVHPD, ND_CAT_DATAXFER, ND_SET_SSE2, 423,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:660 Instruction:"MOVHPS Vq,Mq" Encoding:"NP 0x0F 0x16 /r:mem"/"RM"
{
ND_INS_MOVHPS, ND_CAT_DATAXFER, ND_SET_SSE, 424,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:661 Instruction:"MOVHPS Mq,Vq" Encoding:"NP 0x0F 0x17 /r:mem"/"MR"
{
ND_INS_MOVHPS, ND_CAT_DATAXFER, ND_SET_SSE, 424,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:662 Instruction:"MOVLHPS Vq,Uq" Encoding:"NP 0x0F 0x16 /r:reg"/"RM"
{
ND_INS_MOVLHPS, ND_CAT_DATAXFER, ND_SET_SSE, 425,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:663 Instruction:"MOVLPD Vsd,Mq" Encoding:"0x66 0x0F 0x12 /r:mem"/"RM"
{
ND_INS_MOVLPD, ND_CAT_DATAXFER, ND_SET_SSE2, 426,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:664 Instruction:"MOVLPD Mq,Vpd" Encoding:"0x66 0x0F 0x13 /r:mem"/"MR"
{
ND_INS_MOVLPD, ND_CAT_DATAXFER, ND_SET_SSE2, 426,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:665 Instruction:"MOVLPS Vq,Wq" Encoding:"NP 0x0F 0x12 /r"/"RM"
{
ND_INS_MOVLPS, ND_CAT_DATAXFER, ND_SET_SSE, 427,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:666 Instruction:"MOVLPS Mq,Vps" Encoding:"NP 0x0F 0x13 /r:mem"/"MR"
{
ND_INS_MOVLPS, ND_CAT_DATAXFER, ND_SET_SSE, 427,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:667 Instruction:"MOVMSKPD Gd,Upd" Encoding:"0x66 0x0F 0x50 /r:reg"/"RM"
{
ND_INS_MOVMSKPD, ND_CAT_DATAXFER, ND_SET_SSE2, 428,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:668 Instruction:"MOVMSKPS Gd,Ups" Encoding:"NP 0x0F 0x50 /r:reg"/"RM"
{
ND_INS_MOVMSKPS, ND_CAT_DATAXFER, ND_SET_SSE, 429,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:669 Instruction:"MOVNTDQ Mx,Vx" Encoding:"0x66 0x0F 0xE7 /r:mem"/"MR"
{
ND_INS_MOVNTDQ, ND_CAT_DATAXFER, ND_SET_SSE2, 430,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:670 Instruction:"MOVNTDQA Vx,Mx" Encoding:"0x66 0x0F 0x38 0x2A /r:mem"/"RM"
{
ND_INS_MOVNTDQA, ND_CAT_SSE, ND_SET_SSE4, 431,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:671 Instruction:"MOVNTI My,Gy" Encoding:"NP 0x0F 0xC3 /r:mem"/"MR"
{
ND_INS_MOVNTI, ND_CAT_DATAXFER, ND_SET_SSE2, 432,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_G, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:672 Instruction:"MOVNTPD Mpd,Vpd" Encoding:"0x66 0x0F 0x2B /r:mem"/"MR"
{
ND_INS_MOVNTPD, ND_CAT_DATAXFER, ND_SET_SSE2, 433,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:673 Instruction:"MOVNTPS Mps,Vps" Encoding:"NP 0x0F 0x2B /r:mem"/"MR"
{
ND_INS_MOVNTPS, ND_CAT_DATAXFER, ND_SET_SSE, 434,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:674 Instruction:"MOVNTQ Mq,Pq" Encoding:"NP 0x0F 0xE7 /r:mem"/"MR"
{
ND_INS_MOVNTQ, ND_CAT_DATAXFER, ND_SET_MMX, 435,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_P, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:675 Instruction:"MOVNTSD Msd,Vsd" Encoding:"0xF2 0x0F 0x2B /r:mem"/"MR"
{
ND_INS_MOVNTSD, ND_CAT_DATAXFER, ND_SET_SSE4A, 436,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4A,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:676 Instruction:"MOVNTSS Mss,Vss" Encoding:"0xF3 0x0F 0x2B /r:mem"/"MR"
{
ND_INS_MOVNTSS, ND_CAT_DATAXFER, ND_SET_SSE4A, 437,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4A,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:677 Instruction:"MOVQ Pq,Ey" Encoding:"rexw NP 0x0F 0x6E /r"/"RM"
{
ND_INS_MOVQ, ND_CAT_DATAXFER, ND_SET_SSE2, 438,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:678 Instruction:"MOVQ Vdq,Ey" Encoding:"0x66 rexw 0x0F 0x6E /r"/"RM"
{
ND_INS_MOVQ, ND_CAT_DATAXFER, ND_SET_SSE2, 438,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:679 Instruction:"MOVQ Pq,Qq" Encoding:"NP 0x0F 0x6F /r"/"RM"
{
ND_INS_MOVQ, ND_CAT_DATAXFER, ND_SET_MMX, 438,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:680 Instruction:"MOVQ Ey,Pq" Encoding:"rexw NP 0x0F 0x7E /r"/"MR"
{
ND_INS_MOVQ, ND_CAT_DATAXFER, ND_SET_MMX, 438,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_P, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:681 Instruction:"MOVQ Ey,Vdq" Encoding:"0x66 rexw 0x0F 0x7E /r"/"MR"
{
ND_INS_MOVQ, ND_CAT_DATAXFER, ND_SET_SSE2, 438,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:682 Instruction:"MOVQ Vdq,Wq" Encoding:"0xF3 0x0F 0x7E /r"/"RM"
{
ND_INS_MOVQ, ND_CAT_DATAXFER, ND_SET_SSE2, 438,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:683 Instruction:"MOVQ Qq,Pq" Encoding:"NP 0x0F 0x7F /r"/"MR"
{
ND_INS_MOVQ, ND_CAT_DATAXFER, ND_SET_MMX, 438,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_P, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:684 Instruction:"MOVQ Wq,Vq" Encoding:"0x66 0x0F 0xD6 /r"/"MR"
{
ND_INS_MOVQ, ND_CAT_DATAXFER, ND_SET_SSE2, 438,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:685 Instruction:"MOVQ2DQ Vdq,Nq" Encoding:"0xF3 0x0F 0xD6 /r:reg"/"RM"
{
ND_INS_MOVQ2DQ, ND_CAT_DATAXFER, ND_SET_SSE2, 439,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_N, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:686 Instruction:"MOVSB Yb,Xb" Encoding:"0xA4"/""
{
ND_INS_MOVS, ND_CAT_STRINGOP, ND_SET_I86, 440,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_X, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:687 Instruction:"MOVSB Yb,Xb" Encoding:"rep 0xA4"/""
{
ND_INS_MOVS, ND_CAT_STRINGOP, ND_SET_I86, 440,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 4), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_CW, 0, 0),
OP(ND_OPT_X, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:688 Instruction:"MOVSD Vsd,Wsd" Encoding:"0xF2 0x0F 0x10 /r"/"RM"
{
ND_INS_MOVSD, ND_CAT_DATAXFER, ND_SET_SSE2, 441,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:689 Instruction:"MOVSD Wsd,Vsd" Encoding:"0xF2 0x0F 0x11 /r"/"MR"
{
ND_INS_MOVSD, ND_CAT_DATAXFER, ND_SET_SSE2, 441,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:690 Instruction:"MOVSD Yv,Xv" Encoding:"ds32 0xA5"/""
{
ND_INS_MOVS, ND_CAT_STRINGOP, ND_SET_I86, 441,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:691 Instruction:"MOVSD Yv,Xv" Encoding:"rep ds32 0xA5"/""
{
ND_INS_MOVS, ND_CAT_STRINGOP, ND_SET_I86, 441,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 4), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CW, 0, 0),
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:692 Instruction:"MOVSHDUP Vx,Wx" Encoding:"0xF3 0x0F 0x16 /r"/"RM"
{
ND_INS_MOVSHDUP, ND_CAT_DATAXFER, ND_SET_SSE3, 442,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:693 Instruction:"MOVSLDUP Vx,Wx" Encoding:"0xF3 0x0F 0x12 /r"/"RM"
{
ND_INS_MOVSLDUP, ND_CAT_DATAXFER, ND_SET_SSE3, 443,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:694 Instruction:"MOVSQ Yv,Xv" Encoding:"ds64 0xA5"/""
{
ND_INS_MOVS, ND_CAT_STRINGOP, ND_SET_I86, 444,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:695 Instruction:"MOVSQ Yv,Xv" Encoding:"rep ds64 0xA5"/""
{
ND_INS_MOVS, ND_CAT_STRINGOP, ND_SET_I86, 444,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 4), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CW, 0, 0),
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:696 Instruction:"MOVSS Vss,Wss" Encoding:"0xF3 0x0F 0x10 /r"/"RM"
{
ND_INS_MOVSS, ND_CAT_DATAXFER, ND_SET_SSE, 445,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:697 Instruction:"MOVSS Wss,Vss" Encoding:"0xF3 0x0F 0x11 /r"/"MR"
{
ND_INS_MOVSS, ND_CAT_DATAXFER, ND_SET_SSE, 445,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:698 Instruction:"MOVSW Yv,Xv" Encoding:"ds16 0xA5"/""
{
ND_INS_MOVS, ND_CAT_STRINGOP, ND_SET_I86, 446,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:699 Instruction:"MOVSW Yv,Xv" Encoding:"rep ds16 0xA5"/""
{
ND_INS_MOVS, ND_CAT_STRINGOP, ND_SET_I86, 446,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 4), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CW, 0, 0),
OP(ND_OPT_X, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:700 Instruction:"MOVSX Gv,Eb" Encoding:"0x0F 0xBE /r"/"RM"
{
ND_INS_MOVSX, ND_CAT_DATAXFER, ND_SET_I386, 447,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:701 Instruction:"MOVSX Gv,Ew" Encoding:"0x0F 0xBF /r"/"RM"
{
ND_INS_MOVSX, ND_CAT_DATAXFER, ND_SET_I386, 447,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:702 Instruction:"MOVSXD Gv,Ez" Encoding:"o64 0x63 /r"/"RM"
{
ND_INS_MOVSXD, ND_CAT_DATAXFER, ND_SET_LONGMODE, 448,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_O64, 0,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_z, ND_OPF_R, 0, 0),
},
// Pos:703 Instruction:"MOVUPD Vpd,Wpd" Encoding:"0x66 0x0F 0x10 /r"/"RM"
{
ND_INS_MOVUPD, ND_CAT_DATAXFER, ND_SET_SSE2, 449,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:704 Instruction:"MOVUPD Wpd,Vpd" Encoding:"0x66 0x0F 0x11 /r"/"MR"
{
ND_INS_MOVUPD, ND_CAT_DATAXFER, ND_SET_SSE2, 449,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:705 Instruction:"MOVUPS Vps,Wps" Encoding:"NP 0x0F 0x10 /r"/"RM"
{
ND_INS_MOVUPS, ND_CAT_DATAXFER, ND_SET_SSE, 450,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:706 Instruction:"MOVUPS Wps,Vps" Encoding:"NP 0x0F 0x11 /r"/"MR"
{
ND_INS_MOVUPS, ND_CAT_DATAXFER, ND_SET_SSE, 450,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:707 Instruction:"MOVZX Gv,Eb" Encoding:"0x0F 0xB6 /r"/"RM"
{
ND_INS_MOVZX, ND_CAT_DATAXFER, ND_SET_I386, 451,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:708 Instruction:"MOVZX Gv,Ew" Encoding:"0x0F 0xB7 /r"/"RM"
{
ND_INS_MOVZX, ND_CAT_DATAXFER, ND_SET_I386, 451,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:709 Instruction:"MPSADBW Vdq,Wdq,Ib" Encoding:"0x66 0x0F 0x3A 0x42 /r ib"/"RMI"
{
ND_INS_MPSADBW, ND_CAT_SSE, ND_SET_SSE4, 452,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:710 Instruction:"MUL Eb" Encoding:"0xF6 /4"/"M"
{
ND_INS_MUL, ND_CAT_ARITH, ND_SET_I86, 453,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:711 Instruction:"MUL Ev" Encoding:"0xF7 /4"/"M"
{
ND_INS_MUL, ND_CAT_ARITH, ND_SET_I86, 453,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:712 Instruction:"MULPD Vpd,Wpd" Encoding:"0x66 0x0F 0x59 /r"/"RM"
{
ND_INS_MULPD, ND_CAT_SSE, ND_SET_SSE2, 454,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:713 Instruction:"MULPS Vps,Wps" Encoding:"NP 0x0F 0x59 /r"/"RM"
{
ND_INS_MULPS, ND_CAT_SSE, ND_SET_SSE, 455,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:714 Instruction:"MULSD Vsd,Wsd" Encoding:"0xF2 0x0F 0x59 /r"/"RM"
{
ND_INS_MULSD, ND_CAT_SSE, ND_SET_SSE2, 456,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:715 Instruction:"MULSS Vss,Wss" Encoding:"0xF3 0x0F 0x59 /r"/"RM"
{
ND_INS_MULSS, ND_CAT_SSE, ND_SET_SSE, 457,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:716 Instruction:"MULX Gy,By,Ey" Encoding:"vex m:2 p:3 l:0 w:x 0xF6 /r"/"RVM"
{
ND_INS_MULX, ND_CAT_BMI2, ND_SET_BMI2, 458,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 1), 0, ND_EXT_13, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI2,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_B, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_y, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:717 Instruction:"MWAIT" Encoding:"NP 0x0F 0x01 /0xC9"/""
{
ND_INS_MWAIT, ND_CAT_MISC, ND_SET_SSE3, 459,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MONITOR,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:718 Instruction:"MWAITX" Encoding:"NP 0x0F 0x01 /0xFB"/""
{
ND_INS_MWAITX, ND_CAT_SYSTEM, ND_SET_MWAITT, 460,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rBX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:719 Instruction:"NEG Eb" Encoding:"0xF6 /3"/"M"
{
ND_INS_NEG, ND_CAT_LOGIC, ND_SET_I86, 461,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:720 Instruction:"NEG Ev" Encoding:"0xF7 /3"/"M"
{
ND_INS_NEG, ND_CAT_LOGIC, ND_SET_I86, 461,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:721 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x0D /0:reg"/"MR"
{
ND_INS_NOP, ND_CAT_NOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:722 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x0D /1:reg"/"MR"
{
ND_INS_NOP, ND_CAT_NOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:723 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x0D /2:reg"/"MR"
{
ND_INS_NOP, ND_CAT_NOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:724 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x0D /3:reg"/"MR"
{
ND_INS_NOP, ND_CAT_NOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:725 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x0D /4:reg"/"MR"
{
ND_INS_NOP, ND_CAT_NOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:726 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x0D /5:reg"/"MR"
{
ND_INS_NOP, ND_CAT_NOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:727 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x0D /6:reg"/"MR"
{
ND_INS_NOP, ND_CAT_NOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:728 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x0D /7:reg"/"MR"
{
ND_INS_NOP, ND_CAT_NOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:729 Instruction:"NOP Ev" Encoding:"0x0F 0x18 /0:reg"/"M"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:730 Instruction:"NOP Ev" Encoding:"0x0F 0x18 /1:reg"/"M"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:731 Instruction:"NOP Ev" Encoding:"0x0F 0x18 /2:reg"/"M"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:732 Instruction:"NOP Ev" Encoding:"0x0F 0x18 /3:reg"/"M"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:733 Instruction:"NOP Ev" Encoding:"0x0F 0x18 /4"/"M"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:734 Instruction:"NOP Ev" Encoding:"0x0F 0x18 /5"/"M"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:735 Instruction:"NOP Ev" Encoding:"0x0F 0x18 /6"/"M"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:736 Instruction:"NOP Ev" Encoding:"0x0F 0x18 /7"/"M"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:737 Instruction:"NOP Ev" Encoding:"0x0F 0x19 /r"/"M"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:738 Instruction:"NOP Gv,Ev" Encoding:"0x0F 0x1A /r:reg"/"RM"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:739 Instruction:"NOP Gv,Ev" Encoding:"0x0F 0x1B /r:reg"/"RM"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:740 Instruction:"NOP Gv,Ev" Encoding:"0xF3 0x0F 0x1B /r:reg"/"RM"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:741 Instruction:"NOP Ev,Gv" Encoding:"0x66 0x0F 0x1C /0:mem"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:742 Instruction:"NOP Ev,Gv" Encoding:"0xF3 0x0F 0x1C /0:mem"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:743 Instruction:"NOP Ev,Gv" Encoding:"0xF2 0x0F 0x1C /0:mem"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:744 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x1C /0:reg"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:745 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x1C /1"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:746 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x1C /2"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:747 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x1C /3"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:748 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x1C /4"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:749 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x1C /5"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:750 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x1C /6"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:751 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x1C /7"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:752 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x1D /r"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:753 Instruction:"NOP Mv,Gv" Encoding:"0x0F 0x1E /r:mem"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:754 Instruction:"NOP Rv,Gv" Encoding:"0x0F 0x1E /0:reg"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:755 Instruction:"NOP Rv,Gv" Encoding:"0x0F 0x1E /1:reg"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:756 Instruction:"NOP Rv,Gv" Encoding:"rexw 0x0F 0x1E /1:reg"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:757 Instruction:"NOP Rv,Gv" Encoding:"0x0F 0x1E /2:reg"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:758 Instruction:"NOP Rv,Gv" Encoding:"0x0F 0x1E /3:reg"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:759 Instruction:"NOP Rv,Gv" Encoding:"0x0F 0x1E /4:reg"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:760 Instruction:"NOP Rv,Gv" Encoding:"0x0F 0x1E /5:reg"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:761 Instruction:"NOP Rv,Gv" Encoding:"0x0F 0x1E /6:reg"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:762 Instruction:"NOP Rv,Gv" Encoding:"0x0F 0x1E /0xF8"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:763 Instruction:"NOP Rv,Gv" Encoding:"0x0F 0x1E /0xF9"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:764 Instruction:"NOP Rv,Gv" Encoding:"0x0F 0x1E /0xFA"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:765 Instruction:"NOP Rv,Gv" Encoding:"0x0F 0x1E /0xFB"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:766 Instruction:"NOP Rv,Gv" Encoding:"0x0F 0x1E /0xFC"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:767 Instruction:"NOP Rv,Gv" Encoding:"0x0F 0x1E /0xFD"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:768 Instruction:"NOP Rv,Gv" Encoding:"0x0F 0x1E /0xFE"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:769 Instruction:"NOP Rv,Gv" Encoding:"0x0F 0x1E /0xFF"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:770 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x1F /r"/"MR"
{
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
},
// Pos:771 Instruction:"NOP" Encoding:"0x90"/""
{
ND_INS_NOP, ND_CAT_NOP, ND_SET_I86, 462,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
},
// Pos:772 Instruction:"NOT Eb" Encoding:"0xF6 /2"/"M"
{
ND_INS_NOT, ND_CAT_LOGIC, ND_SET_I86, 463,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
},
// Pos:773 Instruction:"NOT Ev" Encoding:"0xF7 /2"/"M"
{
ND_INS_NOT, ND_CAT_LOGIC, ND_SET_I86, 463,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
},
// Pos:774 Instruction:"OR Eb,Gb" Encoding:"0x08 /r"/"MR"
{
ND_INS_OR, ND_CAT_LOGIC, ND_SET_I86, 464,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:775 Instruction:"OR Ev,Gv" Encoding:"0x09 /r"/"MR"
{
ND_INS_OR, ND_CAT_LOGIC, ND_SET_I86, 464,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:776 Instruction:"OR Gb,Eb" Encoding:"0x0A /r"/"RM"
{
ND_INS_OR, ND_CAT_LOGIC, ND_SET_I86, 464,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_G, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:777 Instruction:"OR Gv,Ev" Encoding:"0x0B /r"/"RM"
{
ND_INS_OR, ND_CAT_LOGIC, ND_SET_I86, 464,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:778 Instruction:"OR AL,Ib" Encoding:"0x0C ib"/"I"
{
ND_INS_OR, ND_CAT_LOGIC, ND_SET_I86, 464,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:779 Instruction:"OR rAX,Iz" Encoding:"0x0D iz"/"I"
{
ND_INS_OR, ND_CAT_LOGIC, ND_SET_I86, 464,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:780 Instruction:"OR Eb,Ib" Encoding:"0x80 /1 ib"/"MI"
{
ND_INS_OR, ND_CAT_LOGIC, ND_SET_I86, 464,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:781 Instruction:"OR Ev,Iz" Encoding:"0x81 /1 iz"/"MI"
{
ND_INS_OR, ND_CAT_LOGIC, ND_SET_I86, 464,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:782 Instruction:"OR Ev,Iz" Encoding:"0x82 /1 iz"/"MI"
{
ND_INS_OR, ND_CAT_LOGIC, ND_SET_I86, 464,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_I64, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:783 Instruction:"OR Ev,Ib" Encoding:"0x83 /1 ib"/"MI"
{
ND_INS_OR, ND_CAT_LOGIC, ND_SET_I86, 464,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:784 Instruction:"ORPD Vpd,Wpd" Encoding:"0x66 0x0F 0x56 /r"/"RM"
{
ND_INS_ORPD, ND_CAT_LOGICAL_FP, ND_SET_SSE2, 465,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:785 Instruction:"ORPS Vps,Wps" Encoding:"NP 0x0F 0x56 /r"/"RM"
{
ND_INS_ORPS, ND_CAT_LOGICAL_FP, ND_SET_SSE, 466,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:786 Instruction:"OUT Ib,AL" Encoding:"0xE6 ib"/"I"
{
ND_INS_OUT, ND_CAT_IO, ND_SET_I86, 467,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL, 0,
0|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:787 Instruction:"OUT Ib,eAX" Encoding:"0xE7 ib"/"I"
{
ND_INS_OUT, ND_CAT_IO, ND_SET_I86, 467,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL, 0,
0|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:788 Instruction:"OUT DX,AL" Encoding:"0xEE"/""
{
ND_INS_OUT, ND_CAT_IO, ND_SET_I86, 467,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL, 0,
0|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_GPR_rDX, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:789 Instruction:"OUT DX,eAX" Encoding:"0xEF"/""
{
ND_INS_OUT, ND_CAT_IO, ND_SET_I86, 467,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL, 0,
0|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_GPR_rDX, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:790 Instruction:"OUTSB DX,Xb" Encoding:"0x6E"/""
{
ND_INS_OUTS, ND_CAT_IOSTRINGOP, ND_SET_I86, 468,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
ND_PREF_REP, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL, 0,
0|REG_RFLAG_DF|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_GPR_rDX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_X, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:791 Instruction:"OUTSB DX,Xb" Encoding:"rep 0x6E"/""
{
ND_INS_OUTS, ND_CAT_IOSTRINGOP, ND_SET_I86, 468,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
ND_PREF_REP, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL, 0,
0|REG_RFLAG_DF|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_GPR_rDX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_X, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:792 Instruction:"OUTSD DX,Xz" Encoding:"0x6F"/""
{
ND_INS_OUTS, ND_CAT_IOSTRINGOP, ND_SET_I86, 469,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
ND_PREF_REP, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL, 0,
0|REG_RFLAG_DF|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_GPR_rDX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_X, ND_OPS_z, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:793 Instruction:"OUTSD DX,Xz" Encoding:"rep 0x6F"/""
{
ND_INS_OUTS, ND_CAT_IOSTRINGOP, ND_SET_I86, 469,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
ND_PREF_REP, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL, 0,
0|REG_RFLAG_DF|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_GPR_rDX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_X, ND_OPS_z, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:794 Instruction:"OUTSW DX,Xz" Encoding:"ds16 0x6F"/""
{
ND_INS_OUTS, ND_CAT_IOSTRINGOP, ND_SET_I86, 470,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
ND_PREF_REP, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL, 0,
0|REG_RFLAG_DF|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_GPR_rDX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_X, ND_OPS_z, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:795 Instruction:"OUTSW DX,Xz" Encoding:"rep ds16 0x6F"/""
{
ND_INS_OUTS, ND_CAT_IOSTRINGOP, ND_SET_I86, 470,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
ND_PREF_REP, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL, 0,
0|REG_RFLAG_DF|REG_RFLAG_IOPL|REG_RFLAG_VM,
0,
0,
0,
OP(ND_OPT_GPR_rDX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_X, ND_OPS_z, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rSI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:796 Instruction:"PABSB Pq,Qq" Encoding:"NP 0x0F 0x38 0x1C /r"/"RM"
{
ND_INS_PABSB, ND_CAT_MMX, ND_SET_SSSE3, 471,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:797 Instruction:"PABSB Vx,Wx" Encoding:"0x66 0x0F 0x38 0x1C /r"/"RM"
{
ND_INS_PABSB, ND_CAT_SSE, ND_SET_SSSE3, 471,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:798 Instruction:"PABSD Pq,Qq" Encoding:"NP 0x0F 0x38 0x1E /r"/"RM"
{
ND_INS_PABSD, ND_CAT_MMX, ND_SET_SSSE3, 472,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:799 Instruction:"PABSD Vx,Wx" Encoding:"0x66 0x0F 0x38 0x1E /r"/"RM"
{
ND_INS_PABSD, ND_CAT_SSE, ND_SET_SSSE3, 472,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:800 Instruction:"PABSW Pq,Qq" Encoding:"NP 0x0F 0x38 0x1D /r"/"RM"
{
ND_INS_PABSW, ND_CAT_MMX, ND_SET_SSSE3, 473,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:801 Instruction:"PABSW Vx,Wx" Encoding:"0x66 0x0F 0x38 0x1D /r"/"RM"
{
ND_INS_PABSW, ND_CAT_SSE, ND_SET_SSSE3, 473,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:802 Instruction:"PACKSSDW Pq,Qq" Encoding:"NP 0x0F 0x6B /r"/"RM"
{
ND_INS_PACKSSDW, ND_CAT_MMX, ND_SET_MMX, 474,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:803 Instruction:"PACKSSDW Vx,Wx" Encoding:"0x66 0x0F 0x6B /r"/"RM"
{
ND_INS_PACKSSDW, ND_CAT_SSE, ND_SET_SSE2, 474,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:804 Instruction:"PACKSSWB Pq,Qq" Encoding:"NP 0x0F 0x63 /r"/"RM"
{
ND_INS_PACKSSWB, ND_CAT_MMX, ND_SET_MMX, 475,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:805 Instruction:"PACKSSWB Vx,Wx" Encoding:"0x66 0x0F 0x63 /r"/"RM"
{
ND_INS_PACKSSWB, ND_CAT_SSE, ND_SET_SSE2, 475,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:806 Instruction:"PACKUSDW Vx,Wx" Encoding:"0x66 0x0F 0x38 0x2B /r"/"RM"
{
ND_INS_PACKUSDW, ND_CAT_SSE, ND_SET_SSE4, 476,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:807 Instruction:"PACKUSWB Pq,Qq" Encoding:"NP 0x0F 0x67 /r"/"RM"
{
ND_INS_PACKUSWB, ND_CAT_MMX, ND_SET_MMX, 477,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:808 Instruction:"PACKUSWB Vx,Wx" Encoding:"0x66 0x0F 0x67 /r"/"RM"
{
ND_INS_PACKUSWB, ND_CAT_SSE, ND_SET_SSE2, 477,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:809 Instruction:"PADDB Pq,Qq" Encoding:"NP 0x0F 0xFC /r"/"RM"
{
ND_INS_PADDB, ND_CAT_MMX, ND_SET_MMX, 478,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:810 Instruction:"PADDB Vx,Wx" Encoding:"0x66 0x0F 0xFC /r"/"RM"
{
ND_INS_PADDB, ND_CAT_SSE, ND_SET_SSE2, 478,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:811 Instruction:"PADDD Pq,Qq" Encoding:"NP 0x0F 0xFE /r"/"RM"
{
ND_INS_PADDD, ND_CAT_MMX, ND_SET_MMX, 479,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:812 Instruction:"PADDD Vx,Wx" Encoding:"0x66 0x0F 0xFE /r"/"RM"
{
ND_INS_PADDD, ND_CAT_SSE, ND_SET_SSE2, 479,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:813 Instruction:"PADDQ Pq,Qq" Encoding:"NP 0x0F 0xD4 /r"/"RM"
{
ND_INS_PADDQ, ND_CAT_MMX, ND_SET_SSE2, 480,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:814 Instruction:"PADDQ Vx,Wx" Encoding:"0x66 0x0F 0xD4 /r"/"RM"
{
ND_INS_PADDQ, ND_CAT_SSE, ND_SET_SSE2, 480,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:815 Instruction:"PADDSB Pq,Qq" Encoding:"NP 0x0F 0xEC /r"/"RM"
{
ND_INS_PADDSB, ND_CAT_MMX, ND_SET_MMX, 481,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:816 Instruction:"PADDSB Vx,Wx" Encoding:"0x66 0x0F 0xEC /r"/"RM"
{
ND_INS_PADDSB, ND_CAT_SSE, ND_SET_SSE2, 481,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:817 Instruction:"PADDSW Pq,Qq" Encoding:"NP 0x0F 0xED /r"/"RM"
{
ND_INS_PADDSW, ND_CAT_MMX, ND_SET_MMX, 482,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:818 Instruction:"PADDSW Vx,Wx" Encoding:"0x66 0x0F 0xED /r"/"RM"
{
ND_INS_PADDSW, ND_CAT_SSE, ND_SET_SSE2, 482,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:819 Instruction:"PADDUSB Pq,Qq" Encoding:"NP 0x0F 0xDC /r"/"RM"
{
ND_INS_PADDUSB, ND_CAT_MMX, ND_SET_MMX, 483,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:820 Instruction:"PADDUSB Vx,Wx" Encoding:"0x66 0x0F 0xDC /r"/"RM"
{
ND_INS_PADDUSB, ND_CAT_SSE, ND_SET_SSE2, 483,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:821 Instruction:"PADDUSW Pq,Qq" Encoding:"NP 0x0F 0xDD /r"/"RM"
{
ND_INS_PADDUSW, ND_CAT_MMX, ND_SET_MMX, 484,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:822 Instruction:"PADDUSW Vx,Wx" Encoding:"0x66 0x0F 0xDD /r"/"RM"
{
ND_INS_PADDUSW, ND_CAT_SSE, ND_SET_SSE2, 484,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:823 Instruction:"PADDW Pq,Qq" Encoding:"NP 0x0F 0xFD /r"/"RM"
{
ND_INS_PADDW, ND_CAT_MMX, ND_SET_MMX, 485,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:824 Instruction:"PADDW Vx,Wx" Encoding:"0x66 0x0F 0xFD /r"/"RM"
{
ND_INS_PADDW, ND_CAT_SSE, ND_SET_SSE2, 485,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:825 Instruction:"PALIGNR Pq,Qq,Ib" Encoding:"NP 0x0F 0x3A 0x0F /r ib"/"RMI"
{
ND_INS_PALIGNR, ND_CAT_MMX, ND_SET_SSSE3, 486,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:826 Instruction:"PALIGNR Vx,Wx,Ib" Encoding:"0x66 0x0F 0x3A 0x0F /r ib"/"RMI"
{
ND_INS_PALIGNR, ND_CAT_SSE, ND_SET_SSSE3, 486,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:827 Instruction:"PAND Pq,Qq" Encoding:"NP 0x0F 0xDB /r"/"RM"
{
ND_INS_PAND, ND_CAT_LOGICAL, ND_SET_MMX, 487,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:828 Instruction:"PAND Vx,Wx" Encoding:"0x66 0x0F 0xDB /r"/"RM"
{
ND_INS_PAND, ND_CAT_LOGICAL, ND_SET_SSE2, 487,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:829 Instruction:"PANDN Pq,Qq" Encoding:"NP 0x0F 0xDF /r"/"RM"
{
ND_INS_PANDN, ND_CAT_LOGICAL, ND_SET_MMX, 488,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:830 Instruction:"PANDN Vx,Wx" Encoding:"0x66 0x0F 0xDF /r"/"RM"
{
ND_INS_PANDN, ND_CAT_LOGICAL, ND_SET_SSE2, 488,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:831 Instruction:"PAUSE" Encoding:"a0xF3 0x90"/""
{
ND_INS_PAUSE, ND_CAT_MISC, ND_SET_PAUSE, 489,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
},
// Pos:832 Instruction:"PAVGB Pq,Qq" Encoding:"NP 0x0F 0xE0 /r"/"RM"
{
ND_INS_PAVGB, ND_CAT_MMX, ND_SET_MMX, 490,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:833 Instruction:"PAVGB Vx,Wx" Encoding:"0x66 0x0F 0xE0 /r"/"RM"
{
ND_INS_PAVGB, ND_CAT_SSE, ND_SET_SSE2, 490,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:834 Instruction:"PAVGUSB Pq,Qq" Encoding:"0x0F 0x0F /r 0xBF"/"RM"
{
ND_INS_PAVGUSB, ND_CAT_3DNOW, ND_SET_3DNOW, 491,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:835 Instruction:"PAVGW Pq,Qq" Encoding:"NP 0x0F 0xE3 /r"/"RM"
{
ND_INS_PAVGW, ND_CAT_MMX, ND_SET_MMX, 492,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:836 Instruction:"PAVGW Vx,Wx" Encoding:"0x66 0x0F 0xE3 /r"/"RM"
{
ND_INS_PAVGW, ND_CAT_SSE, ND_SET_SSE2, 492,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:837 Instruction:"PBLENDVB Vdq,Wdq" Encoding:"0x66 0x0F 0x38 0x10 /r"/"RM"
{
ND_INS_PBLENDVB, ND_CAT_SSE, ND_SET_SSE4, 493,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_SSE_XMM0, ND_OPS_dq, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:838 Instruction:"PBLENDW Vx,Wx,Ib" Encoding:"0x66 0x0F 0x3A 0x0E /r ib"/"RMI"
{
ND_INS_PBLENDW, ND_CAT_SSE, ND_SET_SSE4, 494,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:839 Instruction:"PCLMULQDQ Vdq,Wdq,Ib" Encoding:"0x66 0x0F 0x3A 0x44 /r ib"/"RMI"
{
ND_INS_PCLMULQDQ, ND_CAT_PCLMULQDQ, ND_SET_PCLMULQDQ, 495,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_PCLMULQDQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:840 Instruction:"PCMPEQB Pq,Qq" Encoding:"NP 0x0F 0x74 /r"/"RM"
{
ND_INS_PCMPEQB, ND_CAT_MMX, ND_SET_MMX, 496,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:841 Instruction:"PCMPEQB Vx,Wx" Encoding:"0x66 0x0F 0x74 /r"/"RM"
{
ND_INS_PCMPEQB, ND_CAT_SSE, ND_SET_SSE2, 496,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:842 Instruction:"PCMPEQD Pq,Qq" Encoding:"NP 0x0F 0x76 /r"/"RM"
{
ND_INS_PCMPEQD, ND_CAT_MMX, ND_SET_MMX, 497,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:843 Instruction:"PCMPEQD Vx,Wx" Encoding:"0x66 0x0F 0x76 /r"/"RM"
{
ND_INS_PCMPEQD, ND_CAT_SSE, ND_SET_SSE2, 497,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:844 Instruction:"PCMPEQQ Vx,Wx" Encoding:"0x66 0x0F 0x38 0x29 /r"/"RM"
{
ND_INS_PCMPEQQ, ND_CAT_SSE, ND_SET_SSE4, 498,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:845 Instruction:"PCMPEQW Pq,Qq" Encoding:"NP 0x0F 0x75 /r"/"RM"
{
ND_INS_PCMPEQW, ND_CAT_MMX, ND_SET_MMX, 499,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:846 Instruction:"PCMPEQW Vx,Wx" Encoding:"0x66 0x0F 0x75 /r"/"RM"
{
ND_INS_PCMPEQW, ND_CAT_SSE, ND_SET_SSE2, 499,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:847 Instruction:"PCMPESTRI Vdq,Wdq,Ib" Encoding:"0x66 0x0F 0x3A 0x61 /r ib"/"RMI"
{
ND_INS_PCMPESTRI, ND_CAT_SSE, ND_SET_SSE42, 500,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 4), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE42,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_y, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_y, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_y, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:848 Instruction:"PCMPESTRM Vdq,Wdq,Ib" Encoding:"0x66 0x0F 0x3A 0x60 /r ib"/"RMI"
{
ND_INS_PCMPESTRM, ND_CAT_SSE, ND_SET_SSE42, 501,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 4), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE42,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_y, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_y, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_SSE_XMM0, ND_OPS_dq, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:849 Instruction:"PCMPGTB Pq,Qq" Encoding:"NP 0x0F 0x64 /r"/"RM"
{
ND_INS_PCMPGTB, ND_CAT_MMX, ND_SET_MMX, 502,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:850 Instruction:"PCMPGTB Vx,Wx" Encoding:"0x66 0x0F 0x64 /r"/"RM"
{
ND_INS_PCMPGTB, ND_CAT_SSE, ND_SET_SSE2, 502,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:851 Instruction:"PCMPGTD Pq,Qq" Encoding:"NP 0x0F 0x66 /r"/"RM"
{
ND_INS_PCMPGTD, ND_CAT_MMX, ND_SET_MMX, 503,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:852 Instruction:"PCMPGTD Vx,Wx" Encoding:"0x66 0x0F 0x66 /r"/"RM"
{
ND_INS_PCMPGTD, ND_CAT_SSE, ND_SET_SSE2, 503,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:853 Instruction:"PCMPGTQ Vx,Wx" Encoding:"0x66 0x0F 0x38 0x37 /r"/"RM"
{
ND_INS_PCMPGTQ, ND_CAT_SSE, ND_SET_SSE42, 504,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE42,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:854 Instruction:"PCMPGTW Pq,Qq" Encoding:"NP 0x0F 0x65 /r"/"RM"
{
ND_INS_PCMPGTW, ND_CAT_MMX, ND_SET_MMX, 505,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:855 Instruction:"PCMPGTW Vx,Wx" Encoding:"0x66 0x0F 0x65 /r"/"RM"
{
ND_INS_PCMPGTW, ND_CAT_SSE, ND_SET_SSE2, 505,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:856 Instruction:"PCMPISTRI Vdq,Wdq,Ib" Encoding:"0x66 0x0F 0x3A 0x63 /r ib"/"RMI"
{
ND_INS_PCMPISTRI, ND_CAT_SSE, ND_SET_SSE42, 506,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 2), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE42,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_y, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:857 Instruction:"PCMPISTRM Vdq,Wdq,Ib" Encoding:"0x66 0x0F 0x3A 0x62 /r ib"/"RMI"
{
ND_INS_PCMPISTRM, ND_CAT_SSE, ND_SET_SSE42, 507,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 2), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE42,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_SSE_XMM0, ND_OPS_dq, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:858 Instruction:"PCOMMIT" Encoding:"0x66 0x0F 0xAE /7:reg"/""
{
ND_INS_PCOMMIT, ND_CAT_MISC, ND_SET_PCOMMIT, 508,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_PCOMMIT,
0,
0,
0,
0,
},
// Pos:859 Instruction:"PCONFIG" Encoding:"NP 0x0F 0x01 /0xC5"/""
{
ND_INS_PCONFIG, ND_CAT_PCONFIG, ND_SET_PCONFIG, 509,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_PCONFIG,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rBX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:860 Instruction:"PDEP Gy,By,Ey" Encoding:"vex m:2 p:3 l:0 w:x 0xF5 /r"/"RVM"
{
ND_INS_PDEP, ND_CAT_BMI2, ND_SET_BMI2, 510,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_13, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI2,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_B, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:861 Instruction:"PEXT Gy,By,Ey" Encoding:"vex m:2 p:2 l:0 w:x 0xF5 /r"/"RVM"
{
ND_INS_PEXT, ND_CAT_BMI2, ND_SET_BMI2, 511,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_13, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI2,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_B, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:862 Instruction:"PEXTRB Mb,Vdq,Ib" Encoding:"0x66 0x0F 0x3A 0x14 /r:mem ib"/"MRI"
{
ND_INS_PEXTRB, ND_CAT_SSE, ND_SET_SSE4, 512,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:863 Instruction:"PEXTRB Rd,Vdq,Ib" Encoding:"0x66 0x0F 0x3A 0x14 /r:reg ib"/"MRI"
{
ND_INS_PEXTRB, ND_CAT_SSE, ND_SET_SSE4, 512,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:864 Instruction:"PEXTRD Ey,Vdq,Ib" Encoding:"0x66 0x0F 0x3A 0x16 /r ib"/"MRI"
{
ND_INS_PEXTRD, ND_CAT_SSE, ND_SET_SSE4, 513,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:865 Instruction:"PEXTRQ Ey,Vdq,Ib" Encoding:"rexw 0x66 0x0F 0x3A 0x16 /r ib"/"MRI"
{
ND_INS_PEXTRQ, ND_CAT_SSE, ND_SET_SSE4, 514,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:866 Instruction:"PEXTRW Gy,Nq,Ib" Encoding:"NP 0x0F 0xC5 /r:reg ib"/"RMI"
{
ND_INS_PEXTRW, ND_CAT_MMX, ND_SET_MMX, 515,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_N, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:867 Instruction:"PEXTRW Gy,Udq,Ib" Encoding:"0x66 0x0F 0xC5 /r:reg ib"/"RMI"
{
ND_INS_PEXTRW, ND_CAT_SSE, ND_SET_SSE2, 515,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:868 Instruction:"PEXTRW Mw,Vdq,Ib" Encoding:"0x66 0x0F 0x3A 0x15 /r:mem ib"/"MRI"
{
ND_INS_PEXTRW, ND_CAT_SSE, ND_SET_SSE4, 515,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:869 Instruction:"PEXTRW Rd,Vdq,Ib" Encoding:"0x66 0x0F 0x3A 0x15 /r:reg ib"/"MRI"
{
ND_INS_PEXTRW, ND_CAT_SSE, ND_SET_SSE4, 515,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:870 Instruction:"PF2ID Pq,Qq" Encoding:"0x0F 0x0F /r 0x1D"/"RM"
{
ND_INS_PF2ID, ND_CAT_3DNOW, ND_SET_3DNOW, 516,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:871 Instruction:"PF2IW Pq,Qq" Encoding:"0x0F 0x0F /r 0x1C"/"RM"
{
ND_INS_PF2IW, ND_CAT_3DNOW, ND_SET_3DNOW, 517,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:872 Instruction:"PFACC Pq,Qq" Encoding:"0x0F 0x0F /r 0xAE"/"RM"
{
ND_INS_PFACC, ND_CAT_3DNOW, ND_SET_3DNOW, 518,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:873 Instruction:"PFADD Pq,Qq" Encoding:"0x0F 0x0F /r 0x9E"/"RM"
{
ND_INS_PFADD, ND_CAT_3DNOW, ND_SET_3DNOW, 519,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:874 Instruction:"PFCMPEQ Pq,Qq" Encoding:"0x0F 0x0F /r 0xB0"/"RM"
{
ND_INS_PFCMPEQ, ND_CAT_3DNOW, ND_SET_3DNOW, 520,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:875 Instruction:"PFCMPGE Pq,Qq" Encoding:"0x0F 0x0F /r 0x90"/"RM"
{
ND_INS_PFCMPGE, ND_CAT_3DNOW, ND_SET_3DNOW, 521,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:876 Instruction:"PFCMPGT Pq,Qq" Encoding:"0x0F 0x0F /r 0xA0"/"RM"
{
ND_INS_PFCMPGT, ND_CAT_3DNOW, ND_SET_3DNOW, 522,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:877 Instruction:"PFMAX Pq,Qq" Encoding:"0x0F 0x0F /r 0xA4"/"RM"
{
ND_INS_PFMAX, ND_CAT_3DNOW, ND_SET_3DNOW, 523,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:878 Instruction:"PFMIN Pq,Qq" Encoding:"0x0F 0x0F /r 0x94"/"RM"
{
ND_INS_PFMIN, ND_CAT_3DNOW, ND_SET_3DNOW, 524,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:879 Instruction:"PFMIN Pq,Qq" Encoding:"0x0F 0x0F /r 0x96"/"RM"
{
ND_INS_PFMIN, ND_CAT_3DNOW, ND_SET_3DNOW, 524,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:880 Instruction:"PFMUL Pq,Qq" Encoding:"0x0F 0x0F /r 0xB4"/"RM"
{
ND_INS_PFMUL, ND_CAT_3DNOW, ND_SET_3DNOW, 525,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:881 Instruction:"PFNACC Pq,Qq" Encoding:"0x0F 0x0F /r 0x8A"/"RM"
{
ND_INS_PFNACC, ND_CAT_3DNOW, ND_SET_3DNOW, 526,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:882 Instruction:"PFPNACC Pq,Qq" Encoding:"0x0F 0x0F /r 0x8E"/"RM"
{
ND_INS_PFPNACC, ND_CAT_3DNOW, ND_SET_3DNOW, 527,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:883 Instruction:"PFRCPIT1 Pq,Qq" Encoding:"0x0F 0x0F /r 0xA6"/"RM"
{
ND_INS_PFRCPIT1, ND_CAT_3DNOW, ND_SET_3DNOW, 528,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:884 Instruction:"PFRCPIT2 Pq,Qq" Encoding:"0x0F 0x0F /r 0xB6"/"RM"
{
ND_INS_PFRCPIT2, ND_CAT_3DNOW, ND_SET_3DNOW, 529,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:885 Instruction:"PFRCPV Pq,Qq" Encoding:"0x0F 0x0F /r 0x86"/"RM"
{
ND_INS_PFRCPV, ND_CAT_3DNOW, ND_SET_3DNOW, 530,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:886 Instruction:"PFRSQIT1 Pq,Qq" Encoding:"0x0F 0x0F /r 0xA7"/"RM"
{
ND_INS_PFRSQIT1, ND_CAT_3DNOW, ND_SET_3DNOW, 531,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:887 Instruction:"PFRSQRT Pq,Qq" Encoding:"0x0F 0x0F /r 0x97"/"RM"
{
ND_INS_PFRSQRT, ND_CAT_3DNOW, ND_SET_3DNOW, 532,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:888 Instruction:"PFRSQRTV Pq,Qq" Encoding:"0x0F 0x0F /r 0x87"/"RM"
{
ND_INS_PFRSQRTV, ND_CAT_3DNOW, ND_SET_3DNOW, 533,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:889 Instruction:"PFSUB Pq,Qq" Encoding:"0x0F 0x0F /r 0x9A"/"RM"
{
ND_INS_PFSUB, ND_CAT_3DNOW, ND_SET_3DNOW, 534,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:890 Instruction:"PFSUBR Pq,Qq" Encoding:"0x0F 0x0F /r 0xAA"/"RM"
{
ND_INS_PFSUBR, ND_CAT_3DNOW, ND_SET_3DNOW, 535,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:891 Instruction:"PHADDD Pq,Qq" Encoding:"NP 0x0F 0x38 0x02 /r"/"RM"
{
ND_INS_PHADDD, ND_CAT_MMX, ND_SET_SSSE3, 536,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:892 Instruction:"PHADDD Vx,Wx" Encoding:"0x66 0x0F 0x38 0x02 /r"/"RM"
{
ND_INS_PHADDD, ND_CAT_SSE, ND_SET_SSSE3, 536,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:893 Instruction:"PHADDSW Pq,Qq" Encoding:"NP 0x0F 0x38 0x03 /r"/"RM"
{
ND_INS_PHADDSW, ND_CAT_MMX, ND_SET_SSSE3, 537,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:894 Instruction:"PHADDSW Vx,Wx" Encoding:"0x66 0x0F 0x38 0x03 /r"/"RM"
{
ND_INS_PHADDSW, ND_CAT_SSE, ND_SET_SSSE3, 537,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:895 Instruction:"PHADDW Pq,Qq" Encoding:"NP 0x0F 0x38 0x01 /r"/"RM"
{
ND_INS_PHADDW, ND_CAT_MMX, ND_SET_SSSE3, 538,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:896 Instruction:"PHADDW Vx,Wx" Encoding:"0x66 0x0F 0x38 0x01 /r"/"RM"
{
ND_INS_PHADDW, ND_CAT_SSE, ND_SET_SSSE3, 538,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:897 Instruction:"PHMINPOSUW Vdq,Wdq" Encoding:"0x66 0x0F 0x38 0x41 /r"/"RM"
{
ND_INS_PHMINPOSUW, ND_CAT_SSE, ND_SET_SSE4, 539,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:898 Instruction:"PHSUBD Pq,Qq" Encoding:"NP 0x0F 0x38 0x06 /r"/"RM"
{
ND_INS_PHSUBD, ND_CAT_MMX, ND_SET_SSSE3, 540,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:899 Instruction:"PHSUBD Vx,Wx" Encoding:"0x66 0x0F 0x38 0x06 /r"/"RM"
{
ND_INS_PHSUBD, ND_CAT_SSE, ND_SET_SSSE3, 540,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:900 Instruction:"PHSUBSW Pq,Qq" Encoding:"NP 0x0F 0x38 0x07 /r"/"RM"
{
ND_INS_PHSUBSW, ND_CAT_MMX, ND_SET_SSSE3, 541,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:901 Instruction:"PHSUBSW Vx,Wx" Encoding:"0x66 0x0F 0x38 0x07 /r"/"RM"
{
ND_INS_PHSUBSW, ND_CAT_SSE, ND_SET_SSSE3, 541,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:902 Instruction:"PHSUBW Pq,Qq" Encoding:"NP 0x0F 0x38 0x05 /r"/"RM"
{
ND_INS_PHSUBW, ND_CAT_MMX, ND_SET_SSSE3, 542,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:903 Instruction:"PHSUBW Vx,Wx" Encoding:"0x66 0x0F 0x38 0x05 /r"/"RM"
{
ND_INS_PHSUBW, ND_CAT_SSE, ND_SET_SSSE3, 542,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:904 Instruction:"PI2FD Pq,Qq" Encoding:"0x0F 0x0F /r 0x0D"/"RM"
{
ND_INS_PI2FD, ND_CAT_3DNOW, ND_SET_3DNOW, 543,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:905 Instruction:"PI2FW Pq,Qq" Encoding:"0x0F 0x0F /r 0x0C"/"RM"
{
ND_INS_PI2FW, ND_CAT_3DNOW, ND_SET_3DNOW, 544,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:906 Instruction:"PINSRB Vdq,Mb,Ib" Encoding:"0x66 0x0F 0x3A 0x20 /r:mem ib"/"RMI"
{
ND_INS_PINSRB, ND_CAT_SSE, ND_SET_SSE4, 545,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:907 Instruction:"PINSRB Vdq,Ry,Ib" Encoding:"0x66 0x0F 0x3A 0x20 /r:reg ib"/"RMI"
{
ND_INS_PINSRB, ND_CAT_SSE, ND_SET_SSE4, 545,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_R, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:908 Instruction:"PINSRD Vdq,Ed,Ib" Encoding:"0x66 0x0F 0x3A 0x22 /r ib"/"RMI"
{
ND_INS_PINSRD, ND_CAT_SSE, ND_SET_SSE4, 546,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:909 Instruction:"PINSRQ Vdq,Eq,Ib" Encoding:"rexw 0x66 0x0F 0x3A 0x22 /r ib"/"RMI"
{
ND_INS_PINSRQ, ND_CAT_SSE, ND_SET_SSE4, 547,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:910 Instruction:"PINSRW Pq,Rd,Ib" Encoding:"NP 0x0F 0xC4 /r:reg ib"/"RMI"
{
ND_INS_PINSRW, ND_CAT_MMX, ND_SET_MMX, 548,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_R, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:911 Instruction:"PINSRW Pq,Mw,Ib" Encoding:"NP 0x0F 0xC4 /r:mem ib"/"RMI"
{
ND_INS_PINSRW, ND_CAT_MMX, ND_SET_MMX, 548,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:912 Instruction:"PINSRW Vdq,Rd,Ib" Encoding:"0x66 0x0F 0xC4 /r:reg ib"/"RMI"
{
ND_INS_PINSRW, ND_CAT_SSE, ND_SET_SSE2, 548,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_R, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:913 Instruction:"PINSRW Vdq,Mw,Ib" Encoding:"0x66 0x0F 0xC4 /r:mem ib"/"RMI"
{
ND_INS_PINSRW, ND_CAT_SSE, ND_SET_SSE2, 548,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_M, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:914 Instruction:"PMADDUBSW Pq,Qq" Encoding:"NP 0x0F 0x38 0x04 /r"/"RM"
{
ND_INS_PMADDUBSW, ND_CAT_MMX, ND_SET_SSSE3, 549,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:915 Instruction:"PMADDUBSW Vx,Wx" Encoding:"0x66 0x0F 0x38 0x04 /r"/"RM"
{
ND_INS_PMADDUBSW, ND_CAT_SSE, ND_SET_SSSE3, 549,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:916 Instruction:"PMADDWD Pq,Qq" Encoding:"NP 0x0F 0xF5 /r"/"RM"
{
ND_INS_PMADDWD, ND_CAT_MMX, ND_SET_MMX, 550,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:917 Instruction:"PMADDWD Vx,Wx" Encoding:"0x66 0x0F 0xF5 /r"/"RM"
{
ND_INS_PMADDWD, ND_CAT_SSE, ND_SET_SSE2, 550,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:918 Instruction:"PMAXSB Vx,Wx" Encoding:"0x66 0x0F 0x38 0x3C /r"/"RM"
{
ND_INS_PMAXSB, ND_CAT_SSE, ND_SET_SSE4, 551,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:919 Instruction:"PMAXSD Vx,Wx" Encoding:"0x66 0x0F 0x38 0x3D /r"/"RM"
{
ND_INS_PMAXSD, ND_CAT_SSE, ND_SET_SSE4, 552,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:920 Instruction:"PMAXSW Pq,Qq" Encoding:"NP 0x0F 0xEE /r"/"RM"
{
ND_INS_PMAXSW, ND_CAT_MMX, ND_SET_MMX, 553,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:921 Instruction:"PMAXSW Vx,Wx" Encoding:"0x66 0x0F 0xEE /r"/"RM"
{
ND_INS_PMAXSW, ND_CAT_SSE, ND_SET_SSE2, 553,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:922 Instruction:"PMAXUB Pq,Qq" Encoding:"NP 0x0F 0xDE /r"/"RM"
{
ND_INS_PMAXUB, ND_CAT_MMX, ND_SET_MMX, 554,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:923 Instruction:"PMAXUB Vx,Wx" Encoding:"0x66 0x0F 0xDE /r"/"RM"
{
ND_INS_PMAXUB, ND_CAT_SSE, ND_SET_SSE2, 554,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:924 Instruction:"PMAXUD Vx,Wx" Encoding:"0x66 0x0F 0x38 0x3F /r"/"RM"
{
ND_INS_PMAXUD, ND_CAT_SSE, ND_SET_SSE4, 555,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:925 Instruction:"PMAXUW Vx,Wx" Encoding:"0x66 0x0F 0x38 0x3E /r"/"RM"
{
ND_INS_PMAXUW, ND_CAT_SSE, ND_SET_SSE4, 556,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:926 Instruction:"PMINSB Vx,Wx" Encoding:"0x66 0x0F 0x38 0x38 /r"/"RM"
{
ND_INS_PMINSB, ND_CAT_SSE, ND_SET_SSE4, 557,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:927 Instruction:"PMINSD Vx,Wx" Encoding:"0x66 0x0F 0x38 0x39 /r"/"RM"
{
ND_INS_PMINSD, ND_CAT_SSE, ND_SET_SSE4, 558,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:928 Instruction:"PMINSW Pq,Qq" Encoding:"NP 0x0F 0xEA /r"/"RM"
{
ND_INS_PMINSW, ND_CAT_MMX, ND_SET_MMX, 559,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:929 Instruction:"PMINSW Vx,Wx" Encoding:"0x66 0x0F 0xEA /r"/"RM"
{
ND_INS_PMINSW, ND_CAT_SSE, ND_SET_SSE2, 559,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:930 Instruction:"PMINUB Pq,Qq" Encoding:"NP 0x0F 0xDA /r"/"RM"
{
ND_INS_PMINUB, ND_CAT_MMX, ND_SET_MMX, 560,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:931 Instruction:"PMINUB Vx,Wx" Encoding:"0x66 0x0F 0xDA /r"/"RM"
{
ND_INS_PMINUB, ND_CAT_SSE, ND_SET_SSE2, 560,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:932 Instruction:"PMINUD Vx,Wx" Encoding:"0x66 0x0F 0x38 0x3B /r"/"RM"
{
ND_INS_PMINUD, ND_CAT_SSE, ND_SET_SSE4, 561,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:933 Instruction:"PMINUW Vx,Wx" Encoding:"0x66 0x0F 0x38 0x3A /r"/"RM"
{
ND_INS_PMINUW, ND_CAT_SSE, ND_SET_SSE4, 562,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:934 Instruction:"PMOVMSKB Gd,Nq" Encoding:"NP 0x0F 0xD7 /r:reg"/"RM"
{
ND_INS_PMOVMSKB, ND_CAT_MMX, ND_SET_SSE, 563,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_N, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:935 Instruction:"PMOVMSKB Gd,Ux" Encoding:"0x66 0x0F 0xD7 /r:reg"/"RM"
{
ND_INS_PMOVMSKB, ND_CAT_SSE, ND_SET_SSE2, 563,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:936 Instruction:"PMOVSXBD Vdq,Wd" Encoding:"0x66 0x0F 0x38 0x21 /r"/"RM"
{
ND_INS_PMOVSXBD, ND_CAT_SSE, ND_SET_SSE4, 564,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:937 Instruction:"PMOVSXBQ Vdq,Ww" Encoding:"0x66 0x0F 0x38 0x22 /r"/"RM"
{
ND_INS_PMOVSXBQ, ND_CAT_SSE, ND_SET_SSE4, 565,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:938 Instruction:"PMOVSXBW Vdq,Wq" Encoding:"0x66 0x0F 0x38 0x20 /r"/"RM"
{
ND_INS_PMOVSXBW, ND_CAT_SSE, ND_SET_SSE4, 566,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:939 Instruction:"PMOVSXDQ Vdq,Wq" Encoding:"0x66 0x0F 0x38 0x25 /r"/"RM"
{
ND_INS_PMOVSXDQ, ND_CAT_SSE, ND_SET_SSE4, 567,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:940 Instruction:"PMOVSXWD Vdq,Wq" Encoding:"0x66 0x0F 0x38 0x23 /r"/"RM"
{
ND_INS_PMOVSXWD, ND_CAT_SSE, ND_SET_SSE4, 568,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:941 Instruction:"PMOVSXWQ Vdq,Wd" Encoding:"0x66 0x0F 0x38 0x24 /r"/"RM"
{
ND_INS_PMOVSXWQ, ND_CAT_SSE, ND_SET_SSE4, 569,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:942 Instruction:"PMOVZXBD Vdq,Wd" Encoding:"0x66 0x0F 0x38 0x31 /r"/"RM"
{
ND_INS_PMOVZXBD, ND_CAT_SSE, ND_SET_SSE4, 570,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:943 Instruction:"PMOVZXBQ Vdq,Ww" Encoding:"0x66 0x0F 0x38 0x32 /r"/"RM"
{
ND_INS_PMOVZXBQ, ND_CAT_SSE, ND_SET_SSE4, 571,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:944 Instruction:"PMOVZXBW Vdq,Wq" Encoding:"0x66 0x0F 0x38 0x30 /r"/"RM"
{
ND_INS_PMOVZXBW, ND_CAT_SSE, ND_SET_SSE4, 572,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:945 Instruction:"PMOVZXDQ Vdq,Wq" Encoding:"0x66 0x0F 0x38 0x35 /r"/"RM"
{
ND_INS_PMOVZXDQ, ND_CAT_SSE, ND_SET_SSE4, 573,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:946 Instruction:"PMOVZXWD Vdq,Wq" Encoding:"0x66 0x0F 0x38 0x33 /r"/"RM"
{
ND_INS_PMOVZXWD, ND_CAT_SSE, ND_SET_SSE4, 574,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:947 Instruction:"PMOVZXWQ Vdq,Wd" Encoding:"0x66 0x0F 0x38 0x34 /r"/"RM"
{
ND_INS_PMOVZXWQ, ND_CAT_SSE, ND_SET_SSE4, 575,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:948 Instruction:"PMULDQ Vx,Wx" Encoding:"0x66 0x0F 0x38 0x28 /r"/"RM"
{
ND_INS_PMULDQ, ND_CAT_SSE, ND_SET_SSE4, 576,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:949 Instruction:"PMULHRSW Pq,Qq" Encoding:"NP 0x0F 0x38 0x0B /r"/"RM"
{
ND_INS_PMULHRSW, ND_CAT_MMX, ND_SET_SSSE3, 577,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:950 Instruction:"PMULHRSW Vx,Wx" Encoding:"0x66 0x0F 0x38 0x0B /r"/"RM"
{
ND_INS_PMULHRSW, ND_CAT_SSE, ND_SET_SSSE3, 577,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:951 Instruction:"PMULHRW Pq,Qq" Encoding:"0x0F 0x0F /r 0xB7"/"RM"
{
ND_INS_PMULHRW, ND_CAT_3DNOW, ND_SET_3DNOW, 578,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:952 Instruction:"PMULHUW Pq,Qq" Encoding:"NP 0x0F 0xE4 /r"/"RM"
{
ND_INS_PMULHUW, ND_CAT_MMX, ND_SET_MMX, 579,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:953 Instruction:"PMULHUW Vx,Wx" Encoding:"0x66 0x0F 0xE4 /r"/"RM"
{
ND_INS_PMULHUW, ND_CAT_SSE, ND_SET_SSE2, 579,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:954 Instruction:"PMULHW Pq,Qq" Encoding:"NP 0x0F 0xE5 /r"/"RM"
{
ND_INS_PMULHW, ND_CAT_MMX, ND_SET_MMX, 580,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:955 Instruction:"PMULHW Vx,Wx" Encoding:"0x66 0x0F 0xE5 /r"/"RM"
{
ND_INS_PMULHW, ND_CAT_SSE, ND_SET_SSE2, 580,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:956 Instruction:"PMULLD Vx,Wx" Encoding:"0x66 0x0F 0x38 0x40 /r"/"RM"
{
ND_INS_PMULLD, ND_CAT_SSE, ND_SET_SSE4, 581,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:957 Instruction:"PMULLW Pq,Qq" Encoding:"NP 0x0F 0xD5 /r"/"RM"
{
ND_INS_PMULLW, ND_CAT_MMX, ND_SET_MMX, 582,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:958 Instruction:"PMULLW Vx,Wx" Encoding:"0x66 0x0F 0xD5 /r"/"RM"
{
ND_INS_PMULLW, ND_CAT_SSE, ND_SET_SSE2, 582,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:959 Instruction:"PMULUDQ Pq,Qq" Encoding:"NP 0x0F 0xF4 /r"/"RM"
{
ND_INS_PMULUDQ, ND_CAT_MMX, ND_SET_SSE2, 583,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:960 Instruction:"PMULUDQ Vx,Wx" Encoding:"0x66 0x0F 0xF4 /r"/"RM"
{
ND_INS_PMULUDQ, ND_CAT_SSE, ND_SET_SSE2, 583,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:961 Instruction:"POP FS" Encoding:"0x0F 0xA1"/""
{
ND_INS_POP, ND_CAT_POP, ND_SET_I86, 584,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_SEG_FS, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:962 Instruction:"POP GS" Encoding:"0x0F 0xA9"/""
{
ND_INS_POP, ND_CAT_POP, ND_SET_I86, 584,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_SEG_GS, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:963 Instruction:"POP ES" Encoding:"0x07"/""
{
ND_INS_POP, ND_CAT_POP, ND_SET_I86, 584,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0,
0,
0,
OP(ND_OPT_SEG_ES, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:964 Instruction:"POP SS" Encoding:"0x17"/""
{
ND_INS_POP, ND_CAT_POP, ND_SET_I86, 584,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0,
0,
0,
OP(ND_OPT_SEG_SS, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:965 Instruction:"POP DS" Encoding:"0x1F"/""
{
ND_INS_POP, ND_CAT_POP, ND_SET_I86, 584,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0,
0,
0,
OP(ND_OPT_SEG_DS, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:966 Instruction:"POP Zv" Encoding:"0x58"/"O"
{
ND_INS_POP, ND_CAT_POP, ND_SET_I86, 584,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:967 Instruction:"POP Zv" Encoding:"0x59"/"O"
{
ND_INS_POP, ND_CAT_POP, ND_SET_I86, 584,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:968 Instruction:"POP Zv" Encoding:"0x5A"/"O"
{
ND_INS_POP, ND_CAT_POP, ND_SET_I86, 584,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:969 Instruction:"POP Zv" Encoding:"0x5B"/"O"
{
ND_INS_POP, ND_CAT_POP, ND_SET_I86, 584,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:970 Instruction:"POP Zv" Encoding:"0x5C"/"O"
{
ND_INS_POP, ND_CAT_POP, ND_SET_I86, 584,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:971 Instruction:"POP Zv" Encoding:"0x5D"/"O"
{
ND_INS_POP, ND_CAT_POP, ND_SET_I86, 584,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:972 Instruction:"POP Zv" Encoding:"0x5E"/"O"
{
ND_INS_POP, ND_CAT_POP, ND_SET_I86, 584,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:973 Instruction:"POP Zv" Encoding:"0x5F"/"O"
{
ND_INS_POP, ND_CAT_POP, ND_SET_I86, 584,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:974 Instruction:"POP Ev" Encoding:"0x8F /0"/"M"
{
ND_INS_POP, ND_CAT_POP, ND_SET_I86, 584,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:975 Instruction:"POPA" Encoding:"0x61"/""
{
ND_INS_POPA, ND_CAT_POP, ND_SET_I386, 585,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0,
0,
0,
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v8, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:976 Instruction:"POPCNT Gv,Ev" Encoding:"a0xF3 0x0F 0xB8 /r"/"RM"
{
ND_INS_POPCNT, ND_CAT_SSE, ND_SET_POPCNT, 586,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_POPCNT,
0,
0|REG_RFLAG_ZF,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:977 Instruction:"POPFD Fv" Encoding:"ds32 0x9D"/""
{
ND_INS_POPF, ND_CAT_POP, ND_SET_I86, 587,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:978 Instruction:"POPFQ Fv" Encoding:"dds64 0x9D"/""
{
ND_INS_POPF, ND_CAT_POP, ND_SET_I86, 588,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:979 Instruction:"POPFW Fv" Encoding:"ds16 0x9D"/""
{
ND_INS_POPF, ND_CAT_POP, ND_SET_I86, 589,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:980 Instruction:"POR Pq,Qq" Encoding:"NP 0x0F 0xEB /r"/"RM"
{
ND_INS_POR, ND_CAT_LOGICAL, ND_SET_MMX, 590,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:981 Instruction:"POR Vx,Wx" Encoding:"0x66 0x0F 0xEB /r"/"RM"
{
ND_INS_POR, ND_CAT_LOGICAL, ND_SET_SSE2, 590,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:982 Instruction:"PREFETCH Mcl" Encoding:"0x0F 0x0D /4:mem"/"M"
{
ND_INS_PREFETCH, ND_CAT_PREFETCH, ND_SET_PREFETCH_NOP, 591,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_cl, ND_OPF_R, 0, 0),
},
// Pos:983 Instruction:"PREFETCH Mcl" Encoding:"0x0F 0x0D /5:mem"/"M"
{
ND_INS_PREFETCH, ND_CAT_PREFETCH, ND_SET_PREFETCH_NOP, 591,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_cl, ND_OPF_R, 0, 0),
},
// Pos:984 Instruction:"PREFETCH Mcl" Encoding:"0x0F 0x0D /6:mem"/"M"
{
ND_INS_PREFETCH, ND_CAT_PREFETCH, ND_SET_PREFETCH_NOP, 591,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_cl, ND_OPF_R, 0, 0),
},
// Pos:985 Instruction:"PREFETCH Mcl" Encoding:"0x0F 0x0D /7:mem"/"M"
{
ND_INS_PREFETCH, ND_CAT_PREFETCH, ND_SET_PREFETCH_NOP, 591,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_cl, ND_OPF_R, 0, 0),
},
// Pos:986 Instruction:"PREFETCHE Mcl" Encoding:"0x0F 0x0D /0:mem"/"M"
{
ND_INS_PREFETCHE, ND_CAT_PREFETCH, ND_SET_PREFETCH_NOP, 592,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_cl, ND_OPF_R, 0, 0),
},
// Pos:987 Instruction:"PREFETCHM Mcl" Encoding:"0x0F 0x0D /3:mem"/"M"
{
ND_INS_PREFETCHM, ND_CAT_PREFETCH, ND_SET_PREFETCH_NOP, 593,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_cl, ND_OPF_R, 0, 0),
},
// Pos:988 Instruction:"PREFETCHNTA Mcl" Encoding:"0x0F 0x18 /0:mem"/"M"
{
ND_INS_PREFETCHNTA, ND_CAT_PREFETCH, ND_SET_SSE, 594,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_cl, ND_OPF_R, 0, 0),
},
// Pos:989 Instruction:"PREFETCHT0 Mcl" Encoding:"0x0F 0x18 /1:mem"/"M"
{
ND_INS_PREFETCHT0, ND_CAT_PREFETCH, ND_SET_SSE, 595,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_cl, ND_OPF_R, 0, 0),
},
// Pos:990 Instruction:"PREFETCHT1 Mcl" Encoding:"0x0F 0x18 /2:mem"/"M"
{
ND_INS_PREFETCHT1, ND_CAT_PREFETCH, ND_SET_SSE, 596,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_cl, ND_OPF_R, 0, 0),
},
// Pos:991 Instruction:"PREFETCHT2 Mcl" Encoding:"0x0F 0x18 /3:mem"/"M"
{
ND_INS_PREFETCHT2, ND_CAT_PREFETCH, ND_SET_SSE, 597,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_cl, ND_OPF_R, 0, 0),
},
// Pos:992 Instruction:"PREFETCHW Mcl" Encoding:"0x0F 0x0D /1:mem"/"M"
{
ND_INS_PREFETCHW, ND_CAT_PREFETCH, ND_SET_PREFETCH_NOP, 598,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_cl, ND_OPF_R, 0, 0),
},
// Pos:993 Instruction:"PREFETCHWT1 Mcl" Encoding:"0x0F 0x0D /2:mem"/"M"
{
ND_INS_PREFETCHWT1, ND_CAT_PREFETCH, ND_SET_PREFETCH_NOP, 599,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_cl, ND_OPF_R, 0, 0),
},
// Pos:994 Instruction:"PSADBW Pq,Qq" Encoding:"NP 0x0F 0xF6 /r"/"RM"
{
ND_INS_PSADBW, ND_CAT_MMX, ND_SET_MMX, 600,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:995 Instruction:"PSADBW Vx,Wx" Encoding:"0x66 0x0F 0xF6 /r"/"RM"
{
ND_INS_PSADBW, ND_CAT_SSE, ND_SET_SSE2, 600,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:996 Instruction:"PSHUFB Pq,Qq" Encoding:"NP 0x0F 0x38 0x00 /r"/"RM"
{
ND_INS_PSHUFB, ND_CAT_MMX, ND_SET_SSSE3, 601,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:997 Instruction:"PSHUFB Vx,Wx" Encoding:"0x66 0x0F 0x38 0x00 /r"/"RM"
{
ND_INS_PSHUFB, ND_CAT_SSE, ND_SET_SSSE3, 601,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:998 Instruction:"PSHUFD Vx,Wx,Ib" Encoding:"0x66 0x0F 0x70 /r ib"/"RMI"
{
ND_INS_PSHUFD, ND_CAT_SSE, ND_SET_SSE2, 602,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:999 Instruction:"PSHUFHW Vx,Wx,Ib" Encoding:"0xF3 0x0F 0x70 /r ib"/"RMI"
{
ND_INS_PSHUFHW, ND_CAT_SSE, ND_SET_SSE2, 603,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1000 Instruction:"PSHUFLW Vx,Wx,Ib" Encoding:"0xF2 0x0F 0x70 /r ib"/"RMI"
{
ND_INS_PSHUFLW, ND_CAT_SSE, ND_SET_SSE2, 604,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1001 Instruction:"PSHUFW Pq,Qq,Ib" Encoding:"NP 0x0F 0x70 /r ib"/"RMI"
{
ND_INS_PSHUFW, ND_CAT_MMX, ND_SET_MMX, 605,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1002 Instruction:"PSIGNB Pq,Qq" Encoding:"NP 0x0F 0x38 0x08 /r"/"RM"
{
ND_INS_PSIGNB, ND_CAT_MMX, ND_SET_SSSE3, 606,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1003 Instruction:"PSIGNB Vx,Wx" Encoding:"0x66 0x0F 0x38 0x08 /r"/"RM"
{
ND_INS_PSIGNB, ND_CAT_SSE, ND_SET_SSSE3, 606,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1004 Instruction:"PSIGND Pq,Qq" Encoding:"NP 0x0F 0x38 0x0A /r"/"RM"
{
ND_INS_PSIGND, ND_CAT_MMX, ND_SET_SSSE3, 607,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1005 Instruction:"PSIGND Vx,Wx" Encoding:"0x66 0x0F 0x38 0x0A /r"/"RM"
{
ND_INS_PSIGND, ND_CAT_SSE, ND_SET_SSSE3, 607,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1006 Instruction:"PSIGNW Pq,Qq" Encoding:"NP 0x0F 0x38 0x09 /r"/"RM"
{
ND_INS_PSIGNW, ND_CAT_MMX, ND_SET_SSSE3, 608,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1007 Instruction:"PSIGNW Vx,Wx" Encoding:"0x66 0x0F 0x38 0x09 /r"/"RM"
{
ND_INS_PSIGNW, ND_CAT_SSE, ND_SET_SSSE3, 608,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSSE3,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1008 Instruction:"PSLLD Nq,Ib" Encoding:"NP 0x0F 0x72 /6:reg ib"/"MI"
{
ND_INS_PSLLD, ND_CAT_MMX, ND_SET_MMX, 609,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_N, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1009 Instruction:"PSLLD Ux,Ib" Encoding:"0x66 0x0F 0x72 /6:reg ib"/"MI"
{
ND_INS_PSLLD, ND_CAT_SSE, ND_SET_SSE2, 609,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_U, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1010 Instruction:"PSLLD Pq,Qq" Encoding:"NP 0x0F 0xF2 /r"/"RM"
{
ND_INS_PSLLD, ND_CAT_MMX, ND_SET_MMX, 609,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1011 Instruction:"PSLLD Vx,Wx" Encoding:"0x66 0x0F 0xF2 /r"/"RM"
{
ND_INS_PSLLD, ND_CAT_SSE, ND_SET_SSE2, 609,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1012 Instruction:"PSLLDQ Ux,Ib" Encoding:"0x66 0x0F 0x73 /7:reg ib"/"MI"
{
ND_INS_PSLLDQ, ND_CAT_SSE, ND_SET_SSE2, 610,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_U, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1013 Instruction:"PSLLQ Nq,Ib" Encoding:"NP 0x0F 0x73 /6:reg ib"/"MI"
{
ND_INS_PSLLQ, ND_CAT_MMX, ND_SET_MMX, 611,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_N, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1014 Instruction:"PSLLQ Ux,Ib" Encoding:"0x66 0x0F 0x73 /6:reg ib"/"MI"
{
ND_INS_PSLLQ, ND_CAT_SSE, ND_SET_SSE2, 611,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_U, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1015 Instruction:"PSLLQ Pq,Qq" Encoding:"NP 0x0F 0xF3 /r"/"RM"
{
ND_INS_PSLLQ, ND_CAT_MMX, ND_SET_MMX, 611,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1016 Instruction:"PSLLQ Vx,Wx" Encoding:"0x66 0x0F 0xF3 /r"/"RM"
{
ND_INS_PSLLQ, ND_CAT_SSE, ND_SET_SSE2, 611,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1017 Instruction:"PSLLW Nq,Ib" Encoding:"NP 0x0F 0x71 /6:reg ib"/"MI"
{
ND_INS_PSLLW, ND_CAT_MMX, ND_SET_MMX, 612,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_N, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1018 Instruction:"PSLLW Ux,Ib" Encoding:"0x66 0x0F 0x71 /6:reg ib"/"MI"
{
ND_INS_PSLLW, ND_CAT_SSE, ND_SET_SSE2, 612,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_U, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1019 Instruction:"PSLLW Pq,Qq" Encoding:"NP 0x0F 0xF1 /r"/"RM"
{
ND_INS_PSLLW, ND_CAT_MMX, ND_SET_MMX, 612,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1020 Instruction:"PSLLW Vx,Wx" Encoding:"0x66 0x0F 0xF1 /r"/"RM"
{
ND_INS_PSLLW, ND_CAT_SSE, ND_SET_SSE2, 612,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1021 Instruction:"PSMASH" Encoding:"0xF3 0x0F 0x01 /0xFF"/""
{
ND_INS_PSMASH, ND_CAT_SYSTEM, ND_SET_SNP, 613,
ND_MOD_R0|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_O64, ND_CFF_SNP,
0,
0|REG_RFLAG_OF|REG_RFLAG_ZF|REG_RFLAG_AF|REG_RFLAG_PF|REG_RFLAG_SF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1022 Instruction:"PSRAD Nq,Ib" Encoding:"NP 0x0F 0x72 /4:reg ib"/"MI"
{
ND_INS_PSRAD, ND_CAT_MMX, ND_SET_MMX, 614,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_N, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1023 Instruction:"PSRAD Ux,Ib" Encoding:"0x66 0x0F 0x72 /4:reg ib"/"MI"
{
ND_INS_PSRAD, ND_CAT_SSE, ND_SET_SSE2, 614,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_U, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1024 Instruction:"PSRAD Pq,Qq" Encoding:"NP 0x0F 0xE2 /r"/"RM"
{
ND_INS_PSRAD, ND_CAT_MMX, ND_SET_MMX, 614,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1025 Instruction:"PSRAD Vx,Wx" Encoding:"0x66 0x0F 0xE2 /r"/"RM"
{
ND_INS_PSRAD, ND_CAT_SSE, ND_SET_SSE2, 614,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1026 Instruction:"PSRAW Nq,Ib" Encoding:"NP 0x0F 0x71 /4:reg ib"/"MI"
{
ND_INS_PSRAW, ND_CAT_MMX, ND_SET_MMX, 615,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_N, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1027 Instruction:"PSRAW Ux,Ib" Encoding:"0x66 0x0F 0x71 /4:reg ib"/"MI"
{
ND_INS_PSRAW, ND_CAT_SSE, ND_SET_SSE2, 615,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_U, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1028 Instruction:"PSRAW Pq,Qq" Encoding:"NP 0x0F 0xE1 /r"/"RM"
{
ND_INS_PSRAW, ND_CAT_MMX, ND_SET_MMX, 615,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1029 Instruction:"PSRAW Vx,Wx" Encoding:"0x66 0x0F 0xE1 /r"/"RM"
{
ND_INS_PSRAW, ND_CAT_SSE, ND_SET_SSE2, 615,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1030 Instruction:"PSRLD Nq,Ib" Encoding:"NP 0x0F 0x72 /2:reg ib"/"MI"
{
ND_INS_PSRLD, ND_CAT_MMX, ND_SET_MMX, 616,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_N, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1031 Instruction:"PSRLD Ux,Ib" Encoding:"0x66 0x0F 0x72 /2:reg ib"/"MI"
{
ND_INS_PSRLD, ND_CAT_SSE, ND_SET_SSE2, 616,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_U, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1032 Instruction:"PSRLD Pq,Qq" Encoding:"NP 0x0F 0xD2 /r"/"RM"
{
ND_INS_PSRLD, ND_CAT_MMX, ND_SET_MMX, 616,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1033 Instruction:"PSRLD Vx,Wx" Encoding:"0x66 0x0F 0xD2 /r"/"RM"
{
ND_INS_PSRLD, ND_CAT_SSE, ND_SET_SSE2, 616,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1034 Instruction:"PSRLDQ Ux,Ib" Encoding:"0x66 0x0F 0x73 /3:reg ib"/"MI"
{
ND_INS_PSRLDQ, ND_CAT_SSE, ND_SET_SSE2, 617,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_U, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1035 Instruction:"PSRLQ Nq,Ib" Encoding:"NP 0x0F 0x73 /2:reg ib"/"MI"
{
ND_INS_PSRLQ, ND_CAT_MMX, ND_SET_MMX, 618,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_N, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1036 Instruction:"PSRLQ Ux,Ib" Encoding:"0x66 0x0F 0x73 /2:reg ib"/"MI"
{
ND_INS_PSRLQ, ND_CAT_SSE, ND_SET_SSE2, 618,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_U, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1037 Instruction:"PSRLQ Pq,Qq" Encoding:"NP 0x0F 0xD3 /r"/"RM"
{
ND_INS_PSRLQ, ND_CAT_MMX, ND_SET_MMX, 618,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1038 Instruction:"PSRLQ Vx,Wx" Encoding:"0x66 0x0F 0xD3 /r"/"RM"
{
ND_INS_PSRLQ, ND_CAT_SSE, ND_SET_SSE2, 618,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1039 Instruction:"PSRLW Nq,Ib" Encoding:"NP 0x0F 0x71 /2:reg ib"/"MI"
{
ND_INS_PSRLW, ND_CAT_MMX, ND_SET_MMX, 619,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_N, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1040 Instruction:"PSRLW Ux,Ib" Encoding:"0x66 0x0F 0x71 /2:reg ib"/"MI"
{
ND_INS_PSRLW, ND_CAT_SSE, ND_SET_SSE2, 619,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_U, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1041 Instruction:"PSRLW Pq,Qq" Encoding:"NP 0x0F 0xD1 /r"/"RM"
{
ND_INS_PSRLW, ND_CAT_MMX, ND_SET_MMX, 619,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1042 Instruction:"PSRLW Vx,Wx" Encoding:"0x66 0x0F 0xD1 /r"/"RM"
{
ND_INS_PSRLW, ND_CAT_SSE, ND_SET_SSE2, 619,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1043 Instruction:"PSUBB Pq,Qq" Encoding:"NP 0x0F 0xF8 /r"/"RM"
{
ND_INS_PSUBB, ND_CAT_MMX, ND_SET_MMX, 620,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1044 Instruction:"PSUBB Vx,Wx" Encoding:"0x66 0x0F 0xF8 /r"/"RM"
{
ND_INS_PSUBB, ND_CAT_SSE, ND_SET_SSE2, 620,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1045 Instruction:"PSUBD Pq,Qq" Encoding:"NP 0x0F 0xFA /r"/"RM"
{
ND_INS_PSUBD, ND_CAT_MMX, ND_SET_MMX, 621,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1046 Instruction:"PSUBD Vx,Wx" Encoding:"0x66 0x0F 0xFA /r"/"RM"
{
ND_INS_PSUBD, ND_CAT_SSE, ND_SET_SSE2, 621,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1047 Instruction:"PSUBQ Pq,Qq" Encoding:"NP 0x0F 0xFB /r"/"RM"
{
ND_INS_PSUBQ, ND_CAT_MMX, ND_SET_MMX, 622,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1048 Instruction:"PSUBQ Vx,Wx" Encoding:"0x66 0x0F 0xFB /r"/"RM"
{
ND_INS_PSUBQ, ND_CAT_SSE, ND_SET_SSE2, 622,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1049 Instruction:"PSUBSB Pq,Qq" Encoding:"NP 0x0F 0xE8 /r"/"RM"
{
ND_INS_PSUBSB, ND_CAT_MMX, ND_SET_MMX, 623,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1050 Instruction:"PSUBSB Vx,Wx" Encoding:"0x66 0x0F 0xE8 /r"/"RM"
{
ND_INS_PSUBSB, ND_CAT_SSE, ND_SET_SSE2, 623,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1051 Instruction:"PSUBSW Pq,Qq" Encoding:"NP 0x0F 0xE9 /r"/"RM"
{
ND_INS_PSUBSW, ND_CAT_MMX, ND_SET_MMX, 624,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1052 Instruction:"PSUBSW Vx,Wx" Encoding:"0x66 0x0F 0xE9 /r"/"RM"
{
ND_INS_PSUBSW, ND_CAT_SSE, ND_SET_SSE2, 624,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1053 Instruction:"PSUBUSB Pq,Qq" Encoding:"NP 0x0F 0xD8 /r"/"RM"
{
ND_INS_PSUBUSB, ND_CAT_MMX, ND_SET_MMX, 625,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1054 Instruction:"PSUBUSB Vx,Wx" Encoding:"0x66 0x0F 0xD8 /r"/"RM"
{
ND_INS_PSUBUSB, ND_CAT_SSE, ND_SET_SSE2, 625,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1055 Instruction:"PSUBUSW Pq,Qq" Encoding:"NP 0x0F 0xD9 /r"/"RM"
{
ND_INS_PSUBUSW, ND_CAT_MMX, ND_SET_MMX, 626,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1056 Instruction:"PSUBUSW Vx,Wx" Encoding:"0x66 0x0F 0xD9 /r"/"RM"
{
ND_INS_PSUBUSW, ND_CAT_SSE, ND_SET_SSE2, 626,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1057 Instruction:"PSUBW Pq,Qq" Encoding:"NP 0x0F 0xF9 /r"/"RM"
{
ND_INS_PSUBW, ND_CAT_MMX, ND_SET_MMX, 627,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1058 Instruction:"PSUBW Vx,Wx" Encoding:"0x66 0x0F 0xF9 /r"/"RM"
{
ND_INS_PSUBW, ND_CAT_SSE, ND_SET_SSE2, 627,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1059 Instruction:"PSWAPD Pq,Qq" Encoding:"0x0F 0x0F /r 0xBB"/"RM"
{
ND_INS_PSWAPD, ND_CAT_3DNOW, ND_SET_3DNOW, 628,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_3DNOW|ND_FLAG_MODRM, ND_CFF_3DNOW,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1060 Instruction:"PTEST Vdq,Wdq" Encoding:"0x66 0x0F 0x38 0x17 /r"/"RM"
{
ND_INS_PTEST, ND_CAT_SSE, ND_SET_SSE4, 629,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1061 Instruction:"PTWRITE Ey" Encoding:"0xF3 0x0F 0xAE /4"/"M"
{
ND_INS_PTWRITE, ND_CAT_PTWRITE, ND_SET_PTWRITE, 630,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_NO66|ND_FLAG_MODRM, ND_CFF_PTWRITE,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:1062 Instruction:"PUNPCKHBW Pq,Qq" Encoding:"NP 0x0F 0x68 /r"/"RM"
{
ND_INS_PUNPCKHBW, ND_CAT_MMX, ND_SET_MMX, 631,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1063 Instruction:"PUNPCKHBW Vx,Wx" Encoding:"0x66 0x0F 0x68 /r"/"RM"
{
ND_INS_PUNPCKHBW, ND_CAT_SSE, ND_SET_SSE2, 631,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1064 Instruction:"PUNPCKHDQ Pq,Qq" Encoding:"NP 0x0F 0x6A /r"/"RM"
{
ND_INS_PUNPCKHDQ, ND_CAT_MMX, ND_SET_MMX, 632,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1065 Instruction:"PUNPCKHDQ Vx,Wx" Encoding:"0x66 0x0F 0x6A /r"/"RM"
{
ND_INS_PUNPCKHDQ, ND_CAT_SSE, ND_SET_SSE2, 632,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1066 Instruction:"PUNPCKHQDQ Vx,Wx" Encoding:"0x66 0x0F 0x6D /r"/"RM"
{
ND_INS_PUNPCKHQDQ, ND_CAT_SSE, ND_SET_SSE2, 633,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1067 Instruction:"PUNPCKHWD Pq,Qq" Encoding:"NP 0x0F 0x69 /r"/"RM"
{
ND_INS_PUNPCKHWD, ND_CAT_MMX, ND_SET_MMX, 634,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1068 Instruction:"PUNPCKHWD Vx,Wx" Encoding:"0x66 0x0F 0x69 /r"/"RM"
{
ND_INS_PUNPCKHWD, ND_CAT_SSE, ND_SET_SSE2, 634,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1069 Instruction:"PUNPCKLBW Pq,Qd" Encoding:"NP 0x0F 0x60 /r"/"RM"
{
ND_INS_PUNPCKLBW, ND_CAT_MMX, ND_SET_MMX, 635,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:1070 Instruction:"PUNPCKLBW Vx,Wx" Encoding:"0x66 0x0F 0x60 /r"/"RM"
{
ND_INS_PUNPCKLBW, ND_CAT_SSE, ND_SET_SSE2, 635,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1071 Instruction:"PUNPCKLDQ Pq,Qd" Encoding:"NP 0x0F 0x62 /r"/"RM"
{
ND_INS_PUNPCKLDQ, ND_CAT_MMX, ND_SET_MMX, 636,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:1072 Instruction:"PUNPCKLDQ Vx,Wx" Encoding:"0x66 0x0F 0x62 /r"/"RM"
{
ND_INS_PUNPCKLDQ, ND_CAT_SSE, ND_SET_SSE2, 636,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1073 Instruction:"PUNPCKLQDQ Vx,Wx" Encoding:"0x66 0x0F 0x6C /r"/"RM"
{
ND_INS_PUNPCKLQDQ, ND_CAT_SSE, ND_SET_SSE2, 637,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1074 Instruction:"PUNPCKLWD Pq,Qd" Encoding:"NP 0x0F 0x61 /r"/"RM"
{
ND_INS_PUNPCKLWD, ND_CAT_MMX, ND_SET_MMX, 638,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:1075 Instruction:"PUNPCKLWD Vx,Wx" Encoding:"0x66 0x0F 0x61 /r"/"RM"
{
ND_INS_PUNPCKLWD, ND_CAT_SSE, ND_SET_SSE2, 638,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1076 Instruction:"PUSH FS" Encoding:"0x0F 0xA0"/""
{
ND_INS_PUSH, ND_CAT_PUSH, ND_SET_I86, 639,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_SEG_FS, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1077 Instruction:"PUSH GS" Encoding:"0x0F 0xA8"/""
{
ND_INS_PUSH, ND_CAT_PUSH, ND_SET_I86, 639,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_SEG_GS, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1078 Instruction:"PUSH ES" Encoding:"0x06"/""
{
ND_INS_PUSH, ND_CAT_PUSH, ND_SET_I86, 639,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0,
0,
0,
OP(ND_OPT_SEG_ES, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1079 Instruction:"PUSH CS" Encoding:"0x0E"/""
{
ND_INS_PUSH, ND_CAT_PUSH, ND_SET_I86, 639,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0,
0,
0,
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1080 Instruction:"PUSH SS" Encoding:"0x16"/""
{
ND_INS_PUSH, ND_CAT_PUSH, ND_SET_I86, 639,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0,
0,
0,
OP(ND_OPT_SEG_SS, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1081 Instruction:"PUSH DS" Encoding:"0x1E"/""
{
ND_INS_PUSH, ND_CAT_PUSH, ND_SET_I86, 639,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0,
0,
0,
OP(ND_OPT_SEG_DS, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1082 Instruction:"PUSH Zv" Encoding:"0x50"/"O"
{
ND_INS_PUSH, ND_CAT_PUSH, ND_SET_I86, 639,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1083 Instruction:"PUSH Zv" Encoding:"0x51"/"O"
{
ND_INS_PUSH, ND_CAT_PUSH, ND_SET_I86, 639,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1084 Instruction:"PUSH Zv" Encoding:"0x52"/"O"
{
ND_INS_PUSH, ND_CAT_PUSH, ND_SET_I86, 639,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1085 Instruction:"PUSH Zv" Encoding:"0x53"/"O"
{
ND_INS_PUSH, ND_CAT_PUSH, ND_SET_I86, 639,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1086 Instruction:"PUSH Zv" Encoding:"0x54"/"O"
{
ND_INS_PUSH, ND_CAT_PUSH, ND_SET_I86, 639,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1087 Instruction:"PUSH Zv" Encoding:"0x55"/"O"
{
ND_INS_PUSH, ND_CAT_PUSH, ND_SET_I86, 639,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1088 Instruction:"PUSH Zv" Encoding:"0x56"/"O"
{
ND_INS_PUSH, ND_CAT_PUSH, ND_SET_I86, 639,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1089 Instruction:"PUSH Zv" Encoding:"0x57"/"O"
{
ND_INS_PUSH, ND_CAT_PUSH, ND_SET_I86, 639,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1090 Instruction:"PUSH Iz" Encoding:"0x68 iz"/"I"
{
ND_INS_PUSH, ND_CAT_PUSH, ND_SET_I86, 639,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_DWS|ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1091 Instruction:"PUSH Ib" Encoding:"0x6A ib"/"I"
{
ND_INS_PUSH, ND_CAT_PUSH, ND_SET_I86, 639,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_I, ND_OPS_b, ND_OPF_SEX_DWS|ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1092 Instruction:"PUSH Ev" Encoding:"0xFF /6"/"M"
{
ND_INS_PUSH, ND_CAT_PUSH, ND_SET_I86, 639,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64|ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1093 Instruction:"PUSHA" Encoding:"0x60"/""
{
ND_INS_PUSHA, ND_CAT_PUSH, ND_SET_I386, 640,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_I64, 0,
0,
0,
0,
0,
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v8, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1094 Instruction:"PUSHFD Fv" Encoding:"ds32 0x9C"/""
{
ND_INS_PUSHF, ND_CAT_PUSH, ND_SET_I86, 641,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1095 Instruction:"PUSHFQ Fv" Encoding:"dds64 0x9C"/""
{
ND_INS_PUSHF, ND_CAT_PUSH, ND_SET_I86, 642,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1096 Instruction:"PUSHFW Fv" Encoding:"ds16 0x9C"/""
{
ND_INS_PUSHF, ND_CAT_PUSH, ND_SET_I86, 643,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_D64, 0,
0,
0,
0,
0,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1097 Instruction:"PVALIDATE" Encoding:"0xF2 0x0F 0x01 /0xFF"/""
{
ND_INS_PVALIDATE, ND_CAT_SYSTEM, ND_SET_SNP, 644,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SNP,
0,
0|REG_RFLAG_OF|REG_RFLAG_ZF|REG_RFLAG_AF|REG_RFLAG_PF|REG_RFLAG_SF|REG_RFLAG_CF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1098 Instruction:"PXOR Pq,Qq" Encoding:"NP 0x0F 0xEF /r"/"RM"
{
ND_INS_PXOR, ND_CAT_LOGICAL, ND_SET_MMX, 645,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_MMX,
0,
0,
0,
0,
OP(ND_OPT_P, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_Q, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1099 Instruction:"PXOR Vx,Wx" Encoding:"0x66 0x0F 0xEF /r"/"RM"
{
ND_INS_PXOR, ND_CAT_LOGICAL, ND_SET_SSE2, 645,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1100 Instruction:"RCL Eb,Ib" Encoding:"0xC0 /2 ib"/"MI"
{
ND_INS_RCL, ND_CAT_ROTATE, ND_SET_I86, 646,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1101 Instruction:"RCL Ev,Ib" Encoding:"0xC1 /2 ib"/"MI"
{
ND_INS_RCL, ND_CAT_ROTATE, ND_SET_I86, 646,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1102 Instruction:"RCL Eb,1" Encoding:"0xD0 /2"/"M1"
{
ND_INS_RCL, ND_CAT_ROTATE, ND_SET_I86, 646,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_CONST_1, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1103 Instruction:"RCL Ev,1" Encoding:"0xD1 /2"/"M1"
{
ND_INS_RCL, ND_CAT_ROTATE, ND_SET_I86, 646,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_CONST_1, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1104 Instruction:"RCL Eb,CL" Encoding:"0xD2 /2"/"MC"
{
ND_INS_RCL, ND_CAT_ROTATE, ND_SET_I86, 646,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1105 Instruction:"RCL Ev,CL" Encoding:"0xD3 /2"/"MC"
{
ND_INS_RCL, ND_CAT_ROTATE, ND_SET_I86, 646,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1106 Instruction:"RCPPS Vps,Wps" Encoding:"NP 0x0F 0x53 /r"/"RM"
{
ND_INS_RCPPS, ND_CAT_SSE, ND_SET_SSE, 647,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:1107 Instruction:"RCPSS Vss,Wss" Encoding:"0xF3 0x0F 0x53 /r"/"RM"
{
ND_INS_RCPSS, ND_CAT_SSE, ND_SET_SSE, 648,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1108 Instruction:"RCR Eb,Ib" Encoding:"0xC0 /3 ib"/"MI"
{
ND_INS_RCR, ND_CAT_ROTATE, ND_SET_I86, 649,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1109 Instruction:"RCR Ev,Ib" Encoding:"0xC1 /3 ib"/"MI"
{
ND_INS_RCR, ND_CAT_ROTATE, ND_SET_I86, 649,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1110 Instruction:"RCR Eb,1" Encoding:"0xD0 /3"/"M1"
{
ND_INS_RCR, ND_CAT_ROTATE, ND_SET_I86, 649,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_CONST_1, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1111 Instruction:"RCR Ev,1" Encoding:"0xD1 /3"/"M1"
{
ND_INS_RCR, ND_CAT_ROTATE, ND_SET_I86, 649,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_CONST_1, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1112 Instruction:"RCR Eb,CL" Encoding:"0xD2 /3"/"MC"
{
ND_INS_RCR, ND_CAT_ROTATE, ND_SET_I86, 649,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1113 Instruction:"RCR Ev,CL" Encoding:"0xD3 /3"/"MC"
{
ND_INS_RCR, ND_CAT_ROTATE, ND_SET_I86, 649,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1114 Instruction:"RDFSBASE Ry" Encoding:"o64 0xF3 0x0F 0xAE /0:reg"/"M"
{
ND_INS_RDFSBASE, ND_CAT_RDWRFSGS, ND_SET_RDWRFSGS, 650,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_O64, ND_CFF_RDWRFSGS,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_MSR_FSBASE, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1115 Instruction:"RDGSBASE Ry" Encoding:"o64 0xF3 0x0F 0xAE /1:reg"/"M"
{
ND_INS_RDGSBASE, ND_CAT_RDWRFSGS, ND_SET_RDWRFSGS, 651,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_O64, ND_CFF_RDWRFSGS,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_MSR_GSBASE, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1116 Instruction:"RDMSR" Encoding:"0x0F 0x32"/""
{
ND_INS_RDMSR, ND_CAT_SYSTEM, ND_SET_PENTIUMREAL, 652,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, 0, ND_CFF_MSR,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_MSR, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1117 Instruction:"RDPID Rv" Encoding:"0xF3 0x0F 0xC7 /7:reg"/"M"
{
ND_INS_RDPID, ND_CAT_RDPID, ND_SET_RDPID, 653,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_RDPID,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_MSR_TSCAUX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1118 Instruction:"RDPKRU" Encoding:"NP 0x0F 0x01 /0xEE"/""
{
ND_INS_RDPKRU, ND_CAT_MISC, ND_SET_PKU, 654,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_PKU,
0,
0,
0,
0,
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_PKRU, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1119 Instruction:"RDPMC" Encoding:"0x0F 0x33"/""
{
ND_INS_RDPMC, ND_CAT_SYSTEM, ND_SET_RDPMC, 655,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_MSR, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1120 Instruction:"RDPRU" Encoding:"0x0F 0x01 /0xFD"/""
{
ND_INS_RDPRU, ND_CAT_MISC, ND_SET_RDPRU, 656,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_RDPRU,
0,
0|REG_RFLAG_CF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1121 Instruction:"RDRAND Rv" Encoding:"0x0F 0xC7 /6:reg"/"M"
{
ND_INS_RDRAND, ND_CAT_RDRAND, ND_SET_RDRAND, 657,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_RDRAND,
0,
0|REG_RFLAG_CF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1122 Instruction:"RDRAND Rv" Encoding:"0x66 0x0F 0xC7 /6:reg"/"M"
{
ND_INS_RDRAND, ND_CAT_RDRAND, ND_SET_RDRAND, 657,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_S66|ND_FLAG_MODRM, ND_CFF_RDRAND,
0,
0|REG_RFLAG_CF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1123 Instruction:"RDSEED Rv" Encoding:"0x0F 0xC7 /7:reg"/"M"
{
ND_INS_RDSEED, ND_CAT_RDSEED, ND_SET_RDSEED, 658,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_RDSEED,
0,
0|REG_RFLAG_CF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1124 Instruction:"RDSEED Rv" Encoding:"0x66 0x0F 0xC7 /7:reg"/"M"
{
ND_INS_RDSEED, ND_CAT_RDSEED, ND_SET_RDSEED, 658,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_S66|ND_FLAG_MODRM, ND_CFF_RDSEED,
0,
0|REG_RFLAG_CF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1125 Instruction:"RDSHR Ed" Encoding:"cyrix 0x0F 0x36 /r"/"M"
{
ND_INS_RDSHR, ND_CAT_SYSTEM, ND_SET_CYRIX, 659,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:1126 Instruction:"RDSSPD Rd" Encoding:"a0xF3 0x0F 0x1E /1:reg"/"M"
{
ND_INS_RSSSP, ND_CAT_CET, ND_SET_CET, 660,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CET,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_SSP, ND_OPS_yf, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1127 Instruction:"RDSSPQ Rq" Encoding:"a0xF3 rexw 0x0F 0x1E /1:reg"/"M"
{
ND_INS_RSSSP, ND_CAT_CET, ND_SET_CET, 661,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CET,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_SSP, ND_OPS_yf, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1128 Instruction:"RDTSC" Encoding:"0x0F 0x31"/""
{
ND_INS_RDTSC, ND_CAT_SYSTEM, ND_SET_PENTIUMREAL, 662,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_MSR_TSC, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1129 Instruction:"RDTSCP" Encoding:"0x0F 0x01 /0xF9"/""
{
ND_INS_RDTSCP, ND_CAT_SYSTEM, ND_SET_RDTSCP, 663,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 5), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_RDTSCP,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_MSR_TSC, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_MSR_TSCAUX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1130 Instruction:"RETF Iw" Encoding:"0xCA iw"/"I"
{
ND_INS_RETF, ND_CAT_RET, ND_SET_I86, 664,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_I, ND_OPS_w, ND_OPF_SEX_DWS|ND_OPF_R, 0, 0),
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v2, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_MEM_SHSP, ND_OPS_v2, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1131 Instruction:"RETF" Encoding:"0xCB"/""
{
ND_INS_RETF, ND_CAT_RET, ND_SET_I86, 664,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v2, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_MEM_SHSP, ND_OPS_v2, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1132 Instruction:"RETN Iw" Encoding:"0xC2 iw"/"I"
{
ND_INS_RETN, ND_CAT_RET, ND_SET_I86, 665,
ND_MOD_ANY,
ND_PREF_BND, 0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_F64, 0,
0,
0,
0,
0,
OP(ND_OPT_I, ND_OPS_w, ND_OPF_SEX_DWS|ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rSP, ND_OPS_ssz, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_MEM_SHSP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1133 Instruction:"RETN" Encoding:"0xC3"/""
{
ND_INS_RETN, ND_CAT_RET, ND_SET_I86, 665,
ND_MOD_ANY,
ND_PREF_BND, 0, ND_OPS_CNT(0, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_F64, 0,
0,
0,
0,
0,
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_K, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_MEM_SHSP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1134 Instruction:"RMPADJUST" Encoding:"0xF3 0x0F 0x01 /0xFE"/""
{
ND_INS_RMPADJUST, ND_CAT_SYSTEM, ND_SET_SNP, 666,
ND_MOD_R0|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_O64, ND_CFF_SNP,
0,
0|REG_RFLAG_OF|REG_RFLAG_ZF|REG_RFLAG_AF|REG_RFLAG_PF|REG_RFLAG_SF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1135 Instruction:"RMPUPDATE" Encoding:"0xF2 0x0F 0x01 /0xFE"/""
{
ND_INS_RMPUPDATE, ND_CAT_SYSTEM, ND_SET_SNP, 667,
ND_MOD_R0|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_O64, ND_CFF_SNP,
0,
0|REG_RFLAG_OF|REG_RFLAG_ZF|REG_RFLAG_AF|REG_RFLAG_PF|REG_RFLAG_SF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1136 Instruction:"ROL Eb,Ib" Encoding:"0xC0 /0 ib"/"MI"
{
ND_INS_ROL, ND_CAT_ROTATE, ND_SET_I86, 668,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1137 Instruction:"ROL Ev,Ib" Encoding:"0xC1 /0 ib"/"MI"
{
ND_INS_ROL, ND_CAT_ROTATE, ND_SET_I86, 668,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1138 Instruction:"ROL Eb,1" Encoding:"0xD0 /0"/"M1"
{
ND_INS_ROL, ND_CAT_ROTATE, ND_SET_I86, 668,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_CONST_1, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1139 Instruction:"ROL Ev,1" Encoding:"0xD1 /0"/"M1"
{
ND_INS_ROL, ND_CAT_ROTATE, ND_SET_I86, 668,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_CONST_1, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1140 Instruction:"ROL Eb,CL" Encoding:"0xD2 /0"/"MC"
{
ND_INS_ROL, ND_CAT_ROTATE, ND_SET_I86, 668,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1141 Instruction:"ROL Ev,CL" Encoding:"0xD3 /0"/"MC"
{
ND_INS_ROL, ND_CAT_ROTATE, ND_SET_I86, 668,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1142 Instruction:"ROR Eb,Ib" Encoding:"0xC0 /1 ib"/"MI"
{
ND_INS_ROR, ND_CAT_ROTATE, ND_SET_I86, 669,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1143 Instruction:"ROR Ev,Ib" Encoding:"0xC1 /1 ib"/"MI"
{
ND_INS_ROR, ND_CAT_ROTATE, ND_SET_I86, 669,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1144 Instruction:"ROR Eb,1" Encoding:"0xD0 /1"/"M1"
{
ND_INS_ROR, ND_CAT_ROTATE, ND_SET_I86, 669,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_CONST_1, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1145 Instruction:"ROR Ev,1" Encoding:"0xD1 /1"/"M1"
{
ND_INS_ROR, ND_CAT_ROTATE, ND_SET_I86, 669,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_CONST_1, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1146 Instruction:"ROR Eb,CL" Encoding:"0xD2 /1"/"MC"
{
ND_INS_ROR, ND_CAT_ROTATE, ND_SET_I86, 669,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1147 Instruction:"ROR Ev,CL" Encoding:"0xD3 /1"/"MC"
{
ND_INS_ROR, ND_CAT_ROTATE, ND_SET_I86, 669,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1148 Instruction:"RORX Gy,Ey,Ib" Encoding:"vex m:3 p:3 l:0 w:x 0xF0 /r ib"/"RMI"
{
ND_INS_RORX, ND_CAT_BMI2, ND_SET_BMI2, 670,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_13, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI2,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1149 Instruction:"ROUNDPD Vx,Wx,Ib" Encoding:"0x66 0x0F 0x3A 0x09 /r ib"/"RMI"
{
ND_INS_ROUNDPD, ND_CAT_SSE, ND_SET_SSE4, 671,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1150 Instruction:"ROUNDPS Vx,Wx,Ib" Encoding:"0x66 0x0F 0x3A 0x08 /r ib"/"RMI"
{
ND_INS_ROUNDPS, ND_CAT_SSE, ND_SET_SSE4, 672,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1151 Instruction:"ROUNDSD Vsd,Wsd,Ib" Encoding:"0x66 0x0F 0x3A 0x0B /r ib"/"RMI"
{
ND_INS_ROUNDSD, ND_CAT_SSE, ND_SET_SSE4, 673,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1152 Instruction:"ROUNDSS Vss,Wss,Ib" Encoding:"0x66 0x0F 0x3A 0x0A /r ib"/"RMI"
{
ND_INS_ROUNDSS, ND_CAT_SSE, ND_SET_SSE4, 674,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1153 Instruction:"RSDC Sw,Ms" Encoding:"cyrix 0x0F 0x79 /r:mem"/"RM"
{
ND_INS_RSDC, ND_CAT_SEGOP, ND_SET_CYRIX_SMM, 675,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_S, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_s, ND_OPF_R, 0, 0),
},
// Pos:1154 Instruction:"RSLDT Ms" Encoding:"cyrix 0x0F 0x7B /r:mem"/"M"
{
ND_INS_RSLDT, ND_CAT_SEGOP, ND_SET_CYRIX_SMM, 676,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_s, ND_OPF_R, 0, 0),
},
// Pos:1155 Instruction:"RSM" Encoding:"0x0F 0xAA"/""
{
ND_INS_RSM, ND_CAT_SYSRET, ND_SET_I486, 677,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL, 0,
0,
0,
0,
0,
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1156 Instruction:"RSQRTPS Vps,Wps" Encoding:"NP 0x0F 0x52 /r"/"RM"
{
ND_INS_RSQRTPS, ND_CAT_SSE, ND_SET_SSE, 678,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:1157 Instruction:"RSQRTSS Vss,Wss" Encoding:"0xF3 0x0F 0x52 /r"/"RM"
{
ND_INS_RSQRTSS, ND_CAT_SSE, ND_SET_SSE, 679,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1158 Instruction:"RSTORSSP Mq" Encoding:"0xF3 0x0F 0x01 /5:mem"/"M"
{
ND_INS_RSTORSSP, ND_CAT_CET, ND_SET_CET, 680,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_SHS|ND_FLAG_MODRM, ND_CFF_CET,
0,
0|REG_RFLAG_CF,
0,
0|REG_RFLAG_ZF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_OF|REG_RFLAG_SF,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_RW, 0, 0),
OP(ND_OPT_SSP, ND_OPS_yf, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1159 Instruction:"RSTS Ms" Encoding:"cyrix 0x0F 0x7D /r:mem"/"M"
{
ND_INS_RSTS, ND_CAT_SEGOP, ND_SET_CYRIX_SMM, 681,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_s, ND_OPF_R, 0, 0),
},
// Pos:1160 Instruction:"SAHF" Encoding:"0x9E"/""
{
ND_INS_SAHF, ND_CAT_FLAGOP, ND_SET_I86, 682,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF,
0,
0,
OP(ND_OPT_GPR_AH, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1161 Instruction:"SAL Eb,Ib" Encoding:"0xC0 /6 ib"/"MI"
{
ND_INS_SAL, ND_CAT_SHIFT, ND_SET_I86, 683,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1162 Instruction:"SAL Ev,Ib" Encoding:"0xC1 /6 ib"/"MI"
{
ND_INS_SAL, ND_CAT_SHIFT, ND_SET_I86, 683,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1163 Instruction:"SAL Eb,1" Encoding:"0xD0 /6"/"M1"
{
ND_INS_SAL, ND_CAT_SHIFT, ND_SET_I86, 683,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_CONST_1, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1164 Instruction:"SAL Ev,1" Encoding:"0xD1 /6"/"M1"
{
ND_INS_SAL, ND_CAT_SHIFT, ND_SET_I86, 683,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_CONST_1, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1165 Instruction:"SAL Eb,CL" Encoding:"0xD2 /6"/"MC"
{
ND_INS_SAL, ND_CAT_SHIFT, ND_SET_I86, 683,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1166 Instruction:"SAL Ev,CL" Encoding:"0xD3 /6"/"MC"
{
ND_INS_SAL, ND_CAT_SHIFT, ND_SET_I86, 683,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1167 Instruction:"SALC" Encoding:"0xD6"/""
{
ND_INS_SALC, ND_CAT_FLAGOP, ND_SET_I86, 684,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_CF,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1168 Instruction:"SAR Eb,Ib" Encoding:"0xC0 /7 ib"/"MI"
{
ND_INS_SAR, ND_CAT_SHIFT, ND_SET_I86, 685,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1169 Instruction:"SAR Ev,Ib" Encoding:"0xC1 /7 ib"/"MI"
{
ND_INS_SAR, ND_CAT_SHIFT, ND_SET_I86, 685,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1170 Instruction:"SAR Eb,1" Encoding:"0xD0 /7"/"M1"
{
ND_INS_SAR, ND_CAT_SHIFT, ND_SET_I86, 685,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_CONST_1, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1171 Instruction:"SAR Ev,1" Encoding:"0xD1 /7"/"M1"
{
ND_INS_SAR, ND_CAT_SHIFT, ND_SET_I86, 685,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_CONST_1, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1172 Instruction:"SAR Eb,CL" Encoding:"0xD2 /7"/"MC"
{
ND_INS_SAR, ND_CAT_SHIFT, ND_SET_I86, 685,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1173 Instruction:"SAR Ev,CL" Encoding:"0xD3 /7"/"MC"
{
ND_INS_SAR, ND_CAT_SHIFT, ND_SET_I86, 685,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1174 Instruction:"SARX Gy,Ey,By" Encoding:"vex m:2 p:2 l:0 w:x 0xF7 /r"/"RMV"
{
ND_INS_SARX, ND_CAT_BMI2, ND_SET_BMI2, 686,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_13, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI2,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_B, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:1175 Instruction:"SAVEPREVSSP" Encoding:"0xF3 0x0F 0x01 /0xEA"/""
{
ND_INS_SAVEPREVSSP, ND_CAT_CET, ND_SET_CET, 687,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_CET,
0|REG_RFLAG_CF,
0,
0,
0,
OP(ND_OPT_MEM_SHS, ND_OPS_12, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_SSP, ND_OPS_yf, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1176 Instruction:"SBB Eb,Gb" Encoding:"0x18 /r"/"MR"
{
ND_INS_SBB, ND_CAT_ARITH, ND_SET_I86, 688,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1177 Instruction:"SBB Ev,Gv" Encoding:"0x19 /r"/"MR"
{
ND_INS_SBB, ND_CAT_ARITH, ND_SET_I86, 688,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1178 Instruction:"SBB Gb,Eb" Encoding:"0x1A /r"/"RM"
{
ND_INS_SBB, ND_CAT_ARITH, ND_SET_I86, 688,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_G, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1179 Instruction:"SBB Gv,Ev" Encoding:"0x1B /r"/"RM"
{
ND_INS_SBB, ND_CAT_ARITH, ND_SET_I86, 688,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1180 Instruction:"SBB AL,Ib" Encoding:"0x1C ib"/"I"
{
ND_INS_SBB, ND_CAT_ARITH, ND_SET_I86, 688,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1181 Instruction:"SBB rAX,Iz" Encoding:"0x1D iz"/"I"
{
ND_INS_SBB, ND_CAT_ARITH, ND_SET_I86, 688,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1182 Instruction:"SBB Eb,Ib" Encoding:"0x80 /3 ib"/"MI"
{
ND_INS_SBB, ND_CAT_ARITH, ND_SET_I86, 688,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1183 Instruction:"SBB Ev,Iz" Encoding:"0x81 /3 iz"/"MI"
{
ND_INS_SBB, ND_CAT_ARITH, ND_SET_I86, 688,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1184 Instruction:"SBB Ev,Iz" Encoding:"0x82 /3 iz"/"MI"
{
ND_INS_SBB, ND_CAT_ARITH, ND_SET_I86, 688,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_I64, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1185 Instruction:"SBB Ev,Ib" Encoding:"0x83 /3 ib"/"MI"
{
ND_INS_SBB, ND_CAT_ARITH, ND_SET_I86, 688,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1186 Instruction:"SCASB AL,Yb" Encoding:"0xAE"/""
{
ND_INS_SCAS, ND_CAT_STRINGOP, ND_SET_I86, 689,
ND_MOD_ANY,
ND_PREF_REPC, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_Y, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1187 Instruction:"SCASB AL,Yb" Encoding:"rep 0xAE"/""
{
ND_INS_SCAS, ND_CAT_STRINGOP, ND_SET_I86, 689,
ND_MOD_ANY,
ND_PREF_REPC, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_ZF|REG_RFLAG_DF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_Y, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1188 Instruction:"SCASD EAX,Yv" Encoding:"ds32 0xAF"/""
{
ND_INS_SCAS, ND_CAT_STRINGOP, ND_SET_I86, 690,
ND_MOD_ANY,
ND_PREF_REPC, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1189 Instruction:"SCASD EAX,Yv" Encoding:"rep ds32 0xAF"/""
{
ND_INS_SCAS, ND_CAT_STRINGOP, ND_SET_I86, 690,
ND_MOD_ANY,
ND_PREF_REPC, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_ZF|REG_RFLAG_DF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1190 Instruction:"SCASQ RAX,Yv" Encoding:"ds64 0xAF"/""
{
ND_INS_SCAS, ND_CAT_STRINGOP, ND_SET_I86, 691,
ND_MOD_ANY,
ND_PREF_REPC, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1191 Instruction:"SCASQ RAX,Yv" Encoding:"rep ds64 0xAF"/""
{
ND_INS_SCAS, ND_CAT_STRINGOP, ND_SET_I86, 691,
ND_MOD_ANY,
ND_PREF_REPC, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_ZF|REG_RFLAG_DF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1192 Instruction:"SCASW AX,Yv" Encoding:"ds16 0xAF"/""
{
ND_INS_SCAS, ND_CAT_STRINGOP, ND_SET_I86, 692,
ND_MOD_ANY,
ND_PREF_REPC, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1193 Instruction:"SCASW AX,Yv" Encoding:"rep ds16 0xAF"/""
{
ND_INS_SCAS, ND_CAT_STRINGOP, ND_SET_I86, 692,
ND_MOD_ANY,
ND_PREF_REPC, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_ZF|REG_RFLAG_DF,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CR, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1194 Instruction:"SERIALIZE" Encoding:"NP 0x0F 0x01 /0xE8"/""
{
ND_INS_SERIALIZE, ND_CAT_MISC, ND_SET_SERIALIZE, 693,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SERIALIZE,
0,
0,
0,
0,
},
// Pos:1195 Instruction:"SETBE Eb" Encoding:"0x0F 0x96 /r"/"M"
{
ND_INS_SETcc, ND_CAT_BITBYTE, ND_SET_I386, 694,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1196 Instruction:"SETC Eb" Encoding:"0x0F 0x92 /r"/"M"
{
ND_INS_SETcc, ND_CAT_BITBYTE, ND_SET_I386, 695,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1197 Instruction:"SETL Eb" Encoding:"0x0F 0x9C /r"/"M"
{
ND_INS_SETcc, ND_CAT_BITBYTE, ND_SET_I386, 696,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, 0,
0|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1198 Instruction:"SETLE Eb" Encoding:"0x0F 0x9E /r"/"M"
{
ND_INS_SETcc, ND_CAT_BITBYTE, ND_SET_I386, 697,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, 0,
0|REG_RFLAG_SF|REG_RFLAG_ZF|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1199 Instruction:"SETNB Eb" Encoding:"0x0F 0x97 /r"/"M"
{
ND_INS_SETcc, ND_CAT_BITBYTE, ND_SET_I386, 698,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1200 Instruction:"SETNC Eb" Encoding:"0x0F 0x93 /r"/"M"
{
ND_INS_SETcc, ND_CAT_BITBYTE, ND_SET_I386, 699,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, 0,
0|REG_RFLAG_CF,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1201 Instruction:"SETNL Eb" Encoding:"0x0F 0x9D /r"/"M"
{
ND_INS_SETcc, ND_CAT_BITBYTE, ND_SET_I386, 700,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, 0,
0|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1202 Instruction:"SETNLE Eb" Encoding:"0x0F 0x9F /r"/"M"
{
ND_INS_SETcc, ND_CAT_BITBYTE, ND_SET_I386, 701,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, 0,
0|REG_RFLAG_SF|REG_RFLAG_ZF|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1203 Instruction:"SETNO Eb" Encoding:"0x0F 0x91 /r"/"M"
{
ND_INS_SETcc, ND_CAT_BITBYTE, ND_SET_I386, 702,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, 0,
0|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1204 Instruction:"SETNP Eb" Encoding:"0x0F 0x9B /r"/"M"
{
ND_INS_SETcc, ND_CAT_BITBYTE, ND_SET_I386, 703,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, 0,
0|REG_RFLAG_PF,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1205 Instruction:"SETNS Eb" Encoding:"0x0F 0x99 /r"/"M"
{
ND_INS_SETcc, ND_CAT_BITBYTE, ND_SET_I386, 704,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, 0,
0|REG_RFLAG_SF,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1206 Instruction:"SETNZ Eb" Encoding:"0x0F 0x95 /r"/"M"
{
ND_INS_SETcc, ND_CAT_BITBYTE, ND_SET_I386, 705,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, 0,
0|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1207 Instruction:"SETO Eb" Encoding:"0x0F 0x90 /r"/"M"
{
ND_INS_SETcc, ND_CAT_BITBYTE, ND_SET_I386, 706,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, 0,
0|REG_RFLAG_OF,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1208 Instruction:"SETP Eb" Encoding:"0x0F 0x9A /r"/"M"
{
ND_INS_SETcc, ND_CAT_BITBYTE, ND_SET_I386, 707,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, 0,
0|REG_RFLAG_PF,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1209 Instruction:"SETS Eb" Encoding:"0x0F 0x98 /r"/"M"
{
ND_INS_SETcc, ND_CAT_BITBYTE, ND_SET_I386, 708,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, 0,
0|REG_RFLAG_SF,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1210 Instruction:"SETSSBSY" Encoding:"0xF3 0x0F 0x01 /0xE8"/""
{
ND_INS_SETSSBSY, ND_CAT_CET, ND_SET_CET, 709,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_SHS|ND_FLAG_MODRM, ND_CFF_CET,
0,
0,
0,
0,
OP(ND_OPT_MEM_SHS0, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_SSP, ND_OPS_yf, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1211 Instruction:"SETZ Eb" Encoding:"0x0F 0x94 /r"/"M"
{
ND_INS_SETcc, ND_CAT_BITBYTE, ND_SET_I386, 710,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_COND|ND_FLAG_MODRM, 0,
0|REG_RFLAG_ZF,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1212 Instruction:"SFENCE" Encoding:"NP 0x0F 0xAE /7:reg"/""
{
ND_INS_SFENCE, ND_CAT_MISC, ND_SET_SSE2, 711,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSE2,
0,
0,
0,
0,
},
// Pos:1213 Instruction:"SGDT Ms" Encoding:"0x0F 0x01 /0:mem"/"M"
{
ND_INS_SGDT, ND_CAT_SYSTEM, ND_SET_I286REAL, 712,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_s, ND_OPF_W, 0, 0),
OP(ND_OPT_SYS_GDTR, ND_OPS_s, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1214 Instruction:"SHA1MSG1 Vdq,Wdq" Encoding:"NP 0x0F 0x38 0xC9 /r"/"RM"
{
ND_INS_SHA1MSG1, ND_CAT_SHA, ND_SET_SHA, 713,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SHA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1215 Instruction:"SHA1MSG2 Vdq,Wdq" Encoding:"NP 0x0F 0x38 0xCA /r"/"RM"
{
ND_INS_SHA1MSG2, ND_CAT_SHA, ND_SET_SHA, 714,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SHA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1216 Instruction:"SHA1NEXTE Vdq,Wdq" Encoding:"NP 0x0F 0x38 0xC8 /r"/"RM"
{
ND_INS_SHA1NEXTE, ND_CAT_SHA, ND_SET_SHA, 715,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SHA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1217 Instruction:"SHA1RNDS4 Vdq,Wdq,Ib" Encoding:"NP 0x0F 0x3A 0xCC /r ib"/"RMI"
{
ND_INS_SHA1RNDS4, ND_CAT_SHA, ND_SET_SHA, 716,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SHA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1218 Instruction:"SHA256MSG1 Vdq,Wdq" Encoding:"NP 0x0F 0x38 0xCC /r"/"RM"
{
ND_INS_SHA256MSG1, ND_CAT_SHA, ND_SET_SHA, 717,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SHA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1219 Instruction:"SHA256MSG2 Vdq,Wdq" Encoding:"NP 0x0F 0x38 0xCD /r"/"RM"
{
ND_INS_SHA256MSG2, ND_CAT_SHA, ND_SET_SHA, 718,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SHA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1220 Instruction:"SHA256RNDS2 Vdq,Wdq" Encoding:"NP 0x0F 0x38 0xCB /r"/"RM"
{
ND_INS_SHA256RNDS2, ND_CAT_SHA, ND_SET_SHA, 719,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SHA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_SSE_XMM0, ND_OPS_dq, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1221 Instruction:"SHL Eb,Ib" Encoding:"0xC0 /4 ib"/"MI"
{
ND_INS_SHL, ND_CAT_SHIFT, ND_SET_I86, 720,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1222 Instruction:"SHL Ev,Ib" Encoding:"0xC1 /4 ib"/"MI"
{
ND_INS_SHL, ND_CAT_SHIFT, ND_SET_I86, 720,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1223 Instruction:"SHL Eb,1" Encoding:"0xD0 /4"/"M1"
{
ND_INS_SHL, ND_CAT_SHIFT, ND_SET_I86, 720,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_CONST_1, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1224 Instruction:"SHL Ev,1" Encoding:"0xD1 /4"/"M1"
{
ND_INS_SHL, ND_CAT_SHIFT, ND_SET_I86, 720,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_CONST_1, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1225 Instruction:"SHL Eb,CL" Encoding:"0xD2 /4"/"MC"
{
ND_INS_SHL, ND_CAT_SHIFT, ND_SET_I86, 720,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1226 Instruction:"SHL Ev,CL" Encoding:"0xD3 /4"/"MC"
{
ND_INS_SHL, ND_CAT_SHIFT, ND_SET_I86, 720,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1227 Instruction:"SHLD Ev,Gv,Ib" Encoding:"0x0F 0xA4 /r ib"/"MRI"
{
ND_INS_SHLD, ND_CAT_SHIFT, ND_SET_I386, 721,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_CF|REG_RFLAG_AF|REG_RFLAG_OF,
0|REG_RFLAG_CF|REG_RFLAG_AF|REG_RFLAG_OF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RCW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1228 Instruction:"SHLD Ev,Gv,CL" Encoding:"0x0F 0xA5 /r"/"MRC"
{
ND_INS_SHLD, ND_CAT_SHIFT, ND_SET_I386, 721,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_CF|REG_RFLAG_AF|REG_RFLAG_OF,
0|REG_RFLAG_CF|REG_RFLAG_AF|REG_RFLAG_OF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RCW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1229 Instruction:"SHLX Gy,Ey,By" Encoding:"vex m:2 p:1 l:0 w:x 0xF7 /r"/"RMV"
{
ND_INS_SHLX, ND_CAT_BMI2, ND_SET_BMI2, 722,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_13, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI2,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_B, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:1230 Instruction:"SHR Eb,Ib" Encoding:"0xC0 /5 ib"/"MI"
{
ND_INS_SHR, ND_CAT_SHIFT, ND_SET_I86, 723,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1231 Instruction:"SHR Ev,Ib" Encoding:"0xC1 /5 ib"/"MI"
{
ND_INS_SHR, ND_CAT_SHIFT, ND_SET_I86, 723,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1232 Instruction:"SHR Eb,1" Encoding:"0xD0 /5"/"M1"
{
ND_INS_SHR, ND_CAT_SHIFT, ND_SET_I86, 723,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_CONST_1, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1233 Instruction:"SHR Ev,1" Encoding:"0xD1 /5"/"M1"
{
ND_INS_SHR, ND_CAT_SHIFT, ND_SET_I86, 723,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_CONST_1, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1234 Instruction:"SHR Eb,CL" Encoding:"0xD2 /5"/"MC"
{
ND_INS_SHR, ND_CAT_SHIFT, ND_SET_I86, 723,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1235 Instruction:"SHR Ev,CL" Encoding:"0xD3 /5"/"MC"
{
ND_INS_SHR, ND_CAT_SHIFT, ND_SET_I86, 723,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_AF,
0|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1236 Instruction:"SHRD Ev,Gv,Ib" Encoding:"0x0F 0xAC /r ib"/"MRI"
{
ND_INS_SHRD, ND_CAT_SHIFT, ND_SET_I386, 724,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_CF|REG_RFLAG_AF|REG_RFLAG_OF,
0|REG_RFLAG_CF|REG_RFLAG_AF|REG_RFLAG_OF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RCW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1237 Instruction:"SHRD Ev,Gv,CL" Encoding:"0x0F 0xAD /r"/"MRC"
{
ND_INS_SHRD, ND_CAT_SHIFT, ND_SET_I386, 724,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_CF|REG_RFLAG_AF|REG_RFLAG_OF,
0|REG_RFLAG_CF|REG_RFLAG_AF|REG_RFLAG_OF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RCW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1238 Instruction:"SHRX Gy,Ey,By" Encoding:"vex m:2 p:3 l:0 w:x 0xF7 /r"/"RMV"
{
ND_INS_SHRX, ND_CAT_BMI2, ND_SET_BMI2, 725,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_13, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI2,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_B, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:1239 Instruction:"SHUFPD Vpd,Wpd,Ib" Encoding:"0x66 0x0F 0xC6 /r ib"/"RMI"
{
ND_INS_SHUFPD, ND_CAT_SSE, ND_SET_SSE2, 726,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1240 Instruction:"SHUFPS Vps,Wps,Ib" Encoding:"NP 0x0F 0xC6 /r ib"/"RMI"
{
ND_INS_SHUFPS, ND_CAT_SSE, ND_SET_SSE, 727,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1241 Instruction:"SIDT Ms" Encoding:"0x0F 0x01 /1:mem"/"M"
{
ND_INS_SIDT, ND_CAT_SYSTEM, ND_SET_I286REAL, 728,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_s, ND_OPF_W, 0, 0),
OP(ND_OPT_SYS_IDTR, ND_OPS_s, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1242 Instruction:"SKINIT" Encoding:"0x0F 0x01 /0xDE"/""
{
ND_INS_SKINIT, ND_CAT_SYSTEM, ND_SET_SVM, 729,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_LONG|ND_MOD_VMXR,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SVM,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1243 Instruction:"SLDT Mw" Encoding:"0x0F 0x00 /0:mem"/"M"
{
ND_INS_SLDT, ND_CAT_SYSTEM, ND_SET_I286PROT, 730,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_SYS_LDTR, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1244 Instruction:"SLDT Rv" Encoding:"0x0F 0x00 /0:reg"/"M"
{
ND_INS_SLDT, ND_CAT_SYSTEM, ND_SET_I286PROT, 730,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_SYS_LDTR, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1245 Instruction:"SLWPCB Ry" Encoding:"xop m:9 0x12 /1:reg"/"M"
{
ND_INS_SLWPCB, ND_CAT_LWP, ND_SET_LWP, 731,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_LWP,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:1246 Instruction:"SMINT" Encoding:"cyrix 0x0F 0x7E"/""
{
ND_INS_SMINT, ND_CAT_SEGOP, ND_SET_CYRIX_SMM, 732,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
},
// Pos:1247 Instruction:"SMSW Mw" Encoding:"0x0F 0x01 /4:mem"/"M"
{
ND_INS_SMSW, ND_CAT_SYSTEM, ND_SET_I286REAL, 733,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_CR_0, ND_OPS_yf, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1248 Instruction:"SMSW Rv" Encoding:"0x0F 0x01 /4:reg"/"M"
{
ND_INS_SMSW, ND_CAT_SYSTEM, ND_SET_I286REAL, 733,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_CR_0, ND_OPS_yf, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1249 Instruction:"SPFLT Ry" Encoding:"vex m:1 p:3 0xAE /6:reg"/"M"
{
ND_INS_SPFLT, ND_CAT_UNKNOWN, ND_SET_UNKNOWN, 734,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:1250 Instruction:"SQRTPD Vpd,Wpd" Encoding:"0x66 0x0F 0x51 /r"/"RM"
{
ND_INS_SQRTPD, ND_CAT_SSE, ND_SET_SSE2, 735,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:1251 Instruction:"SQRTPS Vps,Wps" Encoding:"NP 0x0F 0x51 /r"/"RM"
{
ND_INS_SQRTPS, ND_CAT_SSE, ND_SET_SSE, 736,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:1252 Instruction:"SQRTSD Vsd,Wsd" Encoding:"0xF2 0x0F 0x51 /r"/"RM"
{
ND_INS_SQRTSD, ND_CAT_SSE, ND_SET_SSE2, 737,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1253 Instruction:"SQRTSS Vss,Wss" Encoding:"0xF3 0x0F 0x51 /r"/"RM"
{
ND_INS_SQRTSS, ND_CAT_SSE, ND_SET_SSE, 738,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1254 Instruction:"STAC" Encoding:"NP 0x0F 0x01 /0xCB"/""
{
ND_INS_STAC, ND_CAT_SMAP, ND_SET_SMAP, 739,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SMAP,
0,
0,
0|REG_RFLAG_AC,
0,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1255 Instruction:"STC" Encoding:"0xF9"/""
{
ND_INS_STC, ND_CAT_FLAGOP, ND_SET_I86, 740,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0|REG_RFLAG_CF,
0,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1256 Instruction:"STD" Encoding:"0xFD"/""
{
ND_INS_STD, ND_CAT_FLAGOP, ND_SET_I86, 741,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0|REG_RFLAG_DF,
0,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1257 Instruction:"STGI" Encoding:"0x0F 0x01 /0xDC"/""
{
ND_INS_STGI, ND_CAT_SYSTEM, ND_SET_SVM, 742,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_LONG|ND_MOD_VMXR,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SVM,
0,
0,
0,
0,
},
// Pos:1258 Instruction:"STI" Encoding:"0xFB"/""
{
ND_INS_STI, ND_CAT_FLAGOP, ND_SET_I86, 743,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0|REG_RFLAG_IF,
0,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1259 Instruction:"STMXCSR Md" Encoding:"NP 0x0F 0xAE /3:mem"/"M"
{
ND_INS_STMXCSR, ND_CAT_SSE, ND_SET_SSE, 744,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_MXCSR, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1260 Instruction:"STOSB Yb,AL" Encoding:"0xAA"/""
{
ND_INS_STOS, ND_CAT_STRINGOP, ND_SET_I86, 745,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1261 Instruction:"STOSB Yb,AL" Encoding:"rep 0xAA"/""
{
ND_INS_STOS, ND_CAT_STRINGOP, ND_SET_I86, 745,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_CW, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1262 Instruction:"STOSD Yv,EAX" Encoding:"ds32 0xAB"/""
{
ND_INS_STOS, ND_CAT_STRINGOP, ND_SET_I86, 746,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1263 Instruction:"STOSD Yv,EAX" Encoding:"rep ds32 0xAB"/""
{
ND_INS_STOS, ND_CAT_STRINGOP, ND_SET_I86, 746,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CW, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1264 Instruction:"STOSQ Yv,RAX" Encoding:"ds64 0xAB"/""
{
ND_INS_STOS, ND_CAT_STRINGOP, ND_SET_I86, 747,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1265 Instruction:"STOSQ Yv,RAX" Encoding:"rep ds64 0xAB"/""
{
ND_INS_STOS, ND_CAT_STRINGOP, ND_SET_I86, 747,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CW, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1266 Instruction:"STOSW Yv,AX" Encoding:"ds16 0xAB"/""
{
ND_INS_STOS, ND_CAT_STRINGOP, ND_SET_I86, 748,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1267 Instruction:"STOSW Yv,AX" Encoding:"rep ds16 0xAB"/""
{
ND_INS_STOS, ND_CAT_STRINGOP, ND_SET_I86, 748,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(2, 3), 0, 0, 0, 0, 0, 0, 0, 0,
0|REG_RFLAG_DF,
0,
0,
0,
OP(ND_OPT_Y, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_CW, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_GPR_rDI, ND_OPS_asz, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1268 Instruction:"STR Mw" Encoding:"0x0F 0x00 /1:mem"/"M"
{
ND_INS_STR, ND_CAT_SYSTEM, ND_SET_I286PROT, 749,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_SYS_TR, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1269 Instruction:"STR Rv" Encoding:"0x0F 0x00 /1:reg"/"M"
{
ND_INS_STR, ND_CAT_SYSTEM, ND_SET_I286PROT, 749,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_SYS_TR, ND_OPS_w, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1270 Instruction:"STTILECFG Moq" Encoding:"vex m:2 p:1 l:0 w:0 0x49 /0:mem"/"M"
{
ND_INS_STTILECFG, ND_CAT_AMX, ND_SET_AMXTILE, 750,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX,
0, 0, ND_OPS_CNT(1, 0), 0, ND_EXT_AMX_E2, ND_EXC_AMX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_O64, ND_CFF_AMXTILE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_oq, ND_OPF_W, 0, 0),
},
// Pos:1271 Instruction:"SUB Eb,Gb" Encoding:"0x28 /r"/"MR"
{
ND_INS_SUB, ND_CAT_ARITH, ND_SET_I86, 751,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1272 Instruction:"SUB Ev,Gv" Encoding:"0x29 /r"/"MR"
{
ND_INS_SUB, ND_CAT_ARITH, ND_SET_I86, 751,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1273 Instruction:"SUB Gb,Eb" Encoding:"0x2A /r"/"RM"
{
ND_INS_SUB, ND_CAT_ARITH, ND_SET_I86, 751,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_G, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1274 Instruction:"SUB Gv,Ev" Encoding:"0x2B /r"/"RM"
{
ND_INS_SUB, ND_CAT_ARITH, ND_SET_I86, 751,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1275 Instruction:"SUB AL,Ib" Encoding:"0x2C ib"/"I"
{
ND_INS_SUB, ND_CAT_ARITH, ND_SET_I86, 751,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1276 Instruction:"SUB rAX,Iz" Encoding:"0x2D iz"/"I"
{
ND_INS_SUB, ND_CAT_ARITH, ND_SET_I86, 751,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1277 Instruction:"SUB Eb,Ib" Encoding:"0x80 /5 ib"/"MI"
{
ND_INS_SUB, ND_CAT_ARITH, ND_SET_I86, 751,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1278 Instruction:"SUB Ev,Iz" Encoding:"0x81 /5 iz"/"MI"
{
ND_INS_SUB, ND_CAT_ARITH, ND_SET_I86, 751,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1279 Instruction:"SUB Ev,Iz" Encoding:"0x82 /5 iz"/"MI"
{
ND_INS_SUB, ND_CAT_ARITH, ND_SET_I86, 751,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_I64, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1280 Instruction:"SUB Ev,Ib" Encoding:"0x83 /5 ib"/"MI"
{
ND_INS_SUB, ND_CAT_ARITH, ND_SET_I86, 751,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1281 Instruction:"SUBPD Vpd,Wpd" Encoding:"0x66 0x0F 0x5C /r"/"RM"
{
ND_INS_SUBPD, ND_CAT_SSE, ND_SET_SSE2, 752,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:1282 Instruction:"SUBPS Vps,Wps" Encoding:"NP 0x0F 0x5C /r"/"RM"
{
ND_INS_SUBPS, ND_CAT_SSE, ND_SET_SSE, 753,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:1283 Instruction:"SUBSD Vsd,Wsd" Encoding:"0xF2 0x0F 0x5C /r"/"RM"
{
ND_INS_SUBSD, ND_CAT_SSE, ND_SET_SSE2, 754,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1284 Instruction:"SUBSS Vss,Wss" Encoding:"0xF3 0x0F 0x5C /r"/"RM"
{
ND_INS_SUBSS, ND_CAT_SSE, ND_SET_SSE, 755,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1285 Instruction:"SVDC Ms,Sw" Encoding:"cyrix 0x0F 0x78 /r:mem"/"MR"
{
ND_INS_SVDC, ND_CAT_SEGOP, ND_SET_CYRIX_SMM, 756,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_s, ND_OPF_W, 0, 0),
OP(ND_OPT_S, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:1286 Instruction:"SVLDT Ms" Encoding:"cyrix 0x0F 0x7A /r:mem"/"M"
{
ND_INS_SVLDT, ND_CAT_SEGOP, ND_SET_CYRIX_SMM, 757,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_s, ND_OPF_W, 0, 0),
},
// Pos:1287 Instruction:"SVTS Ms" Encoding:"cyrix 0x0F 0x7C /r:mem"/"M"
{
ND_INS_SVTS, ND_CAT_SEGOP, ND_SET_CYRIX_SMM, 758,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_s, ND_OPF_W, 0, 0),
},
// Pos:1288 Instruction:"SWAPGS" Encoding:"0x0F 0x01 /0xF8"/""
{
ND_INS_SWAPGS, ND_CAT_SYSTEM, ND_SET_LONGMODE, 759,
ND_MOD_R0|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_O64, 0,
0,
0,
0,
0,
OP(ND_OPT_MSR_GSBASE, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_MSR_KGSBASE, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1289 Instruction:"SYSCALL" Encoding:"o64 0x0F 0x05"/""
{
ND_INS_SYSCALL, ND_CAT_SYSCALL, ND_SET_AMD, 760,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 10), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_O64, ND_CFF_FSC,
0,
0,
0,
0,
OP(ND_OPT_MSR_STAR, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_MSR_LSTAR, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_MSR_FMASK, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_SEG_SS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rR11, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_SSP, ND_OPS_yf, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
},
// Pos:1290 Instruction:"SYSENTER" Encoding:"0x0F 0x34"/""
{
ND_INS_SYSENTER, ND_CAT_SYSCALL, ND_SET_PPRO, 761,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 8), 0, 0, 0, 0, 0, 0, 0, ND_CFF_SEP,
0,
0,
0,
0|REG_RFLAG_IF,
OP(ND_OPT_MSR_SCS, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_MSR_SESP, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_MSR_SEIP, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_SEG_SS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rSP, ND_OPS_ssz, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1291 Instruction:"SYSEXIT" Encoding:"0x0F 0x35"/""
{
ND_INS_SYSEXIT, ND_CAT_SYSRET, ND_SET_PPRO, 762,
ND_MOD_R0|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 5), 0, 0, 0, 0, 0, 0, ND_FLAG_F64, ND_CFF_SEP,
0,
0,
0,
0,
OP(ND_OPT_SEG_SS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rSP, ND_OPS_ssz, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_SSP, ND_OPS_yf, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1292 Instruction:"SYSRET" Encoding:"o64 0x0F 0x07"/""
{
ND_INS_SYSRET, ND_CAT_SYSRET, ND_SET_AMD, 763,
ND_MOD_R0|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 7), 0, 0, 0, 0, 0, 0, ND_FLAG_O64, ND_CFF_FSC,
0,
0,
0,
0,
OP(ND_OPT_MSR_STAR, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_SEG_SS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rR11, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_SEG_CS, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1293 Instruction:"T1MSKC By,Ey" Encoding:"xop m:9 0x01 /7"/"VM"
{
ND_INS_T1MSKC, ND_CAT_BITBYTE, ND_SET_TBM, 764,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TBM,
0,
0,
0,
0,
OP(ND_OPT_B, ND_OPS_y, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:1294 Instruction:"TDPBF16PS rTt,mTt,vTt" Encoding:"vex m:2 p:2 l:0 w:0 0x5C /r:reg"/""
{
ND_INS_TDPBF16PS, ND_CAT_AMX, ND_SET_AMXBF16, 765,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_AMX_E4, ND_EXC_AMX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_O64, ND_CFF_AMXBF16,
0,
0,
0,
0,
OP(ND_OPT_rT, ND_OPS_t, ND_OPF_RW, 0, 0),
OP(ND_OPT_mT, ND_OPS_t, ND_OPF_R, 0, 0),
OP(ND_OPT_vT, ND_OPS_t, ND_OPF_R, 0, 0),
},
// Pos:1295 Instruction:"TDPBSSD rTt,mTt,vTt" Encoding:"vex m:2 p:3 l:0 w:0 0x5E /r:reg"/""
{
ND_INS_TDPBSSD, ND_CAT_AMX, ND_SET_AMXINT8, 766,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_AMX_E4, ND_EXC_AMX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_O64, ND_CFF_AMXINT8,
0,
0,
0,
0,
OP(ND_OPT_rT, ND_OPS_t, ND_OPF_RW, 0, 0),
OP(ND_OPT_mT, ND_OPS_t, ND_OPF_R, 0, 0),
OP(ND_OPT_vT, ND_OPS_t, ND_OPF_R, 0, 0),
},
// Pos:1296 Instruction:"TDPBSUD rTt,mTt,vTt" Encoding:"vex m:2 p:2 l:0 w:0 0x5E /r:reg"/""
{
ND_INS_TDPBSUD, ND_CAT_AMX, ND_SET_AMXINT8, 767,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_AMX_E4, ND_EXC_AMX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_O64, ND_CFF_AMXINT8,
0,
0,
0,
0,
OP(ND_OPT_rT, ND_OPS_t, ND_OPF_RW, 0, 0),
OP(ND_OPT_mT, ND_OPS_t, ND_OPF_R, 0, 0),
OP(ND_OPT_vT, ND_OPS_t, ND_OPF_R, 0, 0),
},
// Pos:1297 Instruction:"TDPBUSD rTt,mTt,vTt" Encoding:"vex m:2 p:1 l:0 w:0 0x5E /r:reg"/""
{
ND_INS_TDPBUSD, ND_CAT_AMX, ND_SET_AMXINT8, 768,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_AMX_E4, ND_EXC_AMX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_O64, ND_CFF_AMXINT8,
0,
0,
0,
0,
OP(ND_OPT_rT, ND_OPS_t, ND_OPF_RW, 0, 0),
OP(ND_OPT_mT, ND_OPS_t, ND_OPF_R, 0, 0),
OP(ND_OPT_vT, ND_OPS_t, ND_OPF_R, 0, 0),
},
// Pos:1298 Instruction:"TDPBUUD rTt,mTt,vTt" Encoding:"vex m:2 p:0 l:0 w:0 0x5E /r:reg"/""
{
ND_INS_TDPBUUD, ND_CAT_AMX, ND_SET_AMXINT8, 769,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_AMX_E4, ND_EXC_AMX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_O64, ND_CFF_AMXINT8,
0,
0,
0,
0,
OP(ND_OPT_rT, ND_OPS_t, ND_OPF_RW, 0, 0),
OP(ND_OPT_mT, ND_OPS_t, ND_OPF_R, 0, 0),
OP(ND_OPT_vT, ND_OPS_t, ND_OPF_R, 0, 0),
},
// Pos:1299 Instruction:"TEST Eb,Gb" Encoding:"0x84 /r"/"MR"
{
ND_INS_TEST, ND_CAT_LOGIC, ND_SET_I86, 770,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1300 Instruction:"TEST Ev,Gv" Encoding:"0x85 /r"/"MR"
{
ND_INS_TEST, ND_CAT_LOGIC, ND_SET_I86, 770,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1301 Instruction:"TEST AL,Ib" Encoding:"0xA8 ib"/"I"
{
ND_INS_TEST, ND_CAT_LOGIC, ND_SET_I86, 770,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1302 Instruction:"TEST rAX,Iz" Encoding:"0xA9 iz"/"I"
{
ND_INS_TEST, ND_CAT_LOGIC, ND_SET_I86, 770,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1303 Instruction:"TEST Eb,Ib" Encoding:"0xF6 /0 ib"/"MI"
{
ND_INS_TEST, ND_CAT_LOGIC, ND_SET_I86, 770,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1304 Instruction:"TEST Eb,Ib" Encoding:"0xF6 /1 ib"/"MI"
{
ND_INS_TEST, ND_CAT_LOGIC, ND_SET_I86, 770,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1305 Instruction:"TEST Ev,Iz" Encoding:"0xF7 /0 iz"/"MI"
{
ND_INS_TEST, ND_CAT_LOGIC, ND_SET_I86, 770,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1306 Instruction:"TEST Ev,Iz" Encoding:"0xF7 /1 iz"/"MI"
{
ND_INS_TEST, ND_CAT_LOGIC, ND_SET_I86, 770,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1307 Instruction:"TILELOADD rTt,Mt" Encoding:"vex m:2 p:3 l:0 w:0 0x4B /r:mem sibmem"/"M"
{
ND_INS_TILELOADD, ND_CAT_AMX, ND_SET_AMXTILE, 771,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_AMX_E3, ND_EXC_AMX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_SIBMEM|ND_FLAG_O64, ND_CFF_AMXTILE,
0,
0,
0,
0,
OP(ND_OPT_rT, ND_OPS_t, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_t, ND_OPF_R, 0, 0),
},
// Pos:1308 Instruction:"TILELOADDT1 rTt,Mt" Encoding:"vex m:2 p:1 l:0 w:0 0x4B /r:mem sibmem"/"M"
{
ND_INS_TILELOADDT1, ND_CAT_AMX, ND_SET_AMXTILE, 772,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_AMX_E3, ND_EXC_AMX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_SIBMEM|ND_FLAG_O64, ND_CFF_AMXTILE,
0,
0,
0,
0,
OP(ND_OPT_rT, ND_OPS_t, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_t, ND_OPF_R, 0, 0),
},
// Pos:1309 Instruction:"TILERELEASE" Encoding:"vex m:2 p:0 l:0 w:0 0x49 /0xC0"/""
{
ND_INS_TILERELEASE, ND_CAT_AMX, ND_SET_AMXTILE, 773,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX,
0, 0, ND_OPS_CNT(0, 0), 0, ND_EXT_AMX_E6, ND_EXC_AMX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_O64, ND_CFF_AMXTILE,
0,
0,
0,
0,
},
// Pos:1310 Instruction:"TILESTORED Mt,rTt" Encoding:"vex m:2 p:2 l:0 w:0 0x4B /r:mem sibmem"/"M"
{
ND_INS_TILESTORED, ND_CAT_AMX, ND_SET_AMXTILE, 774,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_AMX_E3, ND_EXC_AMX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_SIBMEM|ND_FLAG_O64, ND_CFF_AMXTILE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_t, ND_OPF_W, 0, 0),
OP(ND_OPT_rT, ND_OPS_t, ND_OPF_R, 0, 0),
},
// Pos:1311 Instruction:"TILEZERO rTt" Encoding:"vex m:2 p:3 l:0 w:0 0x49 /r:reg rm:0"/""
{
ND_INS_TILEZERO, ND_CAT_AMX, ND_SET_AMXTILE, 775,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX,
0, 0, ND_OPS_CNT(1, 0), 0, ND_EXT_AMX_E5, ND_EXC_AMX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_O64, ND_CFF_AMXTILE,
0,
0,
0,
0,
OP(ND_OPT_rT, ND_OPS_t, ND_OPF_W, 0, 0),
},
// Pos:1312 Instruction:"TLBSYNC" Encoding:"0x0F 0x01 /0xFF"/""
{
ND_INS_TLBSYNC, ND_CAT_SYSTEM, ND_SET_INVLPGB, 776,
ND_MOD_R0|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_INVLPGB,
0,
0,
0,
0,
},
// Pos:1313 Instruction:"TPAUSE Ry" Encoding:"0x66 0x0F 0xAE /6:reg"/"M"
{
ND_INS_TPAUSE, ND_CAT_WAITPKG, ND_SET_WAITPKG, 777,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 3), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_WAITPKG,
0,
0|REG_RFLAG_CF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_R, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1314 Instruction:"TZCNT Gv,Ev" Encoding:"a0xF3 0x0F 0xBC /r"/"RM"
{
ND_INS_TZCNT, ND_CAT_BMI1, ND_SET_BMI1, 778,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_BMI1,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1315 Instruction:"TZMSK By,Ey" Encoding:"xop m:9 0x01 /4"/"VM"
{
ND_INS_TZMSK, ND_CAT_BITBYTE, ND_SET_TBM, 779,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TBM,
0,
0,
0,
0,
OP(ND_OPT_B, ND_OPS_y, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:1316 Instruction:"UCOMISD Vsd,Wsd" Encoding:"0x66 0x0F 0x2E /r"/"RM"
{
ND_INS_UCOMISD, ND_CAT_SSE2, ND_SET_SSE2, 780,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1317 Instruction:"UCOMISS Vss,Wss" Encoding:"NP 0x0F 0x2E /r"/"RM"
{
ND_INS_UCOMISS, ND_CAT_SSE, ND_SET_SSE, 781,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1318 Instruction:"UD0 Gd,Ed" Encoding:"0x0F 0xFF /r"/"RM"
{
ND_INS_UD0, ND_CAT_UD, ND_SET_UD, 782,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:1319 Instruction:"UD1 Gd,Ed" Encoding:"0x0F 0xB9 /r"/"RM"
{
ND_INS_UD1, ND_CAT_UD, ND_SET_UD, 783,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:1320 Instruction:"UD2" Encoding:"0x0F 0x0B"/""
{
ND_INS_UD2, ND_CAT_MISC, ND_SET_PPRO, 784,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
},
// Pos:1321 Instruction:"UMONITOR mMb" Encoding:"0xF3 0x0F 0xAE /6:reg"/"M"
{
ND_INS_UMONITOR, ND_CAT_WAITPKG, ND_SET_WAITPKG, 785,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_WAITPKG,
0,
0|REG_RFLAG_CF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_mM, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1322 Instruction:"UMWAIT Ry" Encoding:"0xF2 0x0F 0xAE /6:reg"/"M"
{
ND_INS_UMWAIT, ND_CAT_WAITPKG, ND_SET_WAITPKG, 786,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX,
0, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_WAITPKG,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1323 Instruction:"UNPCKHPD Vx,Wx" Encoding:"0x66 0x0F 0x15 /r"/"RM"
{
ND_INS_UNPCKHPD, ND_CAT_SSE, ND_SET_SSE2, 787,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1324 Instruction:"UNPCKHPS Vx,Wx" Encoding:"NP 0x0F 0x15 /r"/"RM"
{
ND_INS_UNPCKHPS, ND_CAT_SSE, ND_SET_SSE, 788,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1325 Instruction:"UNPCKLPD Vx,Wx" Encoding:"0x66 0x0F 0x14 /r"/"RM"
{
ND_INS_UNPCKLPD, ND_CAT_SSE, ND_SET_SSE2, 789,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1326 Instruction:"UNPCKLPS Vx,Wx" Encoding:"NP 0x0F 0x14 /r"/"RM"
{
ND_INS_UNPCKLPS, ND_CAT_SSE, ND_SET_SSE, 790,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1327 Instruction:"V4FMADDPS Voq{K}{z},aKq,Hoq+3,Mdq" Encoding:"evex m:2 p:3 l:2 w:0 0x9A /r:mem"/"RAVM"
{
ND_INS_V4FMADDPS, ND_CAT_VFMAPS, ND_SET_AVX5124FMAPS, 791,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T1_4X, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX5124FMAPS,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_oq, ND_OPF_R, 0, 4),
OP(ND_OPT_M, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1328 Instruction:"V4FMADDSS Vdq{K}{z},aKq,Hdq+3,Mdq" Encoding:"evex m:2 p:3 l:i w:0 0x9B /r:mem"/"RAVM"
{
ND_INS_V4FMADDSS, ND_CAT_VFMAPS, ND_SET_AVX5124FMAPS, 792,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T1_4X, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX5124FMAPS,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 4),
OP(ND_OPT_M, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1329 Instruction:"V4FNMADDPS Voq{K}{z},aKq,Hoq+3,Mdq" Encoding:"evex m:2 p:3 l:2 w:0 0xAA /r:mem"/"RAVM"
{
ND_INS_V4FNMADDPS, ND_CAT_VFMAPS, ND_SET_AVX5124FMAPS, 793,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T1_4X, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX5124FMAPS,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_oq, ND_OPF_R, 0, 4),
OP(ND_OPT_M, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1330 Instruction:"V4FNMADDSS Vdq{K}{z},aKq,Hdq+3,Mdq" Encoding:"evex m:2 p:3 l:i w:0 0xAB /r:mem"/"RAVM"
{
ND_INS_V4FNMADDSS, ND_CAT_VFMAPS, ND_SET_AVX5124FMAPS, 794,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T1_4X, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX5124FMAPS,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 4),
OP(ND_OPT_M, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1331 Instruction:"VADDPD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:1 p:1 l:x w:1 0x58 /r"/"RAVM"
{
ND_INS_VADDPD, ND_CAT_AVX512, ND_SET_AVX512F, 795,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1332 Instruction:"VADDPD Vpd,Hpd,Wpd" Encoding:"vex m:1 p:1 l:x w:i 0x58 /r"/"RVM"
{
ND_INS_VADDPD, ND_CAT_AVX, ND_SET_AVX, 795,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_pd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:1333 Instruction:"VADDPS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:1 p:0 l:x w:0 0x58 /r"/"RAVM"
{
ND_INS_VADDPS, ND_CAT_AVX512, ND_SET_AVX512F, 796,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1334 Instruction:"VADDPS Vps,Hps,Wps" Encoding:"vex m:1 p:0 l:x w:i 0x58 /r"/"RVM"
{
ND_INS_VADDPS, ND_CAT_AVX, ND_SET_AVX, 796,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ps, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:1335 Instruction:"VADDSD Vdq{K}{z},aKq,Hdq,Wsd{er}" Encoding:"evex m:1 p:3 l:i w:1 0x58 /r"/"RAVM"
{
ND_INS_VADDSD, ND_CAT_AVX512, ND_SET_AVX512F, 797,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1336 Instruction:"VADDSD Vsd,Hsd,Wsd" Encoding:"vex m:1 p:3 l:i w:i 0x58 /r"/"RVM"
{
ND_INS_VADDSD, ND_CAT_AVX, ND_SET_AVX, 797,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1337 Instruction:"VADDSS Vdq{K}{z},aKq,Hdq,Wss{er}" Encoding:"evex m:1 p:2 l:i w:0 0x58 /r"/"RAVM"
{
ND_INS_VADDSS, ND_CAT_AVX512, ND_SET_AVX512F, 798,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1338 Instruction:"VADDSS Vss,Hss,Wss" Encoding:"vex m:1 p:2 l:i w:i 0x58 /r"/"RVM"
{
ND_INS_VADDSS, ND_CAT_AVX, ND_SET_AVX, 798,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1339 Instruction:"VADDSUBPD Vpd,Hpd,Wpd" Encoding:"vex m:1 p:1 l:x w:i 0xD0 /r"/"RVM"
{
ND_INS_VADDSUBPD, ND_CAT_AVX, ND_SET_AVX, 799,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_pd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:1340 Instruction:"VADDSUBPS Vps,Hps,Wps" Encoding:"vex m:1 p:3 l:x w:i 0xD0 /r"/"RVM"
{
ND_INS_VADDSUBPS, ND_CAT_AVX, ND_SET_AVX, 800,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ps, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:1341 Instruction:"VAESDEC Vn,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:i 0xDE /r"/"RVM"
{
ND_INS_VAESDEC, ND_CAT_VAES, ND_SET_VAES, 801,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_VAES,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1342 Instruction:"VAESDEC Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0xDE /r"/"RVM"
{
ND_INS_VAESDEC, ND_CAT_AES, ND_SET_AES, 801,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AES,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1343 Instruction:"VAESDECLAST Vn,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:i 0xDF /r"/"RVM"
{
ND_INS_VAESDECLAST, ND_CAT_VAES, ND_SET_VAES, 802,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_VAES,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1344 Instruction:"VAESDECLAST Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0xDF /r"/"RVM"
{
ND_INS_VAESDECLAST, ND_CAT_AES, ND_SET_AES, 802,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AES,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1345 Instruction:"VAESENC Vn,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:i 0xDC /r"/"RVM"
{
ND_INS_VAESENC, ND_CAT_VAES, ND_SET_VAES, 803,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_VAES,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1346 Instruction:"VAESENC Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0xDC /r"/"RVM"
{
ND_INS_VAESENC, ND_CAT_AES, ND_SET_AES, 803,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AES,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1347 Instruction:"VAESENCLAST Vn,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:i 0xDD /r"/"RVM"
{
ND_INS_VAESENCLAST, ND_CAT_VAES, ND_SET_VAES, 804,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_VAES,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1348 Instruction:"VAESENCLAST Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0xDD /r"/"RVM"
{
ND_INS_VAESENCLAST, ND_CAT_AES, ND_SET_AES, 804,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AES,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1349 Instruction:"VAESIMC Vdq,Wdq" Encoding:"vex m:2 p:1 l:0 w:i 0xDB /r"/"RM"
{
ND_INS_VAESIMC, ND_CAT_AES, ND_SET_AES, 805,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AES,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1350 Instruction:"VAESKEYGENASSIST Vdq,Wdq,Ib" Encoding:"vex m:3 p:1 l:0 w:i 0xDF /r ib"/"RMI"
{
ND_INS_VAESKEYGENASSIST, ND_CAT_AES, ND_SET_AES, 806,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AES,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1351 Instruction:"VALIGND Vn{K}{z},aKq,Hn,Wn|B32,Ib" Encoding:"evex m:3 p:1 l:x w:0 0x03 /r ib"/"RAVMI"
{
ND_INS_VALIGND, ND_CAT_AVX512, ND_SET_AVX512F, 807,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1352 Instruction:"VALIGNQ Vn{K}{z},aKq,Hn,Wn|B64,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x03 /r ib"/"RAVMI"
{
ND_INS_VALIGNQ, ND_CAT_AVX512, ND_SET_AVX512F, 808,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1353 Instruction:"VANDNPD Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:1 p:1 l:x w:1 0x55 /r"/"RAVM"
{
ND_INS_VANDNPD, ND_CAT_LOGICAL_FP, ND_SET_AVX512DQ, 809,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:1354 Instruction:"VANDNPD Vpd,Hpd,Wpd" Encoding:"vex m:1 p:1 l:x w:i 0x55 /r"/"RVM"
{
ND_INS_VANDNPD, ND_CAT_LOGICAL_FP, ND_SET_AVX, 809,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_pd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:1355 Instruction:"VANDNPS Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:1 p:0 l:x w:0 0x55 /r"/"RAVM"
{
ND_INS_VANDNPS, ND_CAT_LOGICAL_FP, ND_SET_AVX512DQ, 810,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1356 Instruction:"VANDNPS Vps,Hps,Wps" Encoding:"vex m:1 p:0 l:x w:i 0x55 /r"/"RVM"
{
ND_INS_VANDNPS, ND_CAT_LOGICAL_FP, ND_SET_AVX, 810,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ps, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:1357 Instruction:"VANDPD Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:1 p:1 l:x w:1 0x54 /r"/"RAVM"
{
ND_INS_VANDPD, ND_CAT_LOGICAL_FP, ND_SET_AVX512DQ, 811,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:1358 Instruction:"VANDPD Vpd,Hpd,Wpd" Encoding:"vex m:1 p:1 l:x w:i 0x54 /r"/"RVM"
{
ND_INS_VANDPD, ND_CAT_LOGICAL_FP, ND_SET_AVX, 811,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_pd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:1359 Instruction:"VANDPS Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:1 p:0 l:x w:0 0x54 /r"/"RAVM"
{
ND_INS_VANDPS, ND_CAT_LOGICAL_FP, ND_SET_AVX512DQ, 812,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1360 Instruction:"VANDPS Vps,Hps,Wps" Encoding:"vex m:1 p:0 l:x w:i 0x54 /r"/"RVM"
{
ND_INS_VANDPS, ND_CAT_LOGICAL_FP, ND_SET_AVX, 812,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ps, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:1361 Instruction:"VBLENDMPD Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x65 /r"/"RAVM"
{
ND_INS_VBLENDMPD, ND_CAT_BLEND, ND_SET_AVX512F, 813,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:1362 Instruction:"VBLENDMPS Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x65 /r"/"RAVM"
{
ND_INS_VBLENDMPS, ND_CAT_BLEND, ND_SET_AVX512F, 814,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1363 Instruction:"VBLENDPD Vx,Hx,Wx,Ib" Encoding:"vex m:3 p:1 l:x w:i 0x0D /r ib"/"RVMI"
{
ND_INS_VBLENDPD, ND_CAT_AVX, ND_SET_AVX, 815,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1364 Instruction:"VBLENDPS Vx,Hx,Wx,Ib" Encoding:"vex m:3 p:1 l:x w:i 0x0C /r ib"/"RVMI"
{
ND_INS_VBLENDPS, ND_CAT_AVX, ND_SET_AVX, 816,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1365 Instruction:"VBLENDVPD Vx,Hx,Wx,Lx" Encoding:"vex m:3 p:1 l:x w:0 0x4B /r is4"/"RVML"
{
ND_INS_VBLENDVPD, ND_CAT_AVX, ND_SET_AVX, 817,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1366 Instruction:"VBLENDVPS Vx,Hx,Wx,Lx" Encoding:"vex m:3 p:1 l:x w:0 0x4A /r is4"/"RVML"
{
ND_INS_VBLENDVPS, ND_CAT_AVX, ND_SET_AVX, 818,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1367 Instruction:"VBROADCASTF128 Vqq,Mdq" Encoding:"vex m:2 p:1 l:1 w:0 0x1A /r:mem"/"RM"
{
ND_INS_VBROADCASTF128, ND_CAT_BROADCAST, ND_SET_AVX, 819,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1368 Instruction:"VBROADCASTF32X2 Vu{K}{z},aKq,Wq" Encoding:"evex m:2 p:1 l:x w:0 0x19 /r"/"RAM"
{
ND_INS_VBROADCASTF32X2, ND_CAT_BROADCAST, ND_SET_AVX512DQ, 820,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T2, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1369 Instruction:"VBROADCASTF32X4 Vu{K}{z},aKq,Mdq" Encoding:"evex m:2 p:1 l:x w:0 0x1A /r:mem"/"RAM"
{
ND_INS_VBROADCASTF32X4, ND_CAT_BROADCAST, ND_SET_AVX512F, 821,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T4, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1370 Instruction:"VBROADCASTF32X8 Voq{K}{z},aKq,Mqq" Encoding:"evex m:2 p:1 l:2 w:0 0x1B /r:mem"/"RAM"
{
ND_INS_VBROADCASTF32X8, ND_CAT_BROADCAST, ND_SET_AVX512DQ, 822,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T8, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_qq, ND_OPF_R, 0, 0),
},
// Pos:1371 Instruction:"VBROADCASTF64X2 Vu{K}{z},aKq,Mdq" Encoding:"evex m:2 p:1 l:x w:1 0x1A /r:mem"/"RAM"
{
ND_INS_VBROADCASTF64X2, ND_CAT_BROADCAST, ND_SET_AVX512DQ, 823,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T2, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1372 Instruction:"VBROADCASTF64X4 Voq{K}{z},aKq,Mqq" Encoding:"evex m:2 p:1 l:2 w:1 0x1B /r:mem"/"RAM"
{
ND_INS_VBROADCASTF64X4, ND_CAT_BROADCAST, ND_SET_AVX512F, 824,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T4, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_qq, ND_OPF_R, 0, 0),
},
// Pos:1373 Instruction:"VBROADCASTI128 Vqq,Mdq" Encoding:"vex m:2 p:1 l:1 w:0 0x5A /r:mem"/"RM"
{
ND_INS_VBROADCASTI128, ND_CAT_BROADCAST, ND_SET_AVX2, 825,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1374 Instruction:"VBROADCASTI32X2 Vn{K}{z},aKq,Wq" Encoding:"evex m:2 p:1 l:x w:0 0x59 /r"/"RAM"
{
ND_INS_VBROADCASTI32X2, ND_CAT_BROADCAST, ND_SET_AVX512DQ, 826,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T2, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1375 Instruction:"VBROADCASTI32X4 Vu{K}{z},aKq,Mdq" Encoding:"evex m:2 p:1 l:x w:0 0x5A /r:mem"/"RAM"
{
ND_INS_VBROADCASTI32X4, ND_CAT_BROADCAST, ND_SET_AVX512F, 827,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T4, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1376 Instruction:"VBROADCASTI32X8 Voq{K}{z},aKq,Mqq" Encoding:"evex m:2 p:1 l:2 w:0 0x5B /r:mem"/"RAM"
{
ND_INS_VBROADCASTI32X8, ND_CAT_BROADCAST, ND_SET_AVX512DQ, 828,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T8, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_qq, ND_OPF_R, 0, 0),
},
// Pos:1377 Instruction:"VBROADCASTI64X2 Vu{K}{z},aKq,Mdq" Encoding:"evex m:2 p:1 l:x w:1 0x5A /r:mem"/"RAM"
{
ND_INS_VBROADCASTI64X2, ND_CAT_BROADCAST, ND_SET_AVX512DQ, 829,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T2, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1378 Instruction:"VBROADCASTI64X4 Voq{K}{z},aKq,Mqq" Encoding:"evex m:2 p:1 l:2 w:1 0x5B /r:mem"/"RAM"
{
ND_INS_VBROADCASTI64X4, ND_CAT_BROADCAST, ND_SET_AVX512F, 830,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T4, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_qq, ND_OPF_R, 0, 0),
},
// Pos:1379 Instruction:"VBROADCASTSD Vu{K}{z},aKq,Wsd" Encoding:"evex m:2 p:1 l:x w:1 0x19 /r"/"RAM"
{
ND_INS_VBROADCASTSD, ND_CAT_BROADCAST, ND_SET_AVX512F, 831,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1380 Instruction:"VBROADCASTSD Vqq,Wsd" Encoding:"vex m:2 p:1 l:x w:0 0x19 /r"/"RM"
{
ND_INS_VBROADCASTSD, ND_CAT_BROADCAST, ND_SET_AVX, 831,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1381 Instruction:"VBROADCASTSS Vn{K}{z},aKq,Wss" Encoding:"evex m:2 p:1 l:x w:0 0x18 /r"/"RAM"
{
ND_INS_VBROADCASTSS, ND_CAT_BROADCAST, ND_SET_AVX512F, 832,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1382 Instruction:"VBROADCASTSS Vx,Wss" Encoding:"vex m:2 p:1 l:x w:0 0x18 /r"/"RM"
{
ND_INS_VBROADCASTSS, ND_CAT_BROADCAST, ND_SET_AVX, 832,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1383 Instruction:"VCMPPD rKq{K},aKq,Hn,Wn|B64{sae},Ib" Encoding:"evex m:1 p:1 l:x w:1 0xC2 /r ib"/"RAVMI"
{
ND_INS_VCMPPD, ND_CAT_AVX512, ND_SET_AVX512F, 833,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1384 Instruction:"VCMPPD Vpd,Hpd,Wpd,Ib" Encoding:"vex m:1 p:1 l:x w:i 0xC2 /r ib"/"RVMI"
{
ND_INS_VCMPPD, ND_CAT_AVX, ND_SET_AVX, 833,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_pd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1385 Instruction:"VCMPPS rKq{K},aKq,Hn,Wn|B32{sae},Ib" Encoding:"evex m:1 p:0 l:x w:0 0xC2 /r ib"/"RAVMI"
{
ND_INS_VCMPPS, ND_CAT_AVX512, ND_SET_AVX512F, 834,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1386 Instruction:"VCMPSD rKq{K},aKq,Hdq,Wsd{sae},Ib" Encoding:"evex m:1 p:3 l:x w:1 0xC2 /r ib"/"RAVMI"
{
ND_INS_VCMPSD, ND_CAT_AVX512, ND_SET_AVX512F, 835,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_SAE, ND_OPS_CNT(5, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_SAE, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1387 Instruction:"VCMPSD Vsd,Hsd,Wsd,Ib" Encoding:"vex m:1 p:3 l:i w:i 0xC2 /r ib"/"RVMI"
{
ND_INS_VCMPSD, ND_CAT_AVX, ND_SET_AVX, 835,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1388 Instruction:"VCMPSS rKq{K},aKq,Hdq,Wss{sae},Ib" Encoding:"evex m:1 p:2 l:x w:0 0xC2 /r ib"/"RAVMI"
{
ND_INS_VCMPSS, ND_CAT_AVX512, ND_SET_AVX512F, 836,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_SAE, ND_OPS_CNT(5, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_SAE, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1389 Instruction:"VCMPSS Vss,Hss,Wss,Ib" Encoding:"vex m:1 p:0 l:i w:i 0xC2 /r ib"/"RVMI"
{
ND_INS_VCMPSS, ND_CAT_AVX, ND_SET_AVX, 836,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1390 Instruction:"VCMPSS Vss,Hss,Wss,Ib" Encoding:"vex m:1 p:2 l:i w:i 0xC2 /r ib"/"RVMI"
{
ND_INS_VCMPSS, ND_CAT_AVX, ND_SET_AVX, 836,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1391 Instruction:"VCOMISD Vdq,Wsd{sae}" Encoding:"evex m:1 p:1 l:i w:1 0x2F /r"/"RM"
{
ND_INS_VCOMISD, ND_CAT_AVX512, ND_SET_AVX512F, 837,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_SAE, ND_OPS_CNT(2, 1), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_SAE, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1392 Instruction:"VCOMISD Vsd,Wsd" Encoding:"vex m:1 p:1 l:i w:i 0x2F /r"/"RM"
{
ND_INS_VCOMISD, ND_CAT_AVX, ND_SET_AVX, 837,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1393 Instruction:"VCOMISS Vdq,Wss{sae}" Encoding:"evex m:1 p:0 l:i w:0 0x2F /r"/"RM"
{
ND_INS_VCOMISS, ND_CAT_AVX512, ND_SET_AVX512F, 838,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_SAE, ND_OPS_CNT(2, 1), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_SAE, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1394 Instruction:"VCOMISS Vss,Wss" Encoding:"vex m:1 p:0 l:i w:i 0x2F /r"/"RM"
{
ND_INS_VCOMISS, ND_CAT_AVX, ND_SET_AVX, 838,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1395 Instruction:"VCOMPRESSPD Wn{K}{z},aKq,Vn" Encoding:"evex m:2 p:1 l:x w:1 0x8A /r"/"MAR"
{
ND_INS_VCOMPRESSPD, ND_CAT_COMPRESS, ND_SET_AVX512F, 839,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOMZ|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1396 Instruction:"VCOMPRESSPS Wn{K}{z},aKq,Vn" Encoding:"evex m:2 p:1 l:x w:0 0x8A /r"/"MAR"
{
ND_INS_VCOMPRESSPS, ND_CAT_COMPRESS, ND_SET_AVX512F, 840,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOMZ|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1397 Instruction:"VCVTDQ2PD Vn{K}{z},aKq,Wh|B32" Encoding:"evex m:1 p:2 l:x w:0 0xE6 /r"/"RAM"
{
ND_INS_VCVTDQ2PD, ND_CAT_CONVERT, ND_SET_AVX512F, 841,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_HV, ND_EXT_E5, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_h, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1398 Instruction:"VCVTDQ2PD Vdq,Wq" Encoding:"vex m:1 p:2 l:0 w:i 0xE6 /r"/"RM"
{
ND_INS_VCVTDQ2PD, ND_CAT_CONVERT, ND_SET_AVX, 841,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1399 Instruction:"VCVTDQ2PD Vqq,Wdq" Encoding:"vex m:1 p:2 l:1 w:i 0xE6 /r"/"RM"
{
ND_INS_VCVTDQ2PD, ND_CAT_CONVERT, ND_SET_AVX, 841,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1400 Instruction:"VCVTDQ2PS Vn{K}{z},aKq,Wn|B32{er}" Encoding:"evex m:1 p:0 l:x w:0 0x5B /r"/"RAM"
{
ND_INS_VCVTDQ2PS, ND_CAT_CONVERT, ND_SET_AVX512F, 842,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1401 Instruction:"VCVTDQ2PS Vps,Wps" Encoding:"vex m:1 p:0 l:x w:i 0x5B /r"/"RM"
{
ND_INS_VCVTDQ2PS, ND_CAT_CONVERT, ND_SET_AVX, 842,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:1402 Instruction:"VCVTNE2PS2BF16 Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:3 l:x w:0 0x72 /r"/"RAVM"
{
ND_INS_VCVTNE2PS2BF16, ND_CAT_AVX512BF16, ND_SET_AVX512BF16, 843,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BF16,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1403 Instruction:"VCVTNEPS2BF16 Vh{K}{z},aKq,Wn" Encoding:"evex m:2 p:2 l:x w:0 0x72 /r"/"RAM"
{
ND_INS_VCVTNEPS2BF16, ND_CAT_AVX512BF16, ND_SET_AVX512BF16, 844,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BF16,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_h, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1404 Instruction:"VCVTPD2DQ Vh{K}{z},aKq,Wn|B64{er}" Encoding:"evex m:1 p:3 l:x w:1 0xE6 /r"/"RAM"
{
ND_INS_VCVTPD2DQ, ND_CAT_CONVERT, ND_SET_AVX512F, 845,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_h, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1405 Instruction:"VCVTPD2DQ Vdq,Wx" Encoding:"vex m:1 p:3 l:x w:i 0xE6 /r"/"RM"
{
ND_INS_VCVTPD2DQ, ND_CAT_CONVERT, ND_SET_AVX, 845,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1406 Instruction:"VCVTPD2PS Vh{K}{z},aKq,Wn|B64{er}" Encoding:"evex m:1 p:1 l:x w:1 0x5A /r"/"RAM"
{
ND_INS_VCVTPD2PS, ND_CAT_CONVERT, ND_SET_AVX512F, 846,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_h, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1407 Instruction:"VCVTPD2PS Vdq,Wdq" Encoding:"vex m:1 p:1 l:0 w:i 0x5A /r"/"RM"
{
ND_INS_VCVTPD2PS, ND_CAT_CONVERT, ND_SET_AVX, 846,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1408 Instruction:"VCVTPD2PS Vdq,Wqq" Encoding:"vex m:1 p:1 l:1 w:i 0x5A /r"/"RM"
{
ND_INS_VCVTPD2PS, ND_CAT_CONVERT, ND_SET_AVX, 846,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_qq, ND_OPF_R, 0, 0),
},
// Pos:1409 Instruction:"VCVTPD2QQ Vn{K}{z},aKq,Wn|B64{er}" Encoding:"evex m:1 p:1 l:x w:1 0x7B /r"/"RAM"
{
ND_INS_VCVTPD2QQ, ND_CAT_CONVERT, ND_SET_AVX512DQ, 847,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1410 Instruction:"VCVTPD2UDQ Vh{K}{z},aKq,Wn|B64{er}" Encoding:"evex m:1 p:0 l:x w:1 0x79 /r"/"RAM"
{
ND_INS_VCVTPD2UDQ, ND_CAT_CONVERT, ND_SET_AVX512F, 848,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_h, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1411 Instruction:"VCVTPD2UQQ Vn{K}{z},aKq,Wn|B64{er}" Encoding:"evex m:1 p:1 l:x w:1 0x79 /r"/"RAM"
{
ND_INS_VCVTPD2UQQ, ND_CAT_CONVERT, ND_SET_AVX512DQ, 849,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_HV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1412 Instruction:"VCVTPH2PS Vn{K}{z},aKq,Wh{sae}" Encoding:"evex m:2 p:1 l:x w:0 0x13 /r"/"RAM"
{
ND_INS_VCVTPH2PS, ND_CAT_CONVERT, ND_SET_AVX512F, 850,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(3, 0), ND_TUPLE_HVM, ND_EXT_E11, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_h, ND_OPF_R, ND_OPD_SAE, 0),
},
// Pos:1413 Instruction:"VCVTPH2PS Vdq,Wq" Encoding:"vex m:2 p:1 l:0 w:0 0x13 /r"/"RM"
{
ND_INS_VCVTPH2PS, ND_CAT_CONVERT, ND_SET_F16C, 850,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_11, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_F16C,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1414 Instruction:"VCVTPH2PS Vqq,Wdq" Encoding:"vex m:2 p:1 l:1 w:0 0x13 /r"/"RM"
{
ND_INS_VCVTPH2PS, ND_CAT_CONVERT, ND_SET_F16C, 850,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_11, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_F16C,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1415 Instruction:"VCVTPS2DQ Vn{K}{z},aKq,Wn|B32{er}" Encoding:"evex m:1 p:1 l:x w:0 0x5B /r"/"RAM"
{
ND_INS_VCVTPS2DQ, ND_CAT_CONVERT, ND_SET_AVX512F, 851,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1416 Instruction:"VCVTPS2DQ Vps,Wps" Encoding:"vex m:1 p:1 l:x w:i 0x5B /r"/"RM"
{
ND_INS_VCVTPS2DQ, ND_CAT_CONVERT, ND_SET_AVX, 851,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:1417 Instruction:"VCVTPS2PD Vn{K}{z},aKq,Wh|B32{sae}" Encoding:"evex m:1 p:0 l:x w:0 0x5A /r"/"RAM"
{
ND_INS_VCVTPS2PD, ND_CAT_CONVERT, ND_SET_AVX512F, 852,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_HV, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_h, ND_OPF_R, ND_OPD_SAE|ND_OPD_B32, 0),
},
// Pos:1418 Instruction:"VCVTPS2PD Vpd,Wq" Encoding:"vex m:1 p:0 l:0 w:i 0x5A /r"/"RM"
{
ND_INS_VCVTPS2PD, ND_CAT_CONVERT, ND_SET_AVX, 852,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1419 Instruction:"VCVTPS2PD Vqq,Wdq" Encoding:"vex m:1 p:0 l:1 w:i 0x5A /r"/"RM"
{
ND_INS_VCVTPS2PD, ND_CAT_CONVERT, ND_SET_AVX, 852,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1420 Instruction:"VCVTPS2PH Wh{K}{z},aKq,Vn{sae},Ib" Encoding:"evex m:3 p:1 l:x w:0 0x1D /r ib"/"MARI"
{
ND_INS_VCVTPS2PH, ND_CAT_CONVERT, ND_SET_AVX512F, 853,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(4, 0), ND_TUPLE_HVM, ND_EXT_E11, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_h, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, ND_OPD_SAE, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1421 Instruction:"VCVTPS2PH Wq,Vdq,Ib" Encoding:"vex m:3 p:1 l:0 w:0 0x1D /r ib"/"MRI"
{
ND_INS_VCVTPS2PH, ND_CAT_CONVERT, ND_SET_F16C, 853,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_11, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_F16C,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1422 Instruction:"VCVTPS2PH Wdq,Vqq,Ib" Encoding:"vex m:3 p:1 l:1 w:0 0x1D /r ib"/"MRI"
{
ND_INS_VCVTPS2PH, ND_CAT_CONVERT, ND_SET_F16C, 853,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_11, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_F16C,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1423 Instruction:"VCVTPS2QQ Vn{K}{z},aKq,Wh|B32{er}" Encoding:"evex m:1 p:1 l:x w:0 0x7B /r"/"RAM"
{
ND_INS_VCVTPS2QQ, ND_CAT_CONVERT, ND_SET_AVX512DQ, 854,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_HV, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_h, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1424 Instruction:"VCVTPS2UDQ Vn{K}{z},aKq,Wn|B32{er}" Encoding:"evex m:1 p:0 l:x w:0 0x79 /r"/"RAM"
{
ND_INS_VCVTPS2UDQ, ND_CAT_CONVERT, ND_SET_AVX512F, 855,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1425 Instruction:"VCVTPS2UQQ Vn{K}{z},aKq,Wh|B32{er}" Encoding:"evex m:1 p:1 l:x w:0 0x79 /r"/"RAM"
{
ND_INS_VCVTPS2UQQ, ND_CAT_CONVERT, ND_SET_AVX512DQ, 856,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_HV, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_h, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1426 Instruction:"VCVTQQ2PD Vn{K}{z},aKq,Wn|B64{er}" Encoding:"evex m:1 p:2 l:x w:1 0xE6 /r"/"RAM"
{
ND_INS_VCVTQQ2PD, ND_CAT_CONVERT, ND_SET_AVX512DQ, 857,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1427 Instruction:"VCVTQQ2PS Vh{K}{z},aKq,Wn|B64{er}" Encoding:"evex m:1 p:0 l:x w:1 0x5B /r"/"RAM"
{
ND_INS_VCVTQQ2PS, ND_CAT_CONVERT, ND_SET_AVX512DQ, 858,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_h, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1428 Instruction:"VCVTSD2SI Gy,Wsd{er}" Encoding:"evex m:1 p:3 l:i w:x 0x2D /r"/"RM"
{
ND_INS_VCVTSD2SI, ND_CAT_CONVERT, ND_SET_AVX512F, 859,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_ER, ND_OPS_CNT(2, 0), ND_TUPLE_T1F, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1429 Instruction:"VCVTSD2SI Gy,Wsd" Encoding:"vex m:1 p:3 l:i w:x 0x2D /r"/"RM"
{
ND_INS_VCVTSD2SI, ND_CAT_CONVERT, ND_SET_AVX, 859,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1430 Instruction:"VCVTSD2SS Vdq{K}{z},aKq,Hdq,Wsd{er}" Encoding:"evex m:1 p:3 l:i w:1 0x5A /r"/"RAVM"
{
ND_INS_VCVTSD2SS, ND_CAT_CONVERT, ND_SET_AVX512F, 860,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1431 Instruction:"VCVTSD2SS Vss,Hx,Wsd" Encoding:"vex m:1 p:3 l:i w:i 0x5A /r"/"RVM"
{
ND_INS_VCVTSD2SS, ND_CAT_CONVERT, ND_SET_AVX, 860,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1432 Instruction:"VCVTSD2USI Gy,Wsd{er}" Encoding:"evex m:1 p:3 l:i w:x 0x79 /r"/"RM"
{
ND_INS_VCVTSD2USI, ND_CAT_CONVERT, ND_SET_AVX512F, 861,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_ER, ND_OPS_CNT(2, 0), ND_TUPLE_T1F, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1433 Instruction:"VCVTSI2SD Vdq,Hdq{er},Ey" Encoding:"evex m:1 p:3 l:i w:0 0x2A /r"/"RVM"
{
ND_INS_VCVTSI2SD, ND_CAT_CONVERT, ND_SET_AVX512F, 862,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_ER, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E10NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, ND_OPD_ER, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:1434 Instruction:"VCVTSI2SD Vdq,Hdq{er},Ey" Encoding:"evex m:1 p:3 l:i w:1 0x2A /r"/"RVM"
{
ND_INS_VCVTSI2SD, ND_CAT_CONVERT, ND_SET_AVX512F, 862,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_ER, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, ND_OPD_ER, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:1435 Instruction:"VCVTSI2SD Vsd,Hsd,Ey" Encoding:"vex m:1 p:3 l:i w:x 0x2A /r"/"RVM"
{
ND_INS_VCVTSI2SD, ND_CAT_CONVERT, ND_SET_AVX, 862,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:1436 Instruction:"VCVTSI2SS Vdq,Hdq{er},Ey" Encoding:"evex m:1 p:2 l:i w:x 0x2A /r"/"RVM"
{
ND_INS_VCVTSI2SS, ND_CAT_CONVERT, ND_SET_AVX512F, 863,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_ER, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, ND_OPD_ER, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:1437 Instruction:"VCVTSI2SS Vss,Hss,Ey" Encoding:"vex m:1 p:2 l:i w:x 0x2A /r"/"RVM"
{
ND_INS_VCVTSI2SS, ND_CAT_CONVERT, ND_SET_AVX, 863,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:1438 Instruction:"VCVTSS2SD Vdq{K}{z},aKq,Hdq,Wss{sae}" Encoding:"evex m:1 p:2 l:i w:0 0x5A /r"/"RAVM"
{
ND_INS_VCVTSS2SD, ND_CAT_CONVERT, ND_SET_AVX512F, 864,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_SAE, 0),
},
// Pos:1439 Instruction:"VCVTSS2SD Vsd,Hx,Wss" Encoding:"vex m:1 p:2 l:i w:i 0x5A /r"/"RVM"
{
ND_INS_VCVTSS2SD, ND_CAT_CONVERT, ND_SET_AVX, 864,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1440 Instruction:"VCVTSS2SI Gy,Wss{er}" Encoding:"evex m:1 p:2 l:i w:x 0x2D /r"/"RM"
{
ND_INS_VCVTSS2SI, ND_CAT_CONVERT, ND_SET_AVX512F, 865,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_ER, ND_OPS_CNT(2, 0), ND_TUPLE_T1F, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1441 Instruction:"VCVTSS2SI Gy,Wss" Encoding:"vex m:1 p:2 l:i w:x 0x2D /r"/"RM"
{
ND_INS_VCVTSS2SI, ND_CAT_CONVERT, ND_SET_AVX, 865,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1442 Instruction:"VCVTSS2USI Gy,Wss{er}" Encoding:"evex m:1 p:2 l:i w:x 0x79 /r"/"RM"
{
ND_INS_VCVTSS2USI, ND_CAT_CONVERT, ND_SET_AVX512F, 866,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_ER, ND_OPS_CNT(2, 0), ND_TUPLE_T1F, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1443 Instruction:"VCVTTPD2DQ Vh{K}{z},aKq,Wn|B64{sae}" Encoding:"evex m:1 p:1 l:x w:1 0xE6 /r"/"RAM"
{
ND_INS_VCVTTPD2DQ, ND_CAT_CONVERT, ND_SET_AVX512F, 867,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_h, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B64, 0),
},
// Pos:1444 Instruction:"VCVTTPD2DQ Vdq,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xE6 /r"/"RM"
{
ND_INS_VCVTTPD2DQ, ND_CAT_CONVERT, ND_SET_AVX, 867,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1445 Instruction:"VCVTTPD2QQ Vn{K}{z},aKq,Wn|B64{sae}" Encoding:"evex m:1 p:1 l:x w:1 0x7A /r"/"RAM"
{
ND_INS_VCVTTPD2QQ, ND_CAT_CONVERT, ND_SET_AVX512DQ, 868,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B64, 0),
},
// Pos:1446 Instruction:"VCVTTPD2UDQ Vh{K}{z},aKq,Wn|B64{sae}" Encoding:"evex m:1 p:0 l:x w:1 0x78 /r"/"RAM"
{
ND_INS_VCVTTPD2UDQ, ND_CAT_CONVERT, ND_SET_AVX512F, 869,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_h, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B64, 0),
},
// Pos:1447 Instruction:"VCVTTPD2UQQ Vn{K}{z},aKq,Wn|B64{sae}" Encoding:"evex m:1 p:1 l:x w:1 0x78 /r"/"RAM"
{
ND_INS_VCVTTPD2UQQ, ND_CAT_CONVERT, ND_SET_AVX512DQ, 870,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B64, 0),
},
// Pos:1448 Instruction:"VCVTTPS2DQ Vn{K}{z},aKq,Wn|B32{sae}" Encoding:"evex m:1 p:2 l:x w:0 0x5B /r"/"RAM"
{
ND_INS_VCVTTPS2DQ, ND_CAT_CONVERT, ND_SET_AVX512F, 871,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B32, 0),
},
// Pos:1449 Instruction:"VCVTTPS2DQ Vps,Wps" Encoding:"vex m:1 p:2 l:x w:i 0x5B /r"/"RM"
{
ND_INS_VCVTTPS2DQ, ND_CAT_CONVERT, ND_SET_AVX, 871,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:1450 Instruction:"VCVTTPS2QQ Vn{K}{z},aKq,Wh|B32{sae}" Encoding:"evex m:1 p:1 l:x w:0 0x7A /r"/"RAM"
{
ND_INS_VCVTTPS2QQ, ND_CAT_CONVERT, ND_SET_AVX512DQ, 872,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_HV, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_h, ND_OPF_R, ND_OPD_SAE|ND_OPD_B32, 0),
},
// Pos:1451 Instruction:"VCVTTPS2UDQ Vn{K}{z},aKq,Wn|B32{sae}" Encoding:"evex m:1 p:0 l:x w:0 0x78 /r"/"RAM"
{
ND_INS_VCVTTPS2UDQ, ND_CAT_CONVERT, ND_SET_AVX512F, 873,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B32, 0),
},
// Pos:1452 Instruction:"VCVTTPS2UQQ Vn{K}{z},aKq,Wh|B32{sae}" Encoding:"evex m:1 p:1 l:x w:0 0x78 /r"/"RAM"
{
ND_INS_VCVTTPS2UQQ, ND_CAT_CONVERT, ND_SET_AVX512DQ, 874,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_HV, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_h, ND_OPF_R, ND_OPD_SAE|ND_OPD_B32, 0),
},
// Pos:1453 Instruction:"VCVTTSD2SI Gy,Wsd{sae}" Encoding:"evex m:1 p:3 l:i w:x 0x2C /r"/"RM"
{
ND_INS_VCVTTSD2SI, ND_CAT_CONVERT, ND_SET_AVX512F, 875,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_SAE, ND_OPS_CNT(2, 0), ND_TUPLE_T1F, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_SAE, 0),
},
// Pos:1454 Instruction:"VCVTTSD2SI Gy,Wsd" Encoding:"vex m:1 p:3 l:i w:x 0x2C /r"/"RM"
{
ND_INS_VCVTTSD2SI, ND_CAT_CONVERT, ND_SET_AVX, 875,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1455 Instruction:"VCVTTSD2USI Gy,Wsd{sae}" Encoding:"evex m:1 p:3 l:i w:x 0x78 /r"/"RM"
{
ND_INS_VCVTTSD2USI, ND_CAT_CONVERT, ND_SET_AVX512F, 876,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_SAE, ND_OPS_CNT(2, 0), ND_TUPLE_T1F, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_SAE, 0),
},
// Pos:1456 Instruction:"VCVTTSS2SI Gy,Wss{sae}" Encoding:"evex m:1 p:2 l:i w:x 0x2C /r"/"RM"
{
ND_INS_VCVTTSS2SI, ND_CAT_CONVERT, ND_SET_AVX512F, 877,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_SAE, ND_OPS_CNT(2, 0), ND_TUPLE_T1F, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_SAE, 0),
},
// Pos:1457 Instruction:"VCVTTSS2SI Gy,Wss" Encoding:"vex m:1 p:2 l:i w:x 0x2C /r"/"RM"
{
ND_INS_VCVTTSS2SI, ND_CAT_CONVERT, ND_SET_AVX, 877,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1458 Instruction:"VCVTTSS2USI Gy,Wss{sae}" Encoding:"evex m:1 p:2 l:i w:x 0x78 /r"/"RM"
{
ND_INS_VCVTTSS2USI, ND_CAT_CONVERT, ND_SET_AVX512F, 878,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_SAE, ND_OPS_CNT(2, 0), ND_TUPLE_T1F, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_SAE, 0),
},
// Pos:1459 Instruction:"VCVTUDQ2PD Vn{K}{z},aKq,Wh|B32" Encoding:"evex m:1 p:2 l:x w:0 0x7A /r"/"RAM"
{
ND_INS_VCVTUDQ2PD, ND_CAT_CONVERT, ND_SET_AVX512F, 879,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_HV, ND_EXT_E5, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_h, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1460 Instruction:"VCVTUDQ2PS Vn{K}{z},aKq,Wn|B32{er}" Encoding:"evex m:1 p:3 l:x w:0 0x7A /r"/"RAM"
{
ND_INS_VCVTUDQ2PS, ND_CAT_CONVERT, ND_SET_AVX512F, 880,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1461 Instruction:"VCVTUQQ2PD Vn{K}{z},aKq,Wn|B64{er}" Encoding:"evex m:1 p:2 l:x w:1 0x7A /r"/"RAM"
{
ND_INS_VCVTUQQ2PD, ND_CAT_CONVERT, ND_SET_AVX512DQ, 881,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1462 Instruction:"VCVTUQQ2PS Vh{K}{z},aKq,Wn|B64{er}" Encoding:"evex m:1 p:3 l:x w:1 0x7A /r"/"RAM"
{
ND_INS_VCVTUQQ2PS, ND_CAT_CONVERT, ND_SET_AVX512DQ, 882,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_h, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1463 Instruction:"VCVTUSI2SD Vdq,Hdq{er},Ey" Encoding:"evex m:1 p:3 l:i w:0 0x7B /r"/"RVM"
{
ND_INS_VCVTUSI2SD, ND_CAT_CONVERT, ND_SET_AVX512F, 883,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_ER, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E10NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, ND_OPD_ER, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:1464 Instruction:"VCVTUSI2SD Vdq,Hdq{er},Ey" Encoding:"evex m:1 p:3 l:i w:1 0x7B /r"/"RVM"
{
ND_INS_VCVTUSI2SD, ND_CAT_CONVERT, ND_SET_AVX512F, 883,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_ER, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, ND_OPD_ER, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:1465 Instruction:"VCVTUSI2SS Vss,Hss{er},Ey" Encoding:"evex m:1 p:2 l:i w:x 0x7B /r"/"RVM"
{
ND_INS_VCVTUSI2SS, ND_CAT_CONVERT, ND_SET_AVX512F, 884,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_ER, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:1466 Instruction:"VDBPSADBW Vn{K}{z},aKq,Hn,Wn,Ib" Encoding:"evex m:3 p:1 l:x w:0 0x42 /r ib"/"RAVMI"
{
ND_INS_VDBPSADBW, ND_CAT_AVX512, ND_SET_AVX512BW, 885,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(5, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1467 Instruction:"VDIVPD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:1 p:1 l:x w:1 0x5E /r"/"RAVM"
{
ND_INS_VDIVPD, ND_CAT_AVX512, ND_SET_AVX512F, 886,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1468 Instruction:"VDIVPD Vpd,Hpd,Wpd" Encoding:"vex m:1 p:1 l:x w:i 0x5E /r"/"RVM"
{
ND_INS_VDIVPD, ND_CAT_AVX, ND_SET_AVX, 886,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_pd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:1469 Instruction:"VDIVPS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:1 p:0 l:x w:0 0x5E /r"/"RAVM"
{
ND_INS_VDIVPS, ND_CAT_AVX512, ND_SET_AVX512F, 887,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1470 Instruction:"VDIVPS Vps,Hps,Wps" Encoding:"vex m:1 p:0 l:x w:i 0x5E /r"/"RVM"
{
ND_INS_VDIVPS, ND_CAT_AVX, ND_SET_AVX, 887,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ps, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:1471 Instruction:"VDIVSD Vdq{K}{z},aKq,Hdq,Wsd{er}" Encoding:"evex m:1 p:3 l:i w:1 0x5E /r"/"RAVM"
{
ND_INS_VDIVSD, ND_CAT_AVX512, ND_SET_AVX512F, 888,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1472 Instruction:"VDIVSD Vsd,Hsd,Wsd" Encoding:"vex m:1 p:3 l:i w:i 0x5E /r"/"RVM"
{
ND_INS_VDIVSD, ND_CAT_AVX, ND_SET_AVX, 888,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1473 Instruction:"VDIVSS Vdq{K}{z},aKq,Hdq,Wss{er}" Encoding:"evex m:1 p:2 l:i w:0 0x5E /r"/"RAVM"
{
ND_INS_VDIVSS, ND_CAT_AVX512, ND_SET_AVX512F, 889,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1474 Instruction:"VDIVSS Vss,Hss,Wss" Encoding:"vex m:1 p:2 l:i w:i 0x5E /r"/"RVM"
{
ND_INS_VDIVSS, ND_CAT_AVX, ND_SET_AVX, 889,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1475 Instruction:"VDPBF16PS Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:2 l:x w:0 0x52 /r"/"RAVM"
{
ND_INS_VDPBF16PS, ND_CAT_AVX512BF16, ND_SET_AVX512BF16, 890,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BF16,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1476 Instruction:"VDPPD Vdq,Hdq,Wdq,Ib" Encoding:"vex m:3 p:1 l:0 w:i 0x41 /r ib"/"RVMI"
{
ND_INS_VDPPD, ND_CAT_AVX, ND_SET_AVX, 891,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1477 Instruction:"VDPPS Vx,Hx,Wx,Ib" Encoding:"vex m:3 p:1 l:x w:i 0x40 /r ib"/"RVMI"
{
ND_INS_VDPPS, ND_CAT_AVX, ND_SET_AVX, 892,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1478 Instruction:"VERR Ew" Encoding:"0x0F 0x00 /4"/"M"
{
ND_INS_VERR, ND_CAT_SYSTEM, ND_SET_I286PROT, 893,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_E, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1479 Instruction:"VERW Ew" Encoding:"0x0F 0x00 /5"/"M"
{
ND_INS_VERW, ND_CAT_SYSTEM, ND_SET_I286PROT, 894,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_E, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1480 Instruction:"VEXP2PD Voq{K}{z},aKq,Woq|B64{sae}" Encoding:"evex m:2 p:1 l:2 w:1 0xC8 /r"/"RAM"
{
ND_INS_VEXP2PD, ND_CAT_KNL, ND_SET_AVX512ER, 895,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512ER,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_oq, ND_OPF_R, ND_OPD_SAE|ND_OPD_B64, 0),
},
// Pos:1481 Instruction:"VEXP2PS Voq{K}{z},aKq,Woq|B32{sae}" Encoding:"evex m:2 p:1 l:2 w:0 0xC8 /r"/"RAM"
{
ND_INS_VEXP2PS, ND_CAT_KNL, ND_SET_AVX512ER, 896,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512ER,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_oq, ND_OPF_R, ND_OPD_SAE|ND_OPD_B32, 0),
},
// Pos:1482 Instruction:"VEXPANDPD Vn{K}{z},aKq,Wn" Encoding:"evex m:2 p:1 l:x w:1 0x88 /r"/"RAM"
{
ND_INS_VEXPANDPD, ND_CAT_EXPAND, ND_SET_AVX512F, 897,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1483 Instruction:"VEXPANDPS Vn{K}{z},aKq,Wn" Encoding:"evex m:2 p:1 l:x w:0 0x88 /r"/"RAM"
{
ND_INS_VEXPANDPS, ND_CAT_EXPAND, ND_SET_AVX512F, 898,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1484 Instruction:"VEXTRACTF128 Wdq,Vqq,Ib" Encoding:"vex m:3 p:1 l:1 w:0 0x19 /r ib"/"MRI"
{
ND_INS_VEXTRACTF128, ND_CAT_AVX, ND_SET_AVX, 899,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1485 Instruction:"VEXTRACTF32X4 Wdq{K}{z},aKq,Vu,Ib" Encoding:"evex m:3 p:1 l:x w:0 0x19 /r ib"/"MARI"
{
ND_INS_VEXTRACTF32X4, ND_CAT_AVX512, ND_SET_AVX512F, 900,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T4, ND_EXT_E6NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_u, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1486 Instruction:"VEXTRACTF32X8 Wqq{K}{z},aKq,Voq,Ib" Encoding:"evex m:3 p:1 l:2 w:0 0x1B /r ib"/"MARI"
{
ND_INS_VEXTRACTF32X8, ND_CAT_AVX512, ND_SET_AVX512DQ, 901,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T8, ND_EXT_E6NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_qq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1487 Instruction:"VEXTRACTF64X2 Wdq{K}{z},aKq,Vu,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x19 /r ib"/"MARI"
{
ND_INS_VEXTRACTF64X2, ND_CAT_AVX512, ND_SET_AVX512DQ, 902,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T2, ND_EXT_E6NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_u, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1488 Instruction:"VEXTRACTF64X4 Wqq{K}{z},aKq,Voq,Ib" Encoding:"evex m:3 p:1 l:2 w:1 0x1B /r ib"/"MARI"
{
ND_INS_VEXTRACTF64X4, ND_CAT_AVX512, ND_SET_AVX512F, 903,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T4, ND_EXT_E6NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_qq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1489 Instruction:"VEXTRACTI128 Wdq,Vqq,Ib" Encoding:"vex m:3 p:1 l:1 w:0 0x39 /r ib"/"MRI"
{
ND_INS_VEXTRACTI128, ND_CAT_AVX2, ND_SET_AVX2, 904,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1490 Instruction:"VEXTRACTI32X4 Wdq{K}{z},aKq,Vu,Ib" Encoding:"evex m:3 p:1 l:x w:0 0x39 /r ib"/"MARI"
{
ND_INS_VEXTRACTI32X4, ND_CAT_AVX512, ND_SET_AVX512F, 905,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T4, ND_EXT_E6NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_u, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1491 Instruction:"VEXTRACTI32X8 Wqq{K}{z},aKq,Voq,Ib" Encoding:"evex m:3 p:1 l:2 w:0 0x3B /r ib"/"MARI"
{
ND_INS_VEXTRACTI32X8, ND_CAT_AVX512, ND_SET_AVX512DQ, 906,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T8, ND_EXT_E6NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_qq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1492 Instruction:"VEXTRACTI64X2 Wdq{K}{z},aKq,Vu,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x39 /r ib"/"MARI"
{
ND_INS_VEXTRACTI64X2, ND_CAT_AVX512, ND_SET_AVX512DQ, 907,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T2, ND_EXT_E6NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_u, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1493 Instruction:"VEXTRACTI64X4 Wqq{K}{z},aKq,Voq,Ib" Encoding:"evex m:3 p:1 l:2 w:1 0x3B /r ib"/"MARI"
{
ND_INS_VEXTRACTI64X4, ND_CAT_AVX512, ND_SET_AVX512F, 908,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T4, ND_EXT_E6NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_qq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1494 Instruction:"VEXTRACTPS Md,Vdq,Ib" Encoding:"evex m:3 p:1 l:0 w:i 0x17 /r:mem ib"/"MRI"
{
ND_INS_VEXTRACTPS, ND_CAT_AVX512, ND_SET_AVX512F, 909,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1495 Instruction:"VEXTRACTPS Ry,Vdq,Ib" Encoding:"evex m:3 p:1 l:0 w:i 0x17 /r:reg ib"/"MRI"
{
ND_INS_VEXTRACTPS, ND_CAT_AVX512, ND_SET_AVX512F, 909,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1496 Instruction:"VEXTRACTPS Md,Vdq,Ib" Encoding:"vex m:3 p:1 l:0 w:i 0x17 /r:mem ib"/"MRI"
{
ND_INS_VEXTRACTPS, ND_CAT_AVX, ND_SET_AVX, 909,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1497 Instruction:"VEXTRACTPS Ry,Vdq,Ib" Encoding:"vex m:3 p:1 l:0 w:i 0x17 /r:reg ib"/"MRI"
{
ND_INS_VEXTRACTPS, ND_CAT_AVX, ND_SET_AVX, 909,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1498 Instruction:"VFIXUPIMMPD Vn{K}{z},aKq,Hn,Wn|B64{sae},Ib" Encoding:"evex m:3 p:1 l:x w:1 0x54 /r ib"/"RAVMI"
{
ND_INS_VFIXUPIMMPD, ND_CAT_AVX512, ND_SET_AVX512F, 910,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1499 Instruction:"VFIXUPIMMPS Vn{K}{z},aKq,Hn,Wn|B32{sae},Ib" Encoding:"evex m:3 p:1 l:x w:0 0x54 /r ib"/"RAVMI"
{
ND_INS_VFIXUPIMMPS, ND_CAT_AVX512, ND_SET_AVX512F, 911,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1500 Instruction:"VFIXUPIMMSD Vdq{K}{z},aKq,Hdq,Wsd{sae},Ib" Encoding:"evex m:3 p:1 l:i w:1 0x55 /r ib"/"RAVMI"
{
ND_INS_VFIXUPIMMSD, ND_CAT_AVX512, ND_SET_AVX512F, 912,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(5, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_SAE, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1501 Instruction:"VFIXUPIMMSS Vdq{K}{z},aKq,Hdq,Wss{sae},Ib" Encoding:"evex m:3 p:1 l:i w:0 0x55 /r ib"/"RAVMI"
{
ND_INS_VFIXUPIMMSS, ND_CAT_AVX512, ND_SET_AVX512F, 913,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(5, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_SAE, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1502 Instruction:"VFMADD132PD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:2 p:1 l:x w:1 0x98 /r"/"RAVM"
{
ND_INS_VFMADD132PD, ND_CAT_VFMA, ND_SET_AVX512F, 914,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1503 Instruction:"VFMADD132PD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0x98 /r"/"RVM"
{
ND_INS_VFMADD132PD, ND_CAT_VFMA, ND_SET_FMA, 914,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1504 Instruction:"VFMADD132PS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:2 p:1 l:x w:0 0x98 /r"/"RAVM"
{
ND_INS_VFMADD132PS, ND_CAT_VFMA, ND_SET_AVX512F, 915,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1505 Instruction:"VFMADD132PS Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0x98 /r"/"RVM"
{
ND_INS_VFMADD132PS, ND_CAT_VFMA, ND_SET_FMA, 915,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1506 Instruction:"VFMADD132SD Vdq{K}{z},aKq,Hdq,Wsd{er}" Encoding:"evex m:2 p:1 l:i w:1 0x99 /r"/"RAVM"
{
ND_INS_VFMADD132SD, ND_CAT_VFMA, ND_SET_AVX512F, 916,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1507 Instruction:"VFMADD132SD Vdq,Hdq,Wsd" Encoding:"vex m:2 p:1 l:x w:1 0x99 /r"/"RVM"
{
ND_INS_VFMADD132SD, ND_CAT_VFMA, ND_SET_FMA, 916,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1508 Instruction:"VFMADD132SS Vdq{K}{z},aKq,Hdq,Wss{er}" Encoding:"evex m:2 p:1 l:i w:0 0x99 /r"/"RAVM"
{
ND_INS_VFMADD132SS, ND_CAT_VFMA, ND_SET_AVX512F, 917,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1509 Instruction:"VFMADD132SS Vdq,Hdq,Wss" Encoding:"vex m:2 p:1 l:x w:0 0x99 /r"/"RVM"
{
ND_INS_VFMADD132SS, ND_CAT_VFMA, ND_SET_FMA, 917,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1510 Instruction:"VFMADD213PD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:2 p:1 l:x w:1 0xA8 /r"/"RAVM"
{
ND_INS_VFMADD213PD, ND_CAT_VFMA, ND_SET_AVX512F, 918,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1511 Instruction:"VFMADD213PD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0xA8 /r"/"RVM"
{
ND_INS_VFMADD213PD, ND_CAT_VFMA, ND_SET_FMA, 918,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1512 Instruction:"VFMADD213PS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:2 p:1 l:x w:0 0xA8 /r"/"RAVM"
{
ND_INS_VFMADD213PS, ND_CAT_VFMA, ND_SET_AVX512F, 919,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1513 Instruction:"VFMADD213PS Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0xA8 /r"/"RVM"
{
ND_INS_VFMADD213PS, ND_CAT_VFMA, ND_SET_FMA, 919,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1514 Instruction:"VFMADD213SD Vdq{K}{z},aKq,Hdq,Wsd{er}" Encoding:"evex m:2 p:1 l:i w:1 0xA9 /r"/"RAVM"
{
ND_INS_VFMADD213SD, ND_CAT_VFMA, ND_SET_AVX512F, 920,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1515 Instruction:"VFMADD213SD Vdq,Hdq,Wsd" Encoding:"vex m:2 p:1 l:0 w:1 0xA9 /r"/"RVM"
{
ND_INS_VFMADD213SD, ND_CAT_VFMA, ND_SET_FMA, 920,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1516 Instruction:"VFMADD213SS Vdq{K}{z},aKq,Hdq,Wss{er}" Encoding:"evex m:2 p:1 l:i w:0 0xA9 /r"/"RAVM"
{
ND_INS_VFMADD213SS, ND_CAT_VFMA, ND_SET_AVX512F, 921,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1517 Instruction:"VFMADD213SS Vdq,Hdq,Wss" Encoding:"vex m:2 p:1 l:0 w:0 0xA9 /r"/"RVM"
{
ND_INS_VFMADD213SS, ND_CAT_VFMA, ND_SET_FMA, 921,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1518 Instruction:"VFMADD231PD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:2 p:1 l:x w:1 0xB8 /r"/"RAVM"
{
ND_INS_VFMADD231PD, ND_CAT_VFMA, ND_SET_AVX512F, 922,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1519 Instruction:"VFMADD231PD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0xB8 /r"/"RVM"
{
ND_INS_VFMADD231PD, ND_CAT_VFMA, ND_SET_FMA, 922,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1520 Instruction:"VFMADD231PS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:2 p:1 l:x w:0 0xB8 /r"/"RAVM"
{
ND_INS_VFMADD231PS, ND_CAT_VFMA, ND_SET_AVX512F, 923,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1521 Instruction:"VFMADD231PS Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0xB8 /r"/"RVM"
{
ND_INS_VFMADD231PS, ND_CAT_VFMA, ND_SET_FMA, 923,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1522 Instruction:"VFMADD231SD Vdq{K}{z},aKq,Hdq,Wsd{er}" Encoding:"evex m:2 p:1 l:i w:1 0xB9 /r"/"RAVM"
{
ND_INS_VFMADD231SD, ND_CAT_VFMA, ND_SET_AVX512F, 924,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1523 Instruction:"VFMADD231SD Vdq,Hdq,Wsd" Encoding:"vex m:2 p:1 l:0 w:1 0xB9 /r"/"RVM"
{
ND_INS_VFMADD231SD, ND_CAT_VFMA, ND_SET_FMA, 924,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1524 Instruction:"VFMADD231SS Vdq{K}{z},aKq,Hdq,Wss{er}" Encoding:"evex m:2 p:1 l:i w:0 0xB9 /r"/"RAVM"
{
ND_INS_VFMADD231SS, ND_CAT_VFMA, ND_SET_AVX512F, 925,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1525 Instruction:"VFMADD231SS Vdq,Hdq,Wss" Encoding:"vex m:2 p:1 l:0 w:0 0xB9 /r"/"RVM"
{
ND_INS_VFMADD231SS, ND_CAT_VFMA, ND_SET_FMA, 925,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1526 Instruction:"VFMADDPD Vx,Hx,Wx,Lx" Encoding:"vex m:3 p:1 l:x w:0 0x69 /r is4"/"RVML"
{
ND_INS_VFMADDPD, ND_CAT_FMA4, ND_SET_FMA4, 926,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1527 Instruction:"VFMADDPD Vx,Hx,Lx,Wx" Encoding:"vex m:3 p:1 l:x w:1 0x69 /r is4"/"RVLM"
{
ND_INS_VFMADDPD, ND_CAT_FMA4, ND_SET_FMA4, 926,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1528 Instruction:"VFMADDPS Vx,Hx,Wx,Lx" Encoding:"vex m:3 p:1 l:x w:0 0x68 /r is4"/"RVML"
{
ND_INS_VFMADDPS, ND_CAT_FMA4, ND_SET_FMA4, 927,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1529 Instruction:"VFMADDPS Vx,Hx,Lx,Wx" Encoding:"vex m:3 p:1 l:x w:1 0x68 /r is4"/"RVLM"
{
ND_INS_VFMADDPS, ND_CAT_FMA4, ND_SET_FMA4, 927,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1530 Instruction:"VFMADDSD Vdq,Hdq,Wsd,Ldq" Encoding:"vex m:3 p:1 l:x w:0 0x6B /r is4"/"RVML"
{
ND_INS_VFMADDSD, ND_CAT_FMA4, ND_SET_FMA4, 928,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1531 Instruction:"VFMADDSD Vdq,Hdq,Ldq,Wsd" Encoding:"vex m:3 p:1 l:x w:1 0x6B /r is4"/"RVLM"
{
ND_INS_VFMADDSD, ND_CAT_FMA4, ND_SET_FMA4, 928,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1532 Instruction:"VFMADDSS Vdq,Hdq,Wss,Ldq" Encoding:"vex m:3 p:1 l:x w:0 0x6A /r is4"/"RVML"
{
ND_INS_VFMADDSS, ND_CAT_FMA4, ND_SET_FMA4, 929,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1533 Instruction:"VFMADDSS Vdq,Hdq,Ldq,Wss" Encoding:"vex m:3 p:1 l:x w:1 0x6A /r is4"/"RVLM"
{
ND_INS_VFMADDSS, ND_CAT_FMA4, ND_SET_FMA4, 929,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1534 Instruction:"VFMADDSUB132PD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:2 p:1 l:x w:1 0x96 /r"/"RAVM"
{
ND_INS_VFMADDSUB132PD, ND_CAT_VFMA, ND_SET_AVX512F, 930,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1535 Instruction:"VFMADDSUB132PD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0x96 /r"/"RVM"
{
ND_INS_VFMADDSUB132PD, ND_CAT_VFMA, ND_SET_FMA, 930,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1536 Instruction:"VFMADDSUB132PS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:2 p:1 l:x w:0 0x96 /r"/"RAVM"
{
ND_INS_VFMADDSUB132PS, ND_CAT_VFMA, ND_SET_AVX512F, 931,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1537 Instruction:"VFMADDSUB132PS Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0x96 /r"/"RVM"
{
ND_INS_VFMADDSUB132PS, ND_CAT_VFMA, ND_SET_FMA, 931,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1538 Instruction:"VFMADDSUB213PD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:2 p:1 l:x w:1 0xA6 /r"/"RAVM"
{
ND_INS_VFMADDSUB213PD, ND_CAT_VFMA, ND_SET_AVX512F, 932,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1539 Instruction:"VFMADDSUB213PD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0xA6 /r"/"RVM"
{
ND_INS_VFMADDSUB213PD, ND_CAT_VFMA, ND_SET_FMA, 932,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1540 Instruction:"VFMADDSUB213PS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:2 p:1 l:x w:0 0xA6 /r"/"RAVM"
{
ND_INS_VFMADDSUB213PS, ND_CAT_VFMA, ND_SET_AVX512F, 933,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1541 Instruction:"VFMADDSUB213PS Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0xA6 /r"/"RVM"
{
ND_INS_VFMADDSUB213PS, ND_CAT_VFMA, ND_SET_FMA, 933,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1542 Instruction:"VFMADDSUB231PD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:2 p:1 l:x w:1 0xB6 /r"/"RAVM"
{
ND_INS_VFMADDSUB231PD, ND_CAT_VFMA, ND_SET_AVX512F, 934,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1543 Instruction:"VFMADDSUB231PD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0xB6 /r"/"RVM"
{
ND_INS_VFMADDSUB231PD, ND_CAT_VFMA, ND_SET_FMA, 934,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1544 Instruction:"VFMADDSUB231PS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:2 p:1 l:x w:0 0xB6 /r"/"RAVM"
{
ND_INS_VFMADDSUB231PS, ND_CAT_VFMA, ND_SET_AVX512F, 935,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1545 Instruction:"VFMADDSUB231PS Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0xB6 /r"/"RVM"
{
ND_INS_VFMADDSUB231PS, ND_CAT_VFMA, ND_SET_FMA, 935,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1546 Instruction:"VFMADDSUBPD Vx,Hx,Wx,Lx" Encoding:"vex m:3 p:1 l:x w:0 0x5D /r is4"/"RVML"
{
ND_INS_VFMADDSUBPD, ND_CAT_FMA4, ND_SET_FMA4, 936,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1547 Instruction:"VFMADDSUBPD Vx,Hx,Lx,Wx" Encoding:"vex m:3 p:1 l:x w:1 0x5D /r is4"/"RVLM"
{
ND_INS_VFMADDSUBPD, ND_CAT_FMA4, ND_SET_FMA4, 936,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1548 Instruction:"VFMADDSUBPS Vx,Hx,Wx,Lx" Encoding:"vex m:3 p:1 l:x w:0 0x5C /r is4"/"RVML"
{
ND_INS_VFMADDSUBPS, ND_CAT_FMA4, ND_SET_FMA4, 937,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1549 Instruction:"VFMADDSUBPS Vx,Hx,Lx,Wx" Encoding:"vex m:3 p:1 l:x w:1 0x5C /r is4"/"RVLM"
{
ND_INS_VFMADDSUBPS, ND_CAT_FMA4, ND_SET_FMA4, 937,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1550 Instruction:"VFMSUB132PD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:2 p:1 l:x w:1 0x9A /r"/"RAVM"
{
ND_INS_VFMSUB132PD, ND_CAT_VFMA, ND_SET_AVX512F, 938,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1551 Instruction:"VFMSUB132PD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0x9A /r"/"RVM"
{
ND_INS_VFMSUB132PD, ND_CAT_VFMA, ND_SET_FMA, 938,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1552 Instruction:"VFMSUB132PS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:2 p:1 l:x w:0 0x9A /r"/"RAVM"
{
ND_INS_VFMSUB132PS, ND_CAT_VFMA, ND_SET_AVX512F, 939,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1553 Instruction:"VFMSUB132PS Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0x9A /r"/"RVM"
{
ND_INS_VFMSUB132PS, ND_CAT_VFMA, ND_SET_FMA, 939,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1554 Instruction:"VFMSUB132SD Vdq{K}{z},aKq,Hdq,Wsd{er}" Encoding:"evex m:2 p:1 l:i w:1 0x9B /r"/"RAVM"
{
ND_INS_VFMSUB132SD, ND_CAT_VFMA, ND_SET_AVX512F, 940,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1555 Instruction:"VFMSUB132SD Vdq,Hdq,Wsd" Encoding:"vex m:2 p:1 l:x w:1 0x9B /r"/"RVM"
{
ND_INS_VFMSUB132SD, ND_CAT_VFMA, ND_SET_FMA, 940,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1556 Instruction:"VFMSUB132SS Vdq{K}{z},aKq,Hdq,Wss{er}" Encoding:"evex m:2 p:1 l:i w:0 0x9B /r"/"RAVM"
{
ND_INS_VFMSUB132SS, ND_CAT_VFMA, ND_SET_AVX512F, 941,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1557 Instruction:"VFMSUB132SS Vdq,Hdq,Wss" Encoding:"vex m:2 p:1 l:x w:0 0x9B /r"/"RVM"
{
ND_INS_VFMSUB132SS, ND_CAT_VFMA, ND_SET_FMA, 941,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1558 Instruction:"VFMSUB213PD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:2 p:1 l:x w:1 0xAA /r"/"RAVM"
{
ND_INS_VFMSUB213PD, ND_CAT_VFMA, ND_SET_AVX512F, 942,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1559 Instruction:"VFMSUB213PD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0xAA /r"/"RVM"
{
ND_INS_VFMSUB213PD, ND_CAT_VFMA, ND_SET_FMA, 942,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1560 Instruction:"VFMSUB213PS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:2 p:1 l:x w:0 0xAA /r"/"RAVM"
{
ND_INS_VFMSUB213PS, ND_CAT_VFMA, ND_SET_AVX512F, 943,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1561 Instruction:"VFMSUB213PS Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0xAA /r"/"RVM"
{
ND_INS_VFMSUB213PS, ND_CAT_VFMA, ND_SET_FMA, 943,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1562 Instruction:"VFMSUB213SD Vdq{K}{z},aKq,Hdq,Wsd{er}" Encoding:"evex m:2 p:1 l:i w:1 0xAB /r"/"RAVM"
{
ND_INS_VFMSUB213SD, ND_CAT_VFMA, ND_SET_AVX512F, 944,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1563 Instruction:"VFMSUB213SD Vdq,Hdq,Wsd" Encoding:"vex m:2 p:1 l:0 w:1 0xAB /r"/"RVM"
{
ND_INS_VFMSUB213SD, ND_CAT_VFMA, ND_SET_FMA, 944,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1564 Instruction:"VFMSUB213SS Vdq{K}{z},aKq,Hdq,Wss{er}" Encoding:"evex m:2 p:1 l:i w:0 0xAB /r"/"RAVM"
{
ND_INS_VFMSUB213SS, ND_CAT_VFMA, ND_SET_AVX512F, 945,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1565 Instruction:"VFMSUB213SS Vdq,Hdq,Wss" Encoding:"vex m:2 p:1 l:0 w:0 0xAB /r"/"RVM"
{
ND_INS_VFMSUB213SS, ND_CAT_VFMA, ND_SET_FMA, 945,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1566 Instruction:"VFMSUB231PD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:2 p:1 l:x w:1 0xBA /r"/"RAVM"
{
ND_INS_VFMSUB231PD, ND_CAT_VFMA, ND_SET_AVX512F, 946,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1567 Instruction:"VFMSUB231PD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0xBA /r"/"RVM"
{
ND_INS_VFMSUB231PD, ND_CAT_VFMA, ND_SET_FMA, 946,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1568 Instruction:"VFMSUB231PS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:2 p:1 l:x w:0 0xBA /r"/"RAVM"
{
ND_INS_VFMSUB231PS, ND_CAT_VFMA, ND_SET_AVX512F, 947,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1569 Instruction:"VFMSUB231PS Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0xBA /r"/"RVM"
{
ND_INS_VFMSUB231PS, ND_CAT_VFMA, ND_SET_FMA, 947,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1570 Instruction:"VFMSUB231SD Vdq{K}{z},aKq,Hdq,Wsd{er}" Encoding:"evex m:2 p:1 l:i w:1 0xBB /r"/"RAVM"
{
ND_INS_VFMSUB231SD, ND_CAT_VFMA, ND_SET_AVX512F, 948,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1571 Instruction:"VFMSUB231SD Vdq,Hdq,Wsd" Encoding:"vex m:2 p:1 l:0 w:1 0xBB /r"/"RVM"
{
ND_INS_VFMSUB231SD, ND_CAT_VFMA, ND_SET_FMA, 948,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1572 Instruction:"VFMSUB231SS Vdq{K}{z},aKq,Hdq,Wss{er}" Encoding:"evex m:2 p:1 l:i w:0 0xBB /r"/"RAVM"
{
ND_INS_VFMSUB231SS, ND_CAT_VFMA, ND_SET_AVX512F, 949,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1573 Instruction:"VFMSUB231SS Vdq,Hdq,Wss" Encoding:"vex m:2 p:1 l:0 w:0 0xBB /r"/"RVM"
{
ND_INS_VFMSUB231SS, ND_CAT_VFMA, ND_SET_FMA, 949,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1574 Instruction:"VFMSUBADD132PD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:2 p:1 l:x w:1 0x97 /r"/"RAVM"
{
ND_INS_VFMSUBADD132PD, ND_CAT_VFMA, ND_SET_AVX512F, 950,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1575 Instruction:"VFMSUBADD132PD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0x97 /r"/"RVM"
{
ND_INS_VFMSUBADD132PD, ND_CAT_VFMA, ND_SET_FMA, 950,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1576 Instruction:"VFMSUBADD132PS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:2 p:1 l:x w:0 0x97 /r"/"RAVM"
{
ND_INS_VFMSUBADD132PS, ND_CAT_VFMA, ND_SET_AVX512F, 951,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1577 Instruction:"VFMSUBADD132PS Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0x97 /r"/"RVM"
{
ND_INS_VFMSUBADD132PS, ND_CAT_VFMA, ND_SET_FMA, 951,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1578 Instruction:"VFMSUBADD213PD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:2 p:1 l:x w:1 0xA7 /r"/"RAVM"
{
ND_INS_VFMSUBADD213PD, ND_CAT_VFMA, ND_SET_AVX512F, 952,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1579 Instruction:"VFMSUBADD213PD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0xA7 /r"/"RVM"
{
ND_INS_VFMSUBADD213PD, ND_CAT_VFMA, ND_SET_FMA, 952,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1580 Instruction:"VFMSUBADD213PS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:2 p:1 l:x w:0 0xA7 /r"/"RAVM"
{
ND_INS_VFMSUBADD213PS, ND_CAT_VFMA, ND_SET_AVX512F, 953,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1581 Instruction:"VFMSUBADD213PS Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0xA7 /r"/"RVM"
{
ND_INS_VFMSUBADD213PS, ND_CAT_VFMA, ND_SET_FMA, 953,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1582 Instruction:"VFMSUBADD231PD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:2 p:1 l:x w:1 0xB7 /r"/"RAVM"
{
ND_INS_VFMSUBADD231PD, ND_CAT_VFMA, ND_SET_AVX512F, 954,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1583 Instruction:"VFMSUBADD231PD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0xB7 /r"/"RVM"
{
ND_INS_VFMSUBADD231PD, ND_CAT_VFMA, ND_SET_FMA, 954,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1584 Instruction:"VFMSUBADD231PS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:2 p:1 l:x w:0 0xB7 /r"/"RAVM"
{
ND_INS_VFMSUBADD231PS, ND_CAT_VFMA, ND_SET_AVX512F, 955,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1585 Instruction:"VFMSUBADD231PS Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0xB7 /r"/"RVM"
{
ND_INS_VFMSUBADD231PS, ND_CAT_VFMA, ND_SET_FMA, 955,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1586 Instruction:"VFMSUBADDPD Vx,Hx,Wx,Lx" Encoding:"vex m:3 p:1 l:x w:0 0x5F /r is4"/"RVML"
{
ND_INS_VFMSUBADDPD, ND_CAT_FMA4, ND_SET_FMA4, 956,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1587 Instruction:"VFMSUBADDPD Vx,Hx,Lx,Wx" Encoding:"vex m:3 p:1 l:x w:1 0x5F /r is4"/"RVLM"
{
ND_INS_VFMSUBADDPD, ND_CAT_FMA4, ND_SET_FMA4, 956,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1588 Instruction:"VFMSUBADDPS Vx,Hx,Wx,Lx" Encoding:"vex m:3 p:1 l:x w:0 0x5E /r is4"/"RVML"
{
ND_INS_VFMSUBADDPS, ND_CAT_FMA4, ND_SET_FMA4, 957,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1589 Instruction:"VFMSUBADDPS Vx,Hx,Lx,Wx" Encoding:"vex m:3 p:1 l:x w:1 0x5E /r is4"/"RVLM"
{
ND_INS_VFMSUBADDPS, ND_CAT_FMA4, ND_SET_FMA4, 957,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1590 Instruction:"VFMSUBPD Vx,Hx,Wx,Lx" Encoding:"vex m:3 p:1 l:x w:0 0x6D /r is4"/"RVML"
{
ND_INS_VFMSUBPD, ND_CAT_FMA4, ND_SET_FMA4, 958,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1591 Instruction:"VFMSUBPD Vx,Hx,Lx,Wx" Encoding:"vex m:3 p:1 l:x w:1 0x6D /r is4"/"RVLM"
{
ND_INS_VFMSUBPD, ND_CAT_FMA4, ND_SET_FMA4, 958,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1592 Instruction:"VFMSUBPS Vx,Hx,Wx,Lx" Encoding:"vex m:3 p:1 l:x w:0 0x6C /r is4"/"RVML"
{
ND_INS_VFMSUBPS, ND_CAT_FMA4, ND_SET_FMA4, 959,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1593 Instruction:"VFMSUBPS Vx,Hx,Lx,Wx" Encoding:"vex m:3 p:1 l:x w:1 0x6C /r is4"/"RVLM"
{
ND_INS_VFMSUBPS, ND_CAT_FMA4, ND_SET_FMA4, 959,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1594 Instruction:"VFMSUBSD Vdq,Hdq,Wsd,Ldq" Encoding:"vex m:3 p:1 l:x w:0 0x6F /r is4"/"RVML"
{
ND_INS_VFMSUBSD, ND_CAT_FMA4, ND_SET_FMA4, 960,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1595 Instruction:"VFMSUBSD Vdq,Hdq,Ldq,Wsd" Encoding:"vex m:3 p:1 l:x w:1 0x6F /r is4"/"RVLM"
{
ND_INS_VFMSUBSD, ND_CAT_FMA4, ND_SET_FMA4, 960,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1596 Instruction:"VFMSUBSS Vdq,Hdq,Wss,Ldq" Encoding:"vex m:3 p:1 l:x w:0 0x6E /r is4"/"RVML"
{
ND_INS_VFMSUBSS, ND_CAT_FMA4, ND_SET_FMA4, 961,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1597 Instruction:"VFMSUBSS Vdq,Hdq,Ldq,Wss" Encoding:"vex m:3 p:1 l:x w:1 0x6E /r is4"/"RVLM"
{
ND_INS_VFMSUBSS, ND_CAT_FMA4, ND_SET_FMA4, 961,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1598 Instruction:"VFNMADD132PD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:2 p:1 l:x w:1 0x9C /r"/"RAVM"
{
ND_INS_VFNMADD132PD, ND_CAT_VFMA, ND_SET_AVX512F, 962,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1599 Instruction:"VFNMADD132PD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0x9C /r"/"RVM"
{
ND_INS_VFNMADD132PD, ND_CAT_VFMA, ND_SET_FMA, 962,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1600 Instruction:"VFNMADD132PS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:2 p:1 l:x w:0 0x9C /r"/"RAVM"
{
ND_INS_VFNMADD132PS, ND_CAT_VFMA, ND_SET_AVX512F, 963,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1601 Instruction:"VFNMADD132PS Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0x9C /r"/"RVM"
{
ND_INS_VFNMADD132PS, ND_CAT_VFMA, ND_SET_FMA, 963,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1602 Instruction:"VFNMADD132SD Vdq{K}{z},aKq,Hdq,Wsd{er}" Encoding:"evex m:2 p:1 l:i w:1 0x9D /r"/"RAVM"
{
ND_INS_VFNMADD132SD, ND_CAT_VFMA, ND_SET_AVX512F, 964,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1603 Instruction:"VFNMADD132SD Vdq,Hdq,Wsd" Encoding:"vex m:2 p:1 l:i w:1 0x9D /r"/"RVM"
{
ND_INS_VFNMADD132SD, ND_CAT_VFMA, ND_SET_FMA, 964,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1604 Instruction:"VFNMADD132SS Vdq{K}{z},aKq,Hdq,Wss{er}" Encoding:"evex m:2 p:1 l:i w:0 0x9D /r"/"RAVM"
{
ND_INS_VFNMADD132SS, ND_CAT_VFMA, ND_SET_AVX512F, 965,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1605 Instruction:"VFNMADD132SS Vdq,Hdq,Wss" Encoding:"vex m:2 p:1 l:i w:0 0x9D /r"/"RVM"
{
ND_INS_VFNMADD132SS, ND_CAT_VFMA, ND_SET_FMA, 965,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1606 Instruction:"VFNMADD213PD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:2 p:1 l:x w:1 0xAC /r"/"RAVM"
{
ND_INS_VFNMADD213PD, ND_CAT_VFMA, ND_SET_AVX512F, 966,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1607 Instruction:"VFNMADD213PD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0xAC /r"/"RVM"
{
ND_INS_VFNMADD213PD, ND_CAT_VFMA, ND_SET_FMA, 966,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1608 Instruction:"VFNMADD213PS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:2 p:1 l:x w:0 0xAC /r"/"RAVM"
{
ND_INS_VFNMADD213PS, ND_CAT_VFMA, ND_SET_AVX512F, 967,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1609 Instruction:"VFNMADD213PS Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0xAC /r"/"RVM"
{
ND_INS_VFNMADD213PS, ND_CAT_VFMA, ND_SET_FMA, 967,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1610 Instruction:"VFNMADD213SD Vdq{K}{z},aKq,Hdq,Wsd{er}" Encoding:"evex m:2 p:1 l:i w:1 0xAD /r"/"RAVM"
{
ND_INS_VFNMADD213SD, ND_CAT_VFMA, ND_SET_AVX512F, 968,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1611 Instruction:"VFNMADD213SD Vdq,Hdq,Wsd" Encoding:"vex m:2 p:1 l:0 w:1 0xAD /r"/"RVM"
{
ND_INS_VFNMADD213SD, ND_CAT_VFMA, ND_SET_FMA, 968,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1612 Instruction:"VFNMADD213SS Vdq{K}{z},aKq,Hdq,Wss{er}" Encoding:"evex m:2 p:1 l:i w:0 0xAD /r"/"RAVM"
{
ND_INS_VFNMADD213SS, ND_CAT_VFMA, ND_SET_AVX512F, 969,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1613 Instruction:"VFNMADD213SS Vdq,Hdq,Wss" Encoding:"vex m:2 p:1 l:0 w:0 0xAD /r"/"RVM"
{
ND_INS_VFNMADD213SS, ND_CAT_VFMA, ND_SET_FMA, 969,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1614 Instruction:"VFNMADD231PD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:2 p:1 l:x w:1 0xBC /r"/"RAVM"
{
ND_INS_VFNMADD231PD, ND_CAT_VFMA, ND_SET_AVX512F, 970,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1615 Instruction:"VFNMADD231PD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0xBC /r"/"RVM"
{
ND_INS_VFNMADD231PD, ND_CAT_VFMA, ND_SET_FMA, 970,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1616 Instruction:"VFNMADD231PS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:2 p:1 l:x w:0 0xBC /r"/"RAVM"
{
ND_INS_VFNMADD231PS, ND_CAT_VFMA, ND_SET_AVX512F, 971,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1617 Instruction:"VFNMADD231PS Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0xBC /r"/"RVM"
{
ND_INS_VFNMADD231PS, ND_CAT_VFMA, ND_SET_FMA, 971,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1618 Instruction:"VFNMADD231SD Vdq{K}{z},aKq,Hdq,Wsd{er}" Encoding:"evex m:2 p:1 l:i w:1 0xBD /r"/"RAVM"
{
ND_INS_VFNMADD231SD, ND_CAT_VFMA, ND_SET_AVX512F, 972,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1619 Instruction:"VFNMADD231SD Vdq,Hdq,Wsd" Encoding:"vex m:2 p:1 l:0 w:1 0xBD /r"/"RVM"
{
ND_INS_VFNMADD231SD, ND_CAT_VFMA, ND_SET_FMA, 972,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1620 Instruction:"VFNMADD231SS Vdq{K}{z},aKq,Hdq,Wss{er}" Encoding:"evex m:2 p:1 l:i w:0 0xBD /r"/"RAVM"
{
ND_INS_VFNMADD231SS, ND_CAT_VFMA, ND_SET_AVX512F, 973,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1621 Instruction:"VFNMADD231SS Vdq,Hdq,Wss" Encoding:"vex m:2 p:1 l:0 w:0 0xBD /r"/"RVM"
{
ND_INS_VFNMADD231SS, ND_CAT_VFMA, ND_SET_FMA, 973,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1622 Instruction:"VFNMADDPD Vx,Hx,Wx,Lx" Encoding:"vex m:3 p:1 l:x w:0 0x79 /r is4"/"RVML"
{
ND_INS_VFNMADDPD, ND_CAT_FMA4, ND_SET_FMA4, 974,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1623 Instruction:"VFNMADDPD Vx,Hx,Lx,Wx" Encoding:"vex m:3 p:1 l:x w:1 0x79 /r is4"/"RVLM"
{
ND_INS_VFNMADDPD, ND_CAT_FMA4, ND_SET_FMA4, 974,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1624 Instruction:"VFNMADDPS Vx,Hx,Wx,Lx" Encoding:"vex m:3 p:1 l:x w:0 0x78 /r is4"/"RVML"
{
ND_INS_VFNMADDPS, ND_CAT_FMA4, ND_SET_FMA4, 975,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1625 Instruction:"VFNMADDPS Vx,Hx,Lx,Wx" Encoding:"vex m:3 p:1 l:x w:1 0x78 /r is4"/"RVLM"
{
ND_INS_VFNMADDPS, ND_CAT_FMA4, ND_SET_FMA4, 975,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1626 Instruction:"VFNMADDSD Vdq,Hdq,Wsd,Ldq" Encoding:"vex m:3 p:1 l:x w:0 0x7B /r is4"/"RVML"
{
ND_INS_VFNMADDSD, ND_CAT_FMA4, ND_SET_FMA4, 976,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1627 Instruction:"VFNMADDSD Vdq,Hdq,Ldq,Wsd" Encoding:"vex m:3 p:1 l:x w:1 0x7B /r is4"/"RVLM"
{
ND_INS_VFNMADDSD, ND_CAT_FMA4, ND_SET_FMA4, 976,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1628 Instruction:"VFNMADDSS Vdq,Hdq,Wss,Ldq" Encoding:"vex m:3 p:1 l:x w:0 0x7A /r is4"/"RVML"
{
ND_INS_VFNMADDSS, ND_CAT_FMA4, ND_SET_FMA4, 977,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1629 Instruction:"VFNMADDSS Vdq,Hdq,Ldq,Wss" Encoding:"vex m:3 p:1 l:x w:1 0x7A /r is4"/"RVLM"
{
ND_INS_VFNMADDSS, ND_CAT_FMA4, ND_SET_FMA4, 977,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1630 Instruction:"VFNMSUB132PD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:2 p:1 l:x w:1 0x9E /r"/"RAVM"
{
ND_INS_VFNMSUB132PD, ND_CAT_VFMA, ND_SET_AVX512F, 978,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1631 Instruction:"VFNMSUB132PD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0x9E /r"/"RVM"
{
ND_INS_VFNMSUB132PD, ND_CAT_VFMA, ND_SET_FMA, 978,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1632 Instruction:"VFNMSUB132PS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:2 p:1 l:x w:0 0x9E /r"/"RAVM"
{
ND_INS_VFNMSUB132PS, ND_CAT_VFMA, ND_SET_AVX512F, 979,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1633 Instruction:"VFNMSUB132PS Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0x9E /r"/"RVM"
{
ND_INS_VFNMSUB132PS, ND_CAT_VFMA, ND_SET_FMA, 979,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1634 Instruction:"VFNMSUB132SD Vdq{K}{z},aKq,Hdq,Wsd{er}" Encoding:"evex m:2 p:1 l:i w:1 0x9F /r"/"RAVM"
{
ND_INS_VFNMSUB132SD, ND_CAT_VFMA, ND_SET_AVX512F, 980,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1635 Instruction:"VFNMSUB132SD Vdq,Hdq,Wsd" Encoding:"vex m:2 p:1 l:0 w:1 0x9F /r"/"RVM"
{
ND_INS_VFNMSUB132SD, ND_CAT_VFMA, ND_SET_FMA, 980,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1636 Instruction:"VFNMSUB132SS Vdq{K}{z},aKq,Hdq,Wss{er}" Encoding:"evex m:2 p:1 l:i w:0 0x9F /r"/"RAVM"
{
ND_INS_VFNMSUB132SS, ND_CAT_VFMA, ND_SET_AVX512F, 981,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1637 Instruction:"VFNMSUB132SS Vdq,Hdq,Wss" Encoding:"vex m:2 p:1 l:0 w:0 0x9F /r"/"RVM"
{
ND_INS_VFNMSUB132SS, ND_CAT_VFMA, ND_SET_FMA, 981,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1638 Instruction:"VFNMSUB213PD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:2 p:1 l:x w:1 0xAE /r"/"RAVM"
{
ND_INS_VFNMSUB213PD, ND_CAT_VFMA, ND_SET_AVX512F, 982,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1639 Instruction:"VFNMSUB213PD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0xAE /r"/"RVM"
{
ND_INS_VFNMSUB213PD, ND_CAT_VFMA, ND_SET_FMA, 982,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1640 Instruction:"VFNMSUB213PS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:2 p:1 l:x w:0 0xAE /r"/"RAVM"
{
ND_INS_VFNMSUB213PS, ND_CAT_VFMA, ND_SET_AVX512F, 983,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1641 Instruction:"VFNMSUB213PS Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0xAE /r"/"RVM"
{
ND_INS_VFNMSUB213PS, ND_CAT_VFMA, ND_SET_FMA, 983,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1642 Instruction:"VFNMSUB213SD Vdq{K}{z},aKq,Hdq,Wsd{er}" Encoding:"evex m:2 p:1 l:i w:1 0xAF /r"/"RAVM"
{
ND_INS_VFNMSUB213SD, ND_CAT_VFMA, ND_SET_AVX512F, 984,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1643 Instruction:"VFNMSUB213SD Vdq,Hdq,Wsd" Encoding:"vex m:2 p:1 l:0 w:1 0xAF /r"/"RVM"
{
ND_INS_VFNMSUB213SD, ND_CAT_VFMA, ND_SET_FMA, 984,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1644 Instruction:"VFNMSUB213SS Vdq{K}{z},aKq,Hdq,Wss{er}" Encoding:"evex m:2 p:1 l:i w:0 0xAF /r"/"RAVM"
{
ND_INS_VFNMSUB213SS, ND_CAT_VFMA, ND_SET_AVX512F, 985,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1645 Instruction:"VFNMSUB213SS Vdq,Hdq,Wss" Encoding:"vex m:2 p:1 l:0 w:0 0xAF /r"/"RVM"
{
ND_INS_VFNMSUB213SS, ND_CAT_VFMA, ND_SET_FMA, 985,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1646 Instruction:"VFNMSUB231PD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:2 p:1 l:x w:1 0xBE /r"/"RAVM"
{
ND_INS_VFNMSUB231PD, ND_CAT_VFMA, ND_SET_AVX512F, 986,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1647 Instruction:"VFNMSUB231PD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0xBE /r"/"RVM"
{
ND_INS_VFNMSUB231PD, ND_CAT_VFMA, ND_SET_FMA, 986,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1648 Instruction:"VFNMSUB231PS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:2 p:1 l:x w:0 0xBE /r"/"RAVM"
{
ND_INS_VFNMSUB231PS, ND_CAT_VFMA, ND_SET_AVX512F, 987,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1649 Instruction:"VFNMSUB231PS Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0xBE /r"/"RVM"
{
ND_INS_VFNMSUB231PS, ND_CAT_VFMA, ND_SET_FMA, 987,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1650 Instruction:"VFNMSUB231SD Vdq{K}{z},aKq,Hdq,Wsd{er}" Encoding:"evex m:2 p:1 l:i w:1 0xBF /r"/"RAVM"
{
ND_INS_VFNMSUB231SD, ND_CAT_VFMA, ND_SET_AVX512F, 988,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1651 Instruction:"VFNMSUB231SD Vdq,Hdq,Wsd" Encoding:"vex m:2 p:1 l:0 w:1 0xBF /r"/"RVM"
{
ND_INS_VFNMSUB231SD, ND_CAT_VFMA, ND_SET_FMA, 988,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1652 Instruction:"VFNMSUB231SS Vdq{K}{z},aKq,Hdq,Wss{er}" Encoding:"evex m:2 p:1 l:i w:0 0xBF /r"/"RAVM"
{
ND_INS_VFNMSUB231SS, ND_CAT_VFMA, ND_SET_AVX512F, 989,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1653 Instruction:"VFNMSUB231SS Vdq,Hdq,Wss" Encoding:"vex m:2 p:1 l:0 w:0 0xBF /r"/"RVM"
{
ND_INS_VFNMSUB231SS, ND_CAT_VFMA, ND_SET_FMA, 989,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_RW, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1654 Instruction:"VFNMSUBPD Vx,Hx,Wx,Lx" Encoding:"vex m:3 p:1 l:x w:0 0x7D /r is4"/"RVML"
{
ND_INS_VFNMSUBPD, ND_CAT_FMA4, ND_SET_FMA4, 990,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1655 Instruction:"VFNMSUBPD Vx,Hx,Lx,Wx" Encoding:"vex m:3 p:1 l:x w:1 0x7D /r is4"/"RVLM"
{
ND_INS_VFNMSUBPD, ND_CAT_FMA4, ND_SET_FMA4, 990,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1656 Instruction:"VFNMSUBPS Vx,Hx,Wx,Lx" Encoding:"vex m:3 p:1 l:x w:0 0x7C /r is4"/"RVML"
{
ND_INS_VFNMSUBPS, ND_CAT_FMA4, ND_SET_FMA4, 991,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1657 Instruction:"VFNMSUBPS Vx,Hx,Lx,Wx" Encoding:"vex m:3 p:1 l:x w:1 0x7C /r is4"/"RVLM"
{
ND_INS_VFNMSUBPS, ND_CAT_FMA4, ND_SET_FMA4, 991,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1658 Instruction:"VFNMSUBSD Vdq,Hdq,Wsd,Ldq" Encoding:"vex m:3 p:1 l:x w:0 0x7F /r is4"/"RVML"
{
ND_INS_VFNMSUBSD, ND_CAT_FMA4, ND_SET_FMA4, 992,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1659 Instruction:"VFNMSUBSD Vdq,Hdq,Ldq,Wsd" Encoding:"vex m:3 p:1 l:x w:1 0x7F /r is4"/"RVLM"
{
ND_INS_VFNMSUBSD, ND_CAT_FMA4, ND_SET_FMA4, 992,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1660 Instruction:"VFNMSUBSS Vdq,Hdq,Wss,Ldq" Encoding:"vex m:3 p:1 l:x w:0 0x7E /r is4"/"RVML"
{
ND_INS_VFNMSUBSS, ND_CAT_FMA4, ND_SET_FMA4, 993,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1661 Instruction:"VFNMSUBSS Vdq,Hdq,Ldq,Wss" Encoding:"vex m:3 p:1 l:x w:1 0x7E /r is4"/"RVLM"
{
ND_INS_VFNMSUBSS, ND_CAT_FMA4, ND_SET_FMA4, 993,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_FMA4,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1662 Instruction:"VFPCLASSPD rKq{K},aKq,Wn|B64,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x66 /r ib"/"RAMI"
{
ND_INS_VFPCLASSPD, ND_CAT_AVX512, ND_SET_AVX512DQ, 994,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1663 Instruction:"VFPCLASSPS rKq{K},aKq,Wn|B32,Ib" Encoding:"evex m:3 p:1 l:x w:0 0x66 /r ib"/"RAMI"
{
ND_INS_VFPCLASSPS, ND_CAT_AVX512, ND_SET_AVX512DQ, 995,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1664 Instruction:"VFPCLASSSD rKq{K},aKq,Wsd,Ib" Encoding:"evex m:3 p:1 l:i w:1 0x67 /r ib"/"RAMI"
{
ND_INS_VFPCLASSSD, ND_CAT_AVX512, ND_SET_AVX512DQ, 996,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1665 Instruction:"VFPCLASSSS rKq{K},aKq,Wss,Ib" Encoding:"evex m:3 p:1 l:i w:0 0x67 /r ib"/"RAMI"
{
ND_INS_VFPCLASSSS, ND_CAT_AVX512, ND_SET_AVX512DQ, 997,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1666 Instruction:"VFRCZPD Vx,Wx" Encoding:"xop m:9 0x81 /r"/"RM"
{
ND_INS_VFRCZPD, ND_CAT_XOP, ND_SET_XOP, 998,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1667 Instruction:"VFRCZPS Vx,Wx" Encoding:"xop m:9 0x80 /r"/"RM"
{
ND_INS_VFRCZPS, ND_CAT_XOP, ND_SET_XOP, 999,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1668 Instruction:"VFRCZSD Vdq,Wsd" Encoding:"xop m:9 0x83 /r"/"RM"
{
ND_INS_VFRCZSD, ND_CAT_XOP, ND_SET_XOP, 1000,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1669 Instruction:"VFRCZSS Vdq,Wss" Encoding:"xop m:9 0x82 /r"/"RM"
{
ND_INS_VFRCZSS, ND_CAT_XOP, ND_SET_XOP, 1001,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1670 Instruction:"VGATHERDPD Vn{K},aKq,Mvm32h" Encoding:"evex m:2 p:1 l:x w:1 0x92 /r:mem vsib"/"RAM"
{
ND_INS_VGATHERDPD, ND_CAT_GATHER, ND_SET_AVX512F, 1002,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E12, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_vm32h, ND_OPF_RW, 0, 0),
},
// Pos:1671 Instruction:"VGATHERDPD Vx,Mvm32h,Hx" Encoding:"vex m:2 p:1 l:x w:1 0x92 /r:mem vsib"/"RMV"
{
ND_INS_VGATHERDPD, ND_CAT_AVX2GATHER, ND_SET_AVX2GATHER, 1002,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_12, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, 0,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_CRW, 0, 0),
OP(ND_OPT_M, ND_OPS_vm32h, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_RW, 0, 0),
},
// Pos:1672 Instruction:"VGATHERDPS Vn{K},aKq,Mvm32n" Encoding:"evex m:2 p:1 l:x w:0 0x92 /r:mem vsib"/"RAM"
{
ND_INS_VGATHERDPS, ND_CAT_GATHER, ND_SET_AVX512F, 1003,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E12, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_vm32n, ND_OPF_RW, 0, 0),
},
// Pos:1673 Instruction:"VGATHERDPS Vx,Mvm32n,Hx" Encoding:"vex m:2 p:1 l:x w:0 0x92 /r:mem vsib"/"RMV"
{
ND_INS_VGATHERDPS, ND_CAT_AVX2GATHER, ND_SET_AVX2GATHER, 1003,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_12, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, 0,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_CRW, 0, 0),
OP(ND_OPT_M, ND_OPS_vm32n, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_RW, 0, 0),
},
// Pos:1674 Instruction:"VGATHERPF0DPD Mvm32h{K},aKq" Encoding:"evex m:2 p:1 l:2 w:1 0xC6 /1:mem vsib"/"MA"
{
ND_INS_VGATHERPF0DPD, ND_CAT_GATHER, ND_SET_AVX512PF, 1004,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E12NP, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB, ND_CFF_AVX512PF,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm32h, ND_OPF_R, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1675 Instruction:"VGATHERPF0DPS Mvm32n{K},aKq" Encoding:"evex m:2 p:1 l:2 w:0 0xC6 /1:mem vsib"/"MA"
{
ND_INS_VGATHERPF0DPS, ND_CAT_GATHER, ND_SET_AVX512PF, 1005,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E12NP, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB, ND_CFF_AVX512PF,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm32n, ND_OPF_R, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1676 Instruction:"VGATHERPF0QPD Mvm64n{K},aKq" Encoding:"evex m:2 p:1 l:2 w:1 0xC7 /1:mem vsib"/"MA"
{
ND_INS_VGATHERPF0QPD, ND_CAT_GATHER, ND_SET_AVX512PF, 1006,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E12NP, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB, ND_CFF_AVX512PF,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_R, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1677 Instruction:"VGATHERPF0QPS Mvm64n{K},aKq" Encoding:"evex m:2 p:1 l:2 w:0 0xC7 /1:mem vsib"/"MA"
{
ND_INS_VGATHERPF0QPS, ND_CAT_GATHER, ND_SET_AVX512PF, 1007,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E12NP, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB, ND_CFF_AVX512PF,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_R, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1678 Instruction:"VGATHERPF1DPD Mvm32h{K},aKq" Encoding:"evex m:2 p:1 l:2 w:1 0xC6 /2:mem vsib"/"MA"
{
ND_INS_VGATHERPF1DPD, ND_CAT_GATHER, ND_SET_AVX512PF, 1008,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E12NP, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB, ND_CFF_AVX512PF,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm32h, ND_OPF_R, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1679 Instruction:"VGATHERPF1DPS Mvm32n{K},aKq" Encoding:"evex m:2 p:1 l:2 w:0 0xC6 /2:mem vsib"/"MA"
{
ND_INS_VGATHERPF1DPS, ND_CAT_GATHER, ND_SET_AVX512PF, 1009,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E12NP, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB, ND_CFF_AVX512PF,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm32n, ND_OPF_R, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1680 Instruction:"VGATHERPF1QPD Mvm64n{K},aKq" Encoding:"evex m:2 p:1 l:2 w:1 0xC7 /2:mem vsib"/"MA"
{
ND_INS_VGATHERPF1QPD, ND_CAT_GATHER, ND_SET_AVX512PF, 1010,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E12NP, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB, ND_CFF_AVX512PF,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_R, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1681 Instruction:"VGATHERPF1QPS Mvm64n{K},aKq" Encoding:"evex m:2 p:1 l:2 w:0 0xC7 /2:mem vsib"/"MA"
{
ND_INS_VGATHERPF1QPS, ND_CAT_GATHER, ND_SET_AVX512PF, 1011,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E12NP, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB, ND_CFF_AVX512PF,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_R, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1682 Instruction:"VGATHERQPD Vn{K},aKq,Mvm64n" Encoding:"evex m:2 p:1 l:x w:1 0x93 /r:mem vsib"/"RAM"
{
ND_INS_VGATHERQPD, ND_CAT_GATHER, ND_SET_AVX512F, 1012,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E12, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_RW, 0, 0),
},
// Pos:1683 Instruction:"VGATHERQPD Vx,Mvm64n,Hx" Encoding:"vex m:2 p:1 l:x w:1 0x93 /r:mem vsib"/"RMV"
{
ND_INS_VGATHERQPD, ND_CAT_AVX2GATHER, ND_SET_AVX2GATHER, 1012,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_12, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, 0,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_CRW, 0, 0),
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_RW, 0, 0),
},
// Pos:1684 Instruction:"VGATHERQPS Vh{K},aKq,Mvm64n" Encoding:"evex m:2 p:1 l:x w:0 0x93 /r:mem vsib"/"RAM"
{
ND_INS_VGATHERQPS, ND_CAT_GATHER, ND_SET_AVX512F, 1013,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E12, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_h, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_RW, 0, 0),
},
// Pos:1685 Instruction:"VGATHERQPS Vdq,Mvm64n,Hdq" Encoding:"vex m:2 p:1 l:x w:0 0x93 /r:mem vsib"/"RMV"
{
ND_INS_VGATHERQPS, ND_CAT_AVX2GATHER, ND_SET_AVX2GATHER, 1013,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_12, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, 0,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_CRW, 0, 0),
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_RW, 0, 0),
},
// Pos:1686 Instruction:"VGETEXPPD Vn{K}{z},aKq,Wn|B64{sae}" Encoding:"evex m:2 p:1 l:x w:1 0x42 /r"/"RAM"
{
ND_INS_VGETEXPPD, ND_CAT_AVX512, ND_SET_AVX512F, 1014,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B64, 0),
},
// Pos:1687 Instruction:"VGETEXPPS Vn{K}{z},aKq,Wn|B32{sae}" Encoding:"evex m:2 p:1 l:x w:0 0x42 /r"/"RAM"
{
ND_INS_VGETEXPPS, ND_CAT_AVX512, ND_SET_AVX512F, 1015,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B32, 0),
},
// Pos:1688 Instruction:"VGETEXPSD Vdq{K}{z},aKq,Hdq,Wsd{sae}" Encoding:"evex m:2 p:1 l:x w:1 0x43 /r"/"RAVM"
{
ND_INS_VGETEXPSD, ND_CAT_AVX512, ND_SET_AVX512F, 1016,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_SAE, 0),
},
// Pos:1689 Instruction:"VGETEXPSS Vdq{K}{z},aKq,Hdq,Wss{sae}" Encoding:"evex m:2 p:1 l:x w:0 0x43 /r"/"RAVM"
{
ND_INS_VGETEXPSS, ND_CAT_AVX512, ND_SET_AVX512F, 1017,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_SAE, 0),
},
// Pos:1690 Instruction:"VGETMANTPD Vn{K}{z},aKq,Wn|B64{sae},Ib" Encoding:"evex m:3 p:1 l:x w:1 0x26 /r ib"/"RAMI"
{
ND_INS_VGETMANTPD, ND_CAT_AVX512, ND_SET_AVX512F, 1018,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1691 Instruction:"VGETMANTPS Vn{K}{z},aKq,Wn|B32{sae},Ib" Encoding:"evex m:3 p:1 l:x w:0 0x26 /r ib"/"RAMI"
{
ND_INS_VGETMANTPS, ND_CAT_AVX512, ND_SET_AVX512F, 1019,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1692 Instruction:"VGETMANTSD Vdq{K}{z},aKq,Hdq,Wsd{sae},Ib" Encoding:"evex m:3 p:1 l:i w:1 0x27 /r ib"/"RAVMI"
{
ND_INS_VGETMANTSD, ND_CAT_AVX512, ND_SET_AVX512F, 1020,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(5, 0), ND_TUPLE_T1S, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_SAE, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1693 Instruction:"VGETMANTSS Vdq{K}{z},aKq,Hdq,Wss{sae},Ib" Encoding:"evex m:3 p:1 l:i w:0 0x27 /r ib"/"RAVMI"
{
ND_INS_VGETMANTSS, ND_CAT_AVX512, ND_SET_AVX512F, 1021,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(5, 0), ND_TUPLE_T1S, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_SAE, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1694 Instruction:"VGF2P8AFFINEINVQB Vn{K}{z},aKq,Hn,Wn|B64,Ib" Encoding:"evex m:3 p:1 l:x w:1 0xCF /r ib"/"RAVMI"
{
ND_INS_VGF2P8AFFINEINVQB, ND_CAT_GFNI, ND_SET_GFNI, 1022,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_GFNI,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1695 Instruction:"VGF2P8AFFINEINVQB Vx,Hx,Wx,Ib" Encoding:"vex m:3 p:1 l:x w:1 0xCF /r ib"/"RVMI"
{
ND_INS_VGF2P8AFFINEINVQB, ND_CAT_GFNI, ND_SET_GFNI, 1022,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_GFNI,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1696 Instruction:"VGF2P8AFFINEQB Vn{K}{z},aKq,Hn,Wn|B64,Ib" Encoding:"evex m:3 p:1 l:x w:1 0xCE /r ib"/"RAVMI"
{
ND_INS_VGF2P8AFFINEQB, ND_CAT_GFNI, ND_SET_GFNI, 1023,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_GFNI,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1697 Instruction:"VGF2P8AFFINEQB Vx,Hx,Wx,Ib" Encoding:"vex m:3 p:1 l:x w:1 0xCE /r ib"/"RVMI"
{
ND_INS_VGF2P8AFFINEQB, ND_CAT_GFNI, ND_SET_GFNI, 1023,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_GFNI,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1698 Instruction:"VGF2P8MULB Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:0 0xCF /r"/"RAVM"
{
ND_INS_VGF2P8MULB, ND_CAT_GFNI, ND_SET_GFNI, 1024,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_GFNI,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1699 Instruction:"VGF2P8MULB Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0xCF /r"/"RVM"
{
ND_INS_VGF2P8MULB, ND_CAT_GFNI, ND_SET_GFNI, 1024,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_GFNI,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1700 Instruction:"VHADDPD Vpd,Hpd,Wpd" Encoding:"vex m:1 p:1 l:x w:i 0x7C /r"/"RVM"
{
ND_INS_VHADDPD, ND_CAT_AVX, ND_SET_AVX, 1025,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_pd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:1701 Instruction:"VHADDPS Vps,Hps,Wps" Encoding:"vex m:1 p:3 l:x w:i 0x7C /r"/"RVM"
{
ND_INS_VHADDPS, ND_CAT_AVX, ND_SET_AVX, 1026,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ps, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:1702 Instruction:"VHSUBPD Vpd,Hpd,Wpd" Encoding:"vex m:1 p:1 l:x w:i 0x7D /r"/"RVM"
{
ND_INS_VHSUBPD, ND_CAT_AVX, ND_SET_AVX, 1027,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_pd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:1703 Instruction:"VHSUBPS Vps,Hps,Wps" Encoding:"vex m:1 p:3 l:x w:i 0x7D /r"/"RVM"
{
ND_INS_VHSUBPS, ND_CAT_AVX, ND_SET_AVX, 1028,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ps, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:1704 Instruction:"VINSERTF128 Vqq,Hqq,Wdq,Ib" Encoding:"vex m:3 p:1 l:1 w:0 0x18 /r ib"/"RVMI"
{
ND_INS_VINSERTF128, ND_CAT_AVX, ND_SET_AVX, 1029,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_qq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1705 Instruction:"VINSERTF32X4 Vu{K}{z},aKq,Hu,Wdq,Ib" Encoding:"evex m:3 p:1 l:x w:0 0x18 /r ib"/"RAVMI"
{
ND_INS_VINSERTF32X4, ND_CAT_AVX512, ND_SET_AVX512F, 1030,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(5, 0), ND_TUPLE_T4, ND_EXT_E6NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_u, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1706 Instruction:"VINSERTF32X8 Voq{K}{z},aKq,Hoq,Wqq,Ib" Encoding:"evex m:3 p:1 l:2 w:0 0x1A /r ib"/"RAVMI"
{
ND_INS_VINSERTF32X8, ND_CAT_AVX512, ND_SET_AVX512DQ, 1031,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(5, 0), ND_TUPLE_T8, ND_EXT_E6NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_oq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_qq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1707 Instruction:"VINSERTF64X2 Vu{K}{z},aKq,Hu,Wdq,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x18 /r ib"/"RAVMI"
{
ND_INS_VINSERTF64X2, ND_CAT_AVX512, ND_SET_AVX512DQ, 1032,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(5, 0), ND_TUPLE_T2, ND_EXT_E6NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_u, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1708 Instruction:"VINSERTF64X4 Voq{K}{z},aKq,Hoq,Wqq,Ib" Encoding:"evex m:3 p:1 l:2 w:1 0x1A /r ib"/"RAVMI"
{
ND_INS_VINSERTF64X4, ND_CAT_AVX512, ND_SET_AVX512F, 1033,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(5, 0), ND_TUPLE_T4, ND_EXT_E6NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_oq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_qq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1709 Instruction:"VINSERTI128 Vqq,Hqq,Wdq,Ib" Encoding:"vex m:3 p:1 l:1 w:0 0x38 /r ib"/"RVMI"
{
ND_INS_VINSERTI128, ND_CAT_AVX2, ND_SET_AVX2, 1034,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_qq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1710 Instruction:"VINSERTI32X4 Vu{K}{z},aKq,Hu,Wdq,Ib" Encoding:"evex m:3 p:1 l:x w:0 0x38 /r ib"/"RAVMI"
{
ND_INS_VINSERTI32X4, ND_CAT_AVX512, ND_SET_AVX512F, 1035,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(5, 0), ND_TUPLE_T4, ND_EXT_E6NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_u, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1711 Instruction:"VINSERTI32X8 Voq{K}{z},aKq,Hoq,Wqq,Ib" Encoding:"evex m:3 p:1 l:2 w:0 0x3A /r ib"/"RAVMI"
{
ND_INS_VINSERTI32X8, ND_CAT_AVX512, ND_SET_AVX512DQ, 1036,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(5, 0), ND_TUPLE_T8, ND_EXT_E6NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_oq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_qq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1712 Instruction:"VINSERTI64X2 Vu{K}{z},aKq,Hu,Wdq,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x38 /r ib"/"RAVMI"
{
ND_INS_VINSERTI64X2, ND_CAT_AVX512, ND_SET_AVX512DQ, 1037,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(5, 0), ND_TUPLE_T2, ND_EXT_E6NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_u, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1713 Instruction:"VINSERTI64X4 Voq{K}{z},aKq,Hoq,Wqq,Ib" Encoding:"evex m:3 p:1 l:2 w:1 0x3A /r ib"/"RAVMI"
{
ND_INS_VINSERTI64X4, ND_CAT_AVX512, ND_SET_AVX512F, 1038,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(5, 0), ND_TUPLE_T4, ND_EXT_E6NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_oq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_qq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1714 Instruction:"VINSERTPS Vdq,Hdq,Md,Ib" Encoding:"evex m:3 p:1 l:0 w:i 0x21 /r:mem ib"/"RVMI"
{
ND_INS_VINSERTPS, ND_CAT_AVX512, ND_SET_AVX512F, 1039,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1715 Instruction:"VINSERTPS Vdq,Hdq,Udq,Ib" Encoding:"evex m:3 p:1 l:0 w:i 0x21 /r:reg ib"/"RVMI"
{
ND_INS_VINSERTPS, ND_CAT_AVX512, ND_SET_AVX512F, 1039,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_U, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1716 Instruction:"VINSERTPS Vdq,Hdq,Md,Ib" Encoding:"vex m:3 p:1 l:0 w:i 0x21 /r:mem ib"/"RVMI"
{
ND_INS_VINSERTPS, ND_CAT_AVX, ND_SET_AVX, 1039,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1717 Instruction:"VINSERTPS Vdq,Hdq,Udq,Ib" Encoding:"vex m:3 p:1 l:0 w:i 0x21 /r:reg ib"/"RVMI"
{
ND_INS_VINSERTPS, ND_CAT_AVX, ND_SET_AVX, 1039,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_U, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1718 Instruction:"VLDDQU Vx,Mx" Encoding:"vex m:1 p:3 l:x w:i 0xF0 /r:mem"/"RM"
{
ND_INS_VLDDQU, ND_CAT_AVX, ND_SET_AVX, 1040,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1719 Instruction:"VLDMXCSR Md" Encoding:"vex m:1 p:0 0xAE /2:mem"/"M"
{
ND_INS_VLDMXCSR, ND_CAT_AVX, ND_SET_AVX, 1041,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(1, 1), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_MXCSR, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1720 Instruction:"VMASKMOVDQU Vdq,Udq" Encoding:"vex m:1 p:1 l:0 w:i 0xF7 /r:reg"/"RM"
{
ND_INS_VMASKMOVDQU, ND_CAT_AVX, ND_SET_AVX, 1042,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_U, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_MEM_rDI, ND_OPS_dq, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1721 Instruction:"VMASKMOVPD Vx,Hx,Mx" Encoding:"vex m:2 p:1 l:x w:0 0x2D /r:mem"/"RVM"
{
ND_INS_VMASKMOVPD, ND_CAT_AVX, ND_SET_AVX, 1043,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1722 Instruction:"VMASKMOVPD Mx,Hx,Vx" Encoding:"vex m:2 p:1 l:x w:0 0x2F /r:mem"/"MVR"
{
ND_INS_VMASKMOVPD, ND_CAT_AVX, ND_SET_AVX, 1043,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1723 Instruction:"VMASKMOVPS Vx,Hx,Mx" Encoding:"vex m:2 p:1 l:x w:0 0x2C /r:mem"/"RVM"
{
ND_INS_VMASKMOVPS, ND_CAT_AVX, ND_SET_AVX, 1044,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1724 Instruction:"VMASKMOVPS Mx,Hx,Vx" Encoding:"vex m:2 p:1 l:x w:0 0x2E /r:mem"/"MVR"
{
ND_INS_VMASKMOVPS, ND_CAT_AVX, ND_SET_AVX, 1044,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1725 Instruction:"VMAXPD Vn{K}{z},aKq,Hn,Wn|B64{sae}" Encoding:"evex m:1 p:1 l:x w:1 0x5F /r"/"RAVM"
{
ND_INS_VMAXPD, ND_CAT_AVX512, ND_SET_AVX512F, 1045,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B64, 0),
},
// Pos:1726 Instruction:"VMAXPD Vpd,Hpd,Wpd" Encoding:"vex m:1 p:1 l:x w:i 0x5F /r"/"RVM"
{
ND_INS_VMAXPD, ND_CAT_AVX, ND_SET_AVX, 1045,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_pd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:1727 Instruction:"VMAXPS Vn{K}{z},aKq,Hn,Wn|B32{sae}" Encoding:"evex m:1 p:0 l:x w:0 0x5F /r"/"RAVM"
{
ND_INS_VMAXPS, ND_CAT_AVX512, ND_SET_AVX512F, 1046,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B32, 0),
},
// Pos:1728 Instruction:"VMAXPS Vps,Hps,Wps" Encoding:"vex m:1 p:0 l:x w:i 0x5F /r"/"RVM"
{
ND_INS_VMAXPS, ND_CAT_AVX, ND_SET_AVX, 1046,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ps, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:1729 Instruction:"VMAXSD Vdq{K}{z},aKq,Hdq,Wsd{sae}" Encoding:"evex m:1 p:3 l:i w:1 0x5F /r"/"RAVM"
{
ND_INS_VMAXSD, ND_CAT_AVX512, ND_SET_AVX512F, 1047,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_SAE, 0),
},
// Pos:1730 Instruction:"VMAXSD Vsd,Hsd,Wsd" Encoding:"vex m:1 p:3 l:i w:i 0x5F /r"/"RVM"
{
ND_INS_VMAXSD, ND_CAT_AVX, ND_SET_AVX, 1047,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1731 Instruction:"VMAXSS Vdq{K}{z},aKq,Hdq,Wss{sae}" Encoding:"evex m:1 p:2 l:i w:0 0x5F /r"/"RAVM"
{
ND_INS_VMAXSS, ND_CAT_AVX512, ND_SET_AVX512F, 1048,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_SAE, 0),
},
// Pos:1732 Instruction:"VMAXSS Vss,Hss,Wss" Encoding:"vex m:1 p:2 l:i w:i 0x5F /r"/"RVM"
{
ND_INS_VMAXSS, ND_CAT_AVX, ND_SET_AVX, 1048,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1733 Instruction:"VMCALL" Encoding:"0x0F 0x01 /0xC1"/""
{
ND_INS_VMCALL, ND_CAT_VTX, ND_SET_VTX, 1049,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_VTX,
0,
0,
0,
0,
},
// Pos:1734 Instruction:"VMCLEAR Mq" Encoding:"0x66 0x0F 0xC7 /6:mem"/"M"
{
ND_INS_VMCLEAR, ND_CAT_VTX, ND_SET_VTX, 1050,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_LONG|ND_MOD_VMXR,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_VTX,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1735 Instruction:"VMFUNC" Encoding:"NP 0x0F 0x01 /0xD4"/""
{
ND_INS_VMFUNC, ND_CAT_VTX, ND_SET_VTX, 1051,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_VTX,
0,
0,
0,
0,
},
// Pos:1736 Instruction:"VMGEXIT" Encoding:"0xF3 0x0F 0x01 /0xD9"/""
{
ND_INS_VMGEXIT, ND_CAT_SYSTEM, ND_SET_SVM, 1052,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SVM,
0,
0,
0,
0,
},
// Pos:1737 Instruction:"VMGEXIT" Encoding:"0xF2 0x0F 0x01 /0xD9"/""
{
ND_INS_VMGEXIT, ND_CAT_SYSTEM, ND_SET_SVM, 1052,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SVM,
0,
0,
0,
0,
},
// Pos:1738 Instruction:"VMINPD Vn{K}{z},aKq,Hn,Wn|B64{sae}" Encoding:"evex m:1 p:1 l:x w:1 0x5D /r"/"RAVM"
{
ND_INS_VMINPD, ND_CAT_AVX512, ND_SET_AVX512F, 1053,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B64, 0),
},
// Pos:1739 Instruction:"VMINPD Vpd,Hpd,Wpd" Encoding:"vex m:1 p:1 l:x w:i 0x5D /r"/"RVM"
{
ND_INS_VMINPD, ND_CAT_AVX, ND_SET_AVX, 1053,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_pd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:1740 Instruction:"VMINPS Vn{K}{z},aKq,Hn,Wn|B32{sae}" Encoding:"evex m:1 p:0 l:x w:0 0x5D /r"/"RAVM"
{
ND_INS_VMINPS, ND_CAT_AVX512, ND_SET_AVX512F, 1054,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B32, 0),
},
// Pos:1741 Instruction:"VMINPS Vps,Hps,Wps" Encoding:"vex m:1 p:0 l:x w:i 0x5D /r"/"RVM"
{
ND_INS_VMINPS, ND_CAT_AVX, ND_SET_AVX, 1054,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ps, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:1742 Instruction:"VMINSD Vdq{K}{z},aKq,Hdq,Wsd{sae}" Encoding:"evex m:1 p:3 l:i w:1 0x5D /r"/"RAVM"
{
ND_INS_VMINSD, ND_CAT_AVX512, ND_SET_AVX512F, 1055,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_SAE, 0),
},
// Pos:1743 Instruction:"VMINSD Vsd,Hsd,Wsd" Encoding:"vex m:1 p:3 l:i w:i 0x5D /r"/"RVM"
{
ND_INS_VMINSD, ND_CAT_AVX, ND_SET_AVX, 1055,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1744 Instruction:"VMINSS Vdq{K}{z},aKq,Hdq,Wss{sae}" Encoding:"evex m:1 p:2 l:i w:0 0x5D /r"/"RAVM"
{
ND_INS_VMINSS, ND_CAT_AVX512, ND_SET_AVX512F, 1056,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_SAE, 0),
},
// Pos:1745 Instruction:"VMINSS Vss,Hss,Wss" Encoding:"vex m:1 p:2 l:i w:i 0x5D /r"/"RVM"
{
ND_INS_VMINSS, ND_CAT_AVX, ND_SET_AVX, 1056,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1746 Instruction:"VMLAUNCH" Encoding:"0x0F 0x01 /0xC2"/""
{
ND_INS_VMLAUNCH, ND_CAT_VTX, ND_SET_VTX, 1057,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_LONG|ND_MOD_VMXR,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_VTX,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1747 Instruction:"VMLOAD" Encoding:"0x0F 0x01 /0xDA"/""
{
ND_INS_VMLOAD, ND_CAT_SYSTEM, ND_SET_SVM, 1058,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_LONG|ND_MOD_VMXR,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SVM,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1748 Instruction:"VMMCALL" Encoding:"0x0F 0x01 /0xD9"/""
{
ND_INS_VMMCALL, ND_CAT_SYSTEM, ND_SET_SVM, 1059,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SVM,
0,
0,
0,
0,
},
// Pos:1749 Instruction:"VMOVAPD Vn{K}{z},aKq,Wn" Encoding:"evex m:1 p:1 l:x w:1 0x28 /r"/"RAM"
{
ND_INS_VMOVAPD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1060,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E1, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1750 Instruction:"VMOVAPD Wn{K}{z},aKq,Vn" Encoding:"evex m:1 p:1 l:x w:1 0x29 /r"/"MAR"
{
ND_INS_VMOVAPD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1060,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E1, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1751 Instruction:"VMOVAPD Vx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x28 /r"/"RM"
{
ND_INS_VMOVAPD, ND_CAT_DATAXFER, ND_SET_AVX, 1060,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1752 Instruction:"VMOVAPD Wx,Vx" Encoding:"vex m:1 p:1 l:x w:i 0x29 /r"/"MR"
{
ND_INS_VMOVAPD, ND_CAT_DATAXFER, ND_SET_AVX, 1060,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1753 Instruction:"VMOVAPS Vn{K}{z},aKq,Wn" Encoding:"evex m:1 p:0 l:x w:0 0x28 /r"/"RAM"
{
ND_INS_VMOVAPS, ND_CAT_DATAXFER, ND_SET_AVX512F, 1061,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E1, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1754 Instruction:"VMOVAPS Wn{K}{z},aKq,Vn" Encoding:"evex m:1 p:0 l:x w:0 0x29 /r"/"MAR"
{
ND_INS_VMOVAPS, ND_CAT_DATAXFER, ND_SET_AVX512F, 1061,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E1, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1755 Instruction:"VMOVAPS Vx,Wx" Encoding:"vex m:1 p:0 l:x w:i 0x28 /r"/"RM"
{
ND_INS_VMOVAPS, ND_CAT_DATAXFER, ND_SET_AVX, 1061,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1756 Instruction:"VMOVAPS Wx,Vx" Encoding:"vex m:1 p:0 l:x w:i 0x29 /r"/"MR"
{
ND_INS_VMOVAPS, ND_CAT_DATAXFER, ND_SET_AVX, 1061,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1757 Instruction:"VMOVD Vdq,Ed" Encoding:"evex m:1 p:1 l:0 w:0 0x6E /r"/"RM"
{
ND_INS_VMOVD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1062,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:1758 Instruction:"VMOVD Ey,Vdq" Encoding:"evex m:1 p:1 l:0 w:0 0x7E /r"/"MR"
{
ND_INS_VMOVD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1062,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1759 Instruction:"VMOVD Vdq,Ey" Encoding:"vex m:1 p:1 l:0 w:0 0x6E /r"/"RM"
{
ND_INS_VMOVD, ND_CAT_DATAXFER, ND_SET_AVX, 1062,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:1760 Instruction:"VMOVD Ey,Vd" Encoding:"vex m:1 p:1 l:0 w:0 0x7E /r"/"MR"
{
ND_INS_VMOVD, ND_CAT_DATAXFER, ND_SET_AVX, 1062,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:1761 Instruction:"VMOVDDUP Vdq{K}{z},aKq,Wq" Encoding:"evex m:1 p:3 l:0 w:1 0x12 /r"/"RAM"
{
ND_INS_VMOVDDUP, ND_CAT_DATAXFER, ND_SET_AVX512F, 1063,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_DUP, ND_EXT_E5NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1762 Instruction:"VMOVDDUP Vqq{K}{z},aKq,Wqq" Encoding:"evex m:1 p:3 l:1 w:1 0x12 /r"/"RAM"
{
ND_INS_VMOVDDUP, ND_CAT_DATAXFER, ND_SET_AVX512F, 1063,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_DUP, ND_EXT_E5NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_qq, ND_OPF_R, 0, 0),
},
// Pos:1763 Instruction:"VMOVDDUP Voq{K}{z},aKq,Woq" Encoding:"evex m:1 p:3 l:2 w:1 0x12 /r"/"RAM"
{
ND_INS_VMOVDDUP, ND_CAT_DATAXFER, ND_SET_AVX512F, 1063,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_DUP, ND_EXT_E5NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_oq, ND_OPF_R, 0, 0),
},
// Pos:1764 Instruction:"VMOVDDUP Vdq,Wq" Encoding:"vex m:1 p:3 l:0 w:i 0x12 /r"/"RM"
{
ND_INS_VMOVDDUP, ND_CAT_DATAXFER, ND_SET_AVX, 1063,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1765 Instruction:"VMOVDDUP Vqq,Wqq" Encoding:"vex m:1 p:3 l:1 w:i 0x12 /r"/"RM"
{
ND_INS_VMOVDDUP, ND_CAT_DATAXFER, ND_SET_AVX, 1063,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_qq, ND_OPF_R, 0, 0),
},
// Pos:1766 Instruction:"VMOVDQA Vx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x6F /r"/"RM"
{
ND_INS_VMOVDQA, ND_CAT_DATAXFER, ND_SET_AVX, 1064,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1767 Instruction:"VMOVDQA Wx,Vx" Encoding:"vex m:1 p:1 l:x w:i 0x7F /r"/"MR"
{
ND_INS_VMOVDQA, ND_CAT_DATAXFER, ND_SET_AVX, 1064,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1768 Instruction:"VMOVDQA32 Vn{K}{z},aKq,Wn" Encoding:"evex m:1 p:1 l:x w:0 0x6F /r"/"RAM"
{
ND_INS_VMOVDQA32, ND_CAT_DATAXFER, ND_SET_AVX512F, 1065,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E1, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1769 Instruction:"VMOVDQA32 Wn{K}{z},aKq,Vn" Encoding:"evex m:1 p:1 l:x w:0 0x7F /r"/"MAR"
{
ND_INS_VMOVDQA32, ND_CAT_DATAXFER, ND_SET_AVX512F, 1065,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E1, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1770 Instruction:"VMOVDQA64 Vn{K}{z},aKq,Wn" Encoding:"evex m:1 p:1 l:x w:1 0x6F /r"/"RAM"
{
ND_INS_VMOVDQA64, ND_CAT_DATAXFER, ND_SET_AVX512F, 1066,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E1, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1771 Instruction:"VMOVDQA64 Wn{K}{z},aKq,Vn" Encoding:"evex m:1 p:1 l:x w:1 0x7F /r"/"MAR"
{
ND_INS_VMOVDQA64, ND_CAT_DATAXFER, ND_SET_AVX512F, 1066,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E1, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1772 Instruction:"VMOVDQU Vx,Wx" Encoding:"vex m:1 p:2 l:x w:i 0x6F /r"/"RM"
{
ND_INS_VMOVDQU, ND_CAT_DATAXFER, ND_SET_AVX, 1067,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1773 Instruction:"VMOVDQU Wx,Vx" Encoding:"vex m:1 p:2 l:x w:i 0x7F /r"/"MR"
{
ND_INS_VMOVDQU, ND_CAT_DATAXFER, ND_SET_AVX, 1067,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1774 Instruction:"VMOVDQU16 Vn{K}{z},aKq,Wn" Encoding:"evex m:1 p:3 l:x w:1 0x6F /r"/"RAM"
{
ND_INS_VMOVDQU16, ND_CAT_DATAXFER, ND_SET_AVX512BW, 1068,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1775 Instruction:"VMOVDQU16 Wn{K}{z},aKq,Vn" Encoding:"evex m:1 p:3 l:x w:1 0x7F /r"/"MAR"
{
ND_INS_VMOVDQU16, ND_CAT_DATAXFER, ND_SET_AVX512BW, 1068,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1776 Instruction:"VMOVDQU32 Vn{K}{z},aKq,Wn" Encoding:"evex m:1 p:2 l:x w:0 0x6F /r"/"RAM"
{
ND_INS_VMOVDQU32, ND_CAT_DATAXFER, ND_SET_AVX512F, 1069,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1777 Instruction:"VMOVDQU32 Wn{K}{z},aKq,Vn" Encoding:"evex m:1 p:2 l:x w:0 0x7F /r"/"MAR"
{
ND_INS_VMOVDQU32, ND_CAT_DATAXFER, ND_SET_AVX512F, 1069,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1778 Instruction:"VMOVDQU64 Vn{K}{z},aKq,Wn" Encoding:"evex m:1 p:2 l:x w:1 0x6F /r"/"RAM"
{
ND_INS_VMOVDQU64, ND_CAT_DATAXFER, ND_SET_AVX512F, 1070,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1779 Instruction:"VMOVDQU64 Wn{K}{z},aKq,Vn" Encoding:"evex m:1 p:2 l:x w:1 0x7F /r"/"MAR"
{
ND_INS_VMOVDQU64, ND_CAT_DATAXFER, ND_SET_AVX512F, 1070,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1780 Instruction:"VMOVDQU8 Vn{K}{z},aKq,Wn" Encoding:"evex m:1 p:3 l:x w:0 0x6F /r"/"RAM"
{
ND_INS_VMOVDQU8, ND_CAT_DATAXFER, ND_SET_AVX512BW, 1071,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1781 Instruction:"VMOVDQU8 Wn{K}{z},aKq,Vn" Encoding:"evex m:1 p:3 l:x w:0 0x7F /r"/"MAR"
{
ND_INS_VMOVDQU8, ND_CAT_DATAXFER, ND_SET_AVX512BW, 1071,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1782 Instruction:"VMOVHLPS Vdq,Hdq,Udq" Encoding:"evex m:1 p:0 l:0 w:0 0x12 /r:reg"/"RVM"
{
ND_INS_VMOVHLPS, ND_CAT_DATAXFER, ND_SET_AVX512F, 1072,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_E7NM, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_U, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1783 Instruction:"VMOVHLPS Vdq,Hdq,Udq" Encoding:"vex m:1 p:0 l:0 w:i 0x12 /r:reg"/"RVM"
{
ND_INS_VMOVHLPS, ND_CAT_AVX, ND_SET_AVX, 1072,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_U, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1784 Instruction:"VMOVHPD Vdq,Hdq,Mq" Encoding:"evex m:1 p:1 l:0 w:1 0x16 /r:mem"/"RVM"
{
ND_INS_VMOVHPD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1073,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1785 Instruction:"VMOVHPD Mq,Vdq" Encoding:"evex m:1 p:1 l:0 w:1 0x17 /r:mem"/"MR"
{
ND_INS_VMOVHPD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1073,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1786 Instruction:"VMOVHPD Vdq,Hdq,Mq" Encoding:"vex m:1 p:1 l:0 w:i 0x16 /r:mem"/"RVM"
{
ND_INS_VMOVHPD, ND_CAT_DATAXFER, ND_SET_AVX, 1073,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1787 Instruction:"VMOVHPD Mq,Vdq" Encoding:"vex m:1 p:1 l:0 w:i 0x17 /r:mem"/"MR"
{
ND_INS_VMOVHPD, ND_CAT_DATAXFER, ND_SET_AVX, 1073,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1788 Instruction:"VMOVHPS Vdq,Hdq,Mq" Encoding:"evex m:1 p:0 l:0 w:0 0x16 /r:mem"/"RVM"
{
ND_INS_VMOVHPS, ND_CAT_DATAXFER, ND_SET_AVX512F, 1074,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_T2, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1789 Instruction:"VMOVHPS Mq,Vdq" Encoding:"evex m:1 p:0 l:0 w:0 0x17 /r:mem"/"MR"
{
ND_INS_VMOVHPS, ND_CAT_DATAXFER, ND_SET_AVX512F, 1074,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), ND_TUPLE_T2, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1790 Instruction:"VMOVHPS Vdq,Hdq,Mq" Encoding:"vex m:1 p:0 l:0 w:i 0x16 /r:mem"/"RVM"
{
ND_INS_VMOVHPS, ND_CAT_DATAXFER, ND_SET_AVX, 1074,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1791 Instruction:"VMOVHPS Mq,Vdq" Encoding:"vex m:1 p:0 l:0 w:i 0x17 /r:mem"/"MR"
{
ND_INS_VMOVHPS, ND_CAT_DATAXFER, ND_SET_AVX, 1074,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1792 Instruction:"VMOVLHPS Vdq,Hdq,Udq" Encoding:"evex m:1 p:0 l:0 w:0 0x16 /r:reg"/"RVM"
{
ND_INS_VMOVLHPS, ND_CAT_DATAXFER, ND_SET_AVX512F, 1075,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_E7NM, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_U, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1793 Instruction:"VMOVLHPS Vdq,Hdq,Udq" Encoding:"vex m:1 p:0 l:0 w:i 0x16 /r:reg"/"RVM"
{
ND_INS_VMOVLHPS, ND_CAT_AVX, ND_SET_AVX, 1075,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_U, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1794 Instruction:"VMOVLPD Vdq,Hdq,Mq" Encoding:"evex m:1 p:1 l:0 w:1 0x12 /r:mem"/"RVM"
{
ND_INS_VMOVLPD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1076,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1795 Instruction:"VMOVLPD Mq,Vdq" Encoding:"evex m:1 p:1 l:0 w:1 0x13 /r:mem"/"MR"
{
ND_INS_VMOVLPD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1076,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1796 Instruction:"VMOVLPD Vdq,Hdq,Mq" Encoding:"vex m:1 p:1 l:0 w:i 0x12 /r:mem"/"RVM"
{
ND_INS_VMOVLPD, ND_CAT_DATAXFER, ND_SET_AVX, 1076,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1797 Instruction:"VMOVLPD Mq,Vdq" Encoding:"vex m:1 p:1 l:0 w:i 0x13 /r:mem"/"MR"
{
ND_INS_VMOVLPD, ND_CAT_DATAXFER, ND_SET_AVX, 1076,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1798 Instruction:"VMOVLPS Vdq,Hdq,Mq" Encoding:"evex m:1 p:0 l:0 w:0 0x12 /r:mem"/"RVM"
{
ND_INS_VMOVLPS, ND_CAT_DATAXFER, ND_SET_AVX512F, 1077,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_T2, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1799 Instruction:"VMOVLPS Mq,Vdq" Encoding:"evex m:1 p:0 l:0 w:0 0x13 /r:mem"/"MR"
{
ND_INS_VMOVLPS, ND_CAT_DATAXFER, ND_SET_AVX512F, 1077,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), ND_TUPLE_T2, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1800 Instruction:"VMOVLPS Vdq,Hdq,Mq" Encoding:"vex m:1 p:0 l:0 w:i 0x12 /r:mem"/"RVM"
{
ND_INS_VMOVLPS, ND_CAT_DATAXFER, ND_SET_AVX, 1077,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1801 Instruction:"VMOVLPS Mq,Vdq" Encoding:"vex m:1 p:0 l:0 w:i 0x13 /r:mem"/"MR"
{
ND_INS_VMOVLPS, ND_CAT_DATAXFER, ND_SET_AVX, 1077,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1802 Instruction:"VMOVMSKPD Gy,Ux" Encoding:"vex m:1 p:1 l:x w:i 0x50 /r:reg"/"RM"
{
ND_INS_VMOVMSKPD, ND_CAT_DATAXFER, ND_SET_AVX, 1078,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1803 Instruction:"VMOVMSKPS Gy,Ux" Encoding:"vex m:1 p:0 l:x w:i 0x50 /r:reg"/"RM"
{
ND_INS_VMOVMSKPS, ND_CAT_DATAXFER, ND_SET_AVX, 1079,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1804 Instruction:"VMOVNTDQ Mn,Vn" Encoding:"evex m:1 p:1 l:x w:0 0xE7 /r:mem"/"MR"
{
ND_INS_VMOVNTDQ, ND_CAT_DATAXFER, ND_SET_AVX512F, 1080,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), ND_TUPLE_FVM, ND_EXT_E1NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_n, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1805 Instruction:"VMOVNTDQ Mx,Vx" Encoding:"vex m:1 p:1 l:x w:i 0xE7 /r:mem"/"MR"
{
ND_INS_VMOVNTDQ, ND_CAT_AVX, ND_SET_AVX, 1080,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1806 Instruction:"VMOVNTDQA Vn,Mn" Encoding:"evex m:2 p:1 l:x w:0 0x2A /r:mem"/"RM"
{
ND_INS_VMOVNTDQA, ND_CAT_DATAXFER, ND_SET_AVX512F, 1081,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), ND_TUPLE_FVM, ND_EXT_E1NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1807 Instruction:"VMOVNTDQA Vx,Mx" Encoding:"vex m:2 p:1 l:x w:i 0x2A /r:mem"/"RM"
{
ND_INS_VMOVNTDQA, ND_CAT_AVX, ND_SET_AVX, 1081,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1808 Instruction:"VMOVNTPD Mn,Vn" Encoding:"evex m:1 p:1 l:x w:1 0x2B /r:mem"/"MR"
{
ND_INS_VMOVNTPD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1082,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), ND_TUPLE_FVM, ND_EXT_E1NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_n, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1809 Instruction:"VMOVNTPD Mx,Vx" Encoding:"vex m:1 p:1 l:x w:i 0x2B /r:mem"/"MR"
{
ND_INS_VMOVNTPD, ND_CAT_AVX, ND_SET_AVX, 1082,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1810 Instruction:"VMOVNTPS Mn,Vn" Encoding:"evex m:1 p:0 l:x w:0 0x2B /r:mem"/"MR"
{
ND_INS_VMOVNTPS, ND_CAT_DATAXFER, ND_SET_AVX512F, 1083,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), ND_TUPLE_FVM, ND_EXT_E1NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_n, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1811 Instruction:"VMOVNTPS Mx,Vx" Encoding:"vex m:1 p:0 l:x w:i 0x2B /r:mem"/"MR"
{
ND_INS_VMOVNTPS, ND_CAT_AVX, ND_SET_AVX, 1083,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_1, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1812 Instruction:"VMOVQ Vdq,Eq" Encoding:"evex m:1 p:1 l:0 w:1 0x6E /r"/"RM"
{
ND_INS_VMOVQ, ND_CAT_DATAXFER, ND_SET_AVX512F, 1084,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1813 Instruction:"VMOVQ Ey,Vdq" Encoding:"evex m:1 p:1 l:0 w:1 0x7E /r"/"MR"
{
ND_INS_VMOVQ, ND_CAT_DATAXFER, ND_SET_AVX512F, 1084,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1814 Instruction:"VMOVQ Vdq,Wq" Encoding:"evex m:1 p:2 l:0 w:1 0x7E /r"/"RM"
{
ND_INS_VMOVQ, ND_CAT_DATAXFER, ND_SET_AVX512F, 1084,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1815 Instruction:"VMOVQ Wq,Vdq" Encoding:"evex m:1 p:1 l:0 w:1 0xD6 /r"/"MR"
{
ND_INS_VMOVQ, ND_CAT_DATAXFER, ND_SET_AVX512F, 1084,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1816 Instruction:"VMOVQ Vdq,Ey" Encoding:"vex m:1 p:1 l:0 w:1 0x6E /r"/"RM"
{
ND_INS_VMOVQ, ND_CAT_DATAXFER, ND_SET_AVX, 1084,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:1817 Instruction:"VMOVQ Ey,Vq" Encoding:"vex m:1 p:1 l:0 w:1 0x7E /r"/"MR"
{
ND_INS_VMOVQ, ND_CAT_DATAXFER, ND_SET_AVX, 1084,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1818 Instruction:"VMOVQ Vdq,Wq" Encoding:"vex m:1 p:2 l:0 w:i 0x7E /r"/"RM"
{
ND_INS_VMOVQ, ND_CAT_DATAXFER, ND_SET_AVX, 1084,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1819 Instruction:"VMOVQ Wq,Vdq" Encoding:"vex m:1 p:1 l:0 w:i 0xD6 /r"/"MR"
{
ND_INS_VMOVQ, ND_CAT_DATAXFER, ND_SET_AVX, 1084,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1820 Instruction:"VMOVSD Vdq{K}{z},aKq,Msd" Encoding:"evex m:1 p:3 l:i w:1 0x10 /r:mem"/"RAM"
{
ND_INS_VMOVSD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1085,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E10, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1821 Instruction:"VMOVSD Vdq{K}{z},aKq,Hdq,Udq" Encoding:"evex m:1 p:3 l:i w:1 0x10 /r:reg"/"RAVM"
{
ND_INS_VMOVSD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1085,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E10, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_U, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1822 Instruction:"VMOVSD Msd{K},aKq,Vdq" Encoding:"evex m:1 p:3 l:i w:1 0x11 /r:mem"/"MAR"
{
ND_INS_VMOVSD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1085,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E10, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_sd, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1823 Instruction:"VMOVSD Udq{K}{z},aKq,Hdq,Vdq" Encoding:"evex m:1 p:3 l:i w:1 0x11 /r:reg"/"MAVR"
{
ND_INS_VMOVSD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1085,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E10, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_U, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1824 Instruction:"VMOVSD Vdq,Hdq,Usd" Encoding:"vex m:1 p:3 l:i w:i 0x10 /r:reg"/"RVM"
{
ND_INS_VMOVSD, ND_CAT_DATAXFER, ND_SET_AVX, 1085,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_U, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1825 Instruction:"VMOVSD Vdq,Mq" Encoding:"vex m:1 p:3 l:i w:i 0x10 /r:mem"/"RM"
{
ND_INS_VMOVSD, ND_CAT_DATAXFER, ND_SET_AVX, 1085,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1826 Instruction:"VMOVSD Usd,Hsd,Vsd" Encoding:"vex m:1 p:3 l:i w:i 0x11 /r:reg"/"MVR"
{
ND_INS_VMOVSD, ND_CAT_DATAXFER, ND_SET_AVX, 1085,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_U, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1827 Instruction:"VMOVSD Mq,Vsd" Encoding:"vex m:1 p:3 l:i w:i 0x11 /r:mem"/"MR"
{
ND_INS_VMOVSD, ND_CAT_DATAXFER, ND_SET_AVX, 1085,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1828 Instruction:"VMOVSHDUP Vn{K}{z},aKq,Wn" Encoding:"evex m:1 p:2 l:x w:0 0x16 /r"/"RAM"
{
ND_INS_VMOVSHDUP, ND_CAT_DATAXFER, ND_SET_AVX512F, 1086,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1829 Instruction:"VMOVSHDUP Vx,Wx" Encoding:"vex m:1 p:2 l:x w:i 0x16 /r"/"RM"
{
ND_INS_VMOVSHDUP, ND_CAT_AVX, ND_SET_AVX, 1086,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1830 Instruction:"VMOVSLDUP Vn{K}{z},aKq,Wn" Encoding:"evex m:1 p:2 l:x w:0 0x12 /r"/"RAM"
{
ND_INS_VMOVSLDUP, ND_CAT_DATAXFER, ND_SET_AVX512F, 1087,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1831 Instruction:"VMOVSLDUP Vx,Wx" Encoding:"vex m:1 p:2 l:x w:i 0x12 /r"/"RM"
{
ND_INS_VMOVSLDUP, ND_CAT_AVX, ND_SET_AVX, 1087,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1832 Instruction:"VMOVSS Vdq{K}{z},aKq,Mss" Encoding:"evex m:1 p:2 l:i w:0 0x10 /r:mem"/"RAM"
{
ND_INS_VMOVSS, ND_CAT_DATAXFER, ND_SET_AVX512F, 1088,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E10, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1833 Instruction:"VMOVSS Vdq{K}{z},aKq,Hdq,Udq" Encoding:"evex m:1 p:2 l:i w:0 0x10 /r:reg"/"RAVM"
{
ND_INS_VMOVSS, ND_CAT_DATAXFER, ND_SET_AVX512F, 1088,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E10, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_U, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1834 Instruction:"VMOVSS Mss{K},aKq,Vdq" Encoding:"evex m:1 p:2 l:i w:0 0x11 /r:mem"/"MAR"
{
ND_INS_VMOVSS, ND_CAT_DATAXFER, ND_SET_AVX512F, 1088,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E10, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_ss, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1835 Instruction:"VMOVSS Udq{K}{z},aKq,Hdq,Vdq" Encoding:"evex m:1 p:2 l:i w:0 0x11 /r:reg"/"MAVR"
{
ND_INS_VMOVSS, ND_CAT_DATAXFER, ND_SET_AVX512F, 1088,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E10, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_U, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1836 Instruction:"VMOVSS Vdq,Hdq,Uss" Encoding:"vex m:1 p:2 l:i w:i 0x10 /r:reg"/"RVM"
{
ND_INS_VMOVSS, ND_CAT_DATAXFER, ND_SET_AVX, 1088,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_U, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1837 Instruction:"VMOVSS Vdq,Md" Encoding:"vex m:1 p:2 l:i w:i 0x10 /r:mem"/"RM"
{
ND_INS_VMOVSS, ND_CAT_DATAXFER, ND_SET_AVX, 1088,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_M, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:1838 Instruction:"VMOVSS Uss,Hss,Vss" Encoding:"vex m:1 p:2 l:i w:i 0x11 /r:reg"/"MVR"
{
ND_INS_VMOVSS, ND_CAT_DATAXFER, ND_SET_AVX, 1088,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_U, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1839 Instruction:"VMOVSS Md,Vss" Encoding:"vex m:1 p:2 l:i w:i 0x11 /r:mem"/"MR"
{
ND_INS_VMOVSS, ND_CAT_DATAXFER, ND_SET_AVX, 1088,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1840 Instruction:"VMOVUPD Vn{K}{z},aKq,Wn" Encoding:"evex m:1 p:1 l:x w:1 0x10 /r"/"RAM"
{
ND_INS_VMOVUPD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1089,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1841 Instruction:"VMOVUPD Wn{K}{z},aKq,Vn" Encoding:"evex m:1 p:1 l:x w:1 0x11 /r"/"MAR"
{
ND_INS_VMOVUPD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1089,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1842 Instruction:"VMOVUPD Vx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x10 /r"/"RM"
{
ND_INS_VMOVUPD, ND_CAT_DATAXFER, ND_SET_AVX, 1089,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1843 Instruction:"VMOVUPD Wx,Vx" Encoding:"vex m:1 p:1 l:x w:i 0x11 /r"/"MR"
{
ND_INS_VMOVUPD, ND_CAT_DATAXFER, ND_SET_AVX, 1089,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1844 Instruction:"VMOVUPS Vn{K}{z},aKq,Wn" Encoding:"evex m:1 p:0 l:x w:0 0x10 /r"/"RAM"
{
ND_INS_VMOVUPS, ND_CAT_DATAXFER, ND_SET_AVX512F, 1090,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1845 Instruction:"VMOVUPS Wn{K}{z},aKq,Vn" Encoding:"evex m:1 p:0 l:x w:0 0x11 /r"/"MAR"
{
ND_INS_VMOVUPS, ND_CAT_DATAXFER, ND_SET_AVX512F, 1090,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1846 Instruction:"VMOVUPS Vx,Wx" Encoding:"vex m:1 p:0 l:x w:i 0x10 /r"/"RM"
{
ND_INS_VMOVUPS, ND_CAT_DATAXFER, ND_SET_AVX, 1090,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1847 Instruction:"VMOVUPS Wx,Vx" Encoding:"vex m:1 p:0 l:x w:i 0x11 /r"/"MR"
{
ND_INS_VMOVUPS, ND_CAT_DATAXFER, ND_SET_AVX, 1090,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1848 Instruction:"VMPSADBW Vx,Hx,Wx,Ib" Encoding:"vex m:3 p:1 l:x w:i 0x42 /r ib"/"RVMI"
{
ND_INS_VMPSADBW, ND_CAT_AVX, ND_SET_AVX, 1091,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1849 Instruction:"VMPTRLD Mq" Encoding:"NP 0x0F 0xC7 /6:mem"/"M"
{
ND_INS_VMPTRLD, ND_CAT_VTX, ND_SET_VTX, 1092,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_LONG|ND_MOD_VMXR,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_VTX,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1850 Instruction:"VMPTRST Mq" Encoding:"NP 0x0F 0xC7 /7:mem"/"M"
{
ND_INS_VMPTRST, ND_CAT_VTX, ND_SET_VTX, 1093,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_LONG|ND_MOD_VMXR,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_VTX,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1851 Instruction:"VMREAD Ey,Gy" Encoding:"NP 0x0F 0x78 /r"/"MR"
{
ND_INS_VMREAD, ND_CAT_VTX, ND_SET_VTX, 1094,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_LONG|ND_MOD_VMXR,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_MODRM, ND_CFF_VTX,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_E, ND_OPS_y, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1852 Instruction:"VMRESUME" Encoding:"0x0F 0x01 /0xC3"/""
{
ND_INS_VMRESUME, ND_CAT_VTX, ND_SET_VTX, 1095,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_LONG|ND_MOD_VMXR,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_VTX,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1853 Instruction:"VMRUN" Encoding:"0x0F 0x01 /0xD8"/""
{
ND_INS_VMRUN, ND_CAT_SYSTEM, ND_SET_SVM, 1096,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_LONG|ND_MOD_VMXR,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SVM,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:1854 Instruction:"VMSAVE" Encoding:"0x0F 0x01 /0xDB"/""
{
ND_INS_VMSAVE, ND_CAT_SYSTEM, ND_SET_SVM, 1097,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_LONG|ND_MOD_VMXR,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_SVM,
0,
0,
0,
0,
},
// Pos:1855 Instruction:"VMULPD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:1 p:1 l:x w:1 0x59 /r"/"RAVM"
{
ND_INS_VMULPD, ND_CAT_AVX512, ND_SET_AVX512F, 1098,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:1856 Instruction:"VMULPD Vpd,Hpd,Wpd" Encoding:"vex m:1 p:1 l:x w:i 0x59 /r"/"RVM"
{
ND_INS_VMULPD, ND_CAT_AVX, ND_SET_AVX, 1098,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_pd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:1857 Instruction:"VMULPS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:1 p:0 l:x w:0 0x59 /r"/"RAVM"
{
ND_INS_VMULPS, ND_CAT_AVX512, ND_SET_AVX512F, 1099,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:1858 Instruction:"VMULPS Vps,Hps,Wps" Encoding:"vex m:1 p:0 l:x w:i 0x59 /r"/"RVM"
{
ND_INS_VMULPS, ND_CAT_AVX, ND_SET_AVX, 1099,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ps, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:1859 Instruction:"VMULSD Vdq{K}{z},aKq,Hdq,Wsd{er}" Encoding:"evex m:1 p:3 l:i w:1 0x59 /r"/"RAVM"
{
ND_INS_VMULSD, ND_CAT_AVX512, ND_SET_AVX512F, 1100,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1860 Instruction:"VMULSD Vsd,Hsd,Wsd" Encoding:"vex m:1 p:3 l:i w:i 0x59 /r"/"RVM"
{
ND_INS_VMULSD, ND_CAT_AVX, ND_SET_AVX, 1100,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:1861 Instruction:"VMULSS Vdq{K}{z},aKq,Hdq,Wss{er}" Encoding:"evex m:1 p:2 l:i w:0 0x59 /r"/"RAVM"
{
ND_INS_VMULSS, ND_CAT_AVX512, ND_SET_AVX512F, 1101,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:1862 Instruction:"VMULSS Vss,Hss,Wss" Encoding:"vex m:1 p:2 l:i w:i 0x59 /r"/"RVM"
{
ND_INS_VMULSS, ND_CAT_AVX, ND_SET_AVX, 1101,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:1863 Instruction:"VMWRITE Gy,Ey" Encoding:"NP 0x0F 0x79 /r"/"RM"
{
ND_INS_VMWRITE, ND_CAT_VTX, ND_SET_VTX, 1102,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_LONG|ND_MOD_VMXR,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_F64|ND_FLAG_MODRM, ND_CFF_VTX,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1864 Instruction:"VMXOFF" Encoding:"0x0F 0x01 /0xC4"/""
{
ND_INS_VMXOFF, ND_CAT_VTX, ND_SET_VTX, 1103,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_LONG|ND_MOD_VMXR,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_VTX,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1865 Instruction:"VMXON Mq" Encoding:"0xF3 0x0F 0xC7 /6:mem"/"M"
{
ND_INS_VMXON, ND_CAT_VTX, ND_SET_VTX, 1104,
ND_MOD_R0|ND_MOD_PROT|ND_MOD_LONG|ND_MOD_VMXR,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_VTX,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_M, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1866 Instruction:"VORPD Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:1 p:1 l:x w:1 0x56 /r"/"RAVM"
{
ND_INS_VORPD, ND_CAT_LOGICAL_FP, ND_SET_AVX512DQ, 1105,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:1867 Instruction:"VORPD Vpd,Hpd,Wpd" Encoding:"vex m:1 p:1 l:x w:i 0x56 /r"/"RVM"
{
ND_INS_VORPD, ND_CAT_LOGICAL_FP, ND_SET_AVX, 1105,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_pd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:1868 Instruction:"VORPS Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:1 p:0 l:x w:0 0x56 /r"/"RAVM"
{
ND_INS_VORPS, ND_CAT_LOGICAL_FP, ND_SET_AVX512DQ, 1106,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1869 Instruction:"VORPS Vps,Hps,Wps" Encoding:"vex m:1 p:0 l:x w:i 0x56 /r"/"RVM"
{
ND_INS_VORPS, ND_CAT_LOGICAL_FP, ND_SET_AVX, 1106,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ps, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:1870 Instruction:"VP2INTERSECTD rKq+1,Hn,Wn|B32" Encoding:"evex m:2 p:3 l:x w:0 0x68 /r"/"RVM"
{
ND_INS_VP2INTERSECTD, ND_CAT_AVX512VP2INTERSECT, ND_SET_AVX512VP2INTERSECT, 1107,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VP2INTERSECT,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 2),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1871 Instruction:"VP2INTERSECTQ rKq+1,Hn,Wn|B64" Encoding:"evex m:2 p:3 l:x w:1 0x68 /r"/"RVM"
{
ND_INS_VP2INTERSECTQ, ND_CAT_AVX512VP2INTERSECT, ND_SET_AVX512VP2INTERSECT, 1108,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VP2INTERSECT,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 2),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:1872 Instruction:"VP4DPWSSD Voq{K}{z},aKq,Hoq+3,Mdq" Encoding:"evex m:2 p:3 l:2 w:0 0x52 /r:mem"/"RAVM"
{
ND_INS_VP4DPWSSD, ND_CAT_VNNIW, ND_SET_AVX5124VNNIW, 1109,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T1_4X, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX5124VNNIW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_oq, ND_OPF_R, 0, 4),
OP(ND_OPT_M, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1873 Instruction:"VP4DPWSSDS Voq{K}{z},aKq,Hoq+3,Mdq" Encoding:"evex m:2 p:3 l:2 w:0 0x53 /r:mem"/"RAVM"
{
ND_INS_VP4DPWSSDS, ND_CAT_VNNIW, ND_SET_AVX5124VNNIW, 1110,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T1_4X, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX5124VNNIW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_oq, ND_OPF_R, 0, 4),
OP(ND_OPT_M, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:1874 Instruction:"VPABSB Vn{K}{z},aKq,Wn" Encoding:"evex m:2 p:1 l:x w:x 0x1C /r"/"RAM"
{
ND_INS_VPABSB, ND_CAT_AVX512, ND_SET_AVX512BW, 1111,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1875 Instruction:"VPABSB Vx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x1C /r"/"RM"
{
ND_INS_VPABSB, ND_CAT_AVX, ND_SET_AVX, 1111,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1876 Instruction:"VPABSD Vn{K}{z},aKq,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x1E /r"/"RAM"
{
ND_INS_VPABSD, ND_CAT_AVX512, ND_SET_AVX512F, 1112,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1877 Instruction:"VPABSD Vx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x1E /r"/"RM"
{
ND_INS_VPABSD, ND_CAT_AVX, ND_SET_AVX, 1112,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1878 Instruction:"VPABSQ Vn{K}{z},aKq,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x1F /r"/"RAM"
{
ND_INS_VPABSQ, ND_CAT_AVX512, ND_SET_AVX512F, 1113,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:1879 Instruction:"VPABSW Vn{K}{z},aKq,Wn" Encoding:"evex m:2 p:1 l:x w:x 0x1D /r"/"RAM"
{
ND_INS_VPABSW, ND_CAT_AVX512, ND_SET_AVX512BW, 1114,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1880 Instruction:"VPABSW Vx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x1D /r"/"RM"
{
ND_INS_VPABSW, ND_CAT_AVX, ND_SET_AVX, 1114,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1881 Instruction:"VPACKSSDW Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:1 p:1 l:x w:0 0x6B /r"/"RAVM"
{
ND_INS_VPACKSSDW, ND_CAT_AVX512, ND_SET_AVX512BW, 1115,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1882 Instruction:"VPACKSSDW Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x6B /r"/"RVM"
{
ND_INS_VPACKSSDW, ND_CAT_AVX, ND_SET_AVX, 1115,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1883 Instruction:"VPACKSSWB Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0x63 /r"/"RAVM"
{
ND_INS_VPACKSSWB, ND_CAT_AVX512, ND_SET_AVX512BW, 1116,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1884 Instruction:"VPACKSSWB Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x63 /r"/"RVM"
{
ND_INS_VPACKSSWB, ND_CAT_AVX, ND_SET_AVX, 1116,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1885 Instruction:"VPACKUSDW Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x2B /r"/"RAVM"
{
ND_INS_VPACKUSDW, ND_CAT_AVX512, ND_SET_AVX512BW, 1117,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1886 Instruction:"VPACKUSDW Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x2B /r"/"RVM"
{
ND_INS_VPACKUSDW, ND_CAT_AVX, ND_SET_AVX, 1117,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1887 Instruction:"VPACKUSWB Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0x67 /r"/"RAVM"
{
ND_INS_VPACKUSWB, ND_CAT_AVX512, ND_SET_AVX512BW, 1118,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1888 Instruction:"VPACKUSWB Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x67 /r"/"RVM"
{
ND_INS_VPACKUSWB, ND_CAT_AVX, ND_SET_AVX, 1118,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1889 Instruction:"VPADDB Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xFC /r"/"RAVM"
{
ND_INS_VPADDB, ND_CAT_AVX512, ND_SET_AVX512BW, 1119,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1890 Instruction:"VPADDB Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xFC /r"/"RVM"
{
ND_INS_VPADDB, ND_CAT_AVX, ND_SET_AVX, 1119,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1891 Instruction:"VPADDD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:1 p:1 l:x w:0 0xFE /r"/"RAVM"
{
ND_INS_VPADDD, ND_CAT_AVX512, ND_SET_AVX512F, 1120,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1892 Instruction:"VPADDD Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xFE /r"/"RVM"
{
ND_INS_VPADDD, ND_CAT_AVX, ND_SET_AVX, 1120,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1893 Instruction:"VPADDQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:1 p:1 l:x w:1 0xD4 /r"/"RAVM"
{
ND_INS_VPADDQ, ND_CAT_AVX512, ND_SET_AVX512F, 1121,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:1894 Instruction:"VPADDQ Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xD4 /r"/"RVM"
{
ND_INS_VPADDQ, ND_CAT_AVX, ND_SET_AVX, 1121,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1895 Instruction:"VPADDSB Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xEC /r"/"RAVM"
{
ND_INS_VPADDSB, ND_CAT_AVX512, ND_SET_AVX512BW, 1122,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1896 Instruction:"VPADDSB Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xEC /r"/"RVM"
{
ND_INS_VPADDSB, ND_CAT_AVX, ND_SET_AVX, 1122,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1897 Instruction:"VPADDSW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xED /r"/"RAVM"
{
ND_INS_VPADDSW, ND_CAT_AVX512, ND_SET_AVX512BW, 1123,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1898 Instruction:"VPADDSW Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xED /r"/"RVM"
{
ND_INS_VPADDSW, ND_CAT_AVX, ND_SET_AVX, 1123,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1899 Instruction:"VPADDUSB Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xDC /r"/"RAVM"
{
ND_INS_VPADDUSB, ND_CAT_AVX512, ND_SET_AVX512BW, 1124,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1900 Instruction:"VPADDUSB Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xDC /r"/"RVM"
{
ND_INS_VPADDUSB, ND_CAT_AVX, ND_SET_AVX, 1124,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1901 Instruction:"VPADDUSW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xDD /r"/"RAVM"
{
ND_INS_VPADDUSW, ND_CAT_AVX512, ND_SET_AVX512BW, 1125,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1902 Instruction:"VPADDUSW Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xDD /r"/"RVM"
{
ND_INS_VPADDUSW, ND_CAT_AVX, ND_SET_AVX, 1125,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1903 Instruction:"VPADDW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xFD /r"/"RAVM"
{
ND_INS_VPADDW, ND_CAT_AVX512, ND_SET_AVX512BW, 1126,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1904 Instruction:"VPADDW Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xFD /r"/"RVM"
{
ND_INS_VPADDW, ND_CAT_AVX, ND_SET_AVX, 1126,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1905 Instruction:"VPALIGNR Vn{K}{z},aKq,Hn,Wn,Ib" Encoding:"evex m:3 p:1 l:x w:i 0x0F /r ib"/"RAVMI"
{
ND_INS_VPALIGNR, ND_CAT_AVX512, ND_SET_AVX512BW, 1127,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(5, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1906 Instruction:"VPALIGNR Vx,Hx,Wx,Ib" Encoding:"vex m:3 p:1 l:x w:i 0x0F /r ib"/"RVMI"
{
ND_INS_VPALIGNR, ND_CAT_AVX, ND_SET_AVX, 1127,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1907 Instruction:"VPAND Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xDB /r"/"RVM"
{
ND_INS_VPAND, ND_CAT_LOGICAL, ND_SET_AVX, 1128,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1908 Instruction:"VPANDD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:1 p:1 l:x w:0 0xDB /r"/"RAVM"
{
ND_INS_VPANDD, ND_CAT_LOGICAL, ND_SET_AVX512F, 1129,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1909 Instruction:"VPANDN Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xDF /r"/"RVM"
{
ND_INS_VPANDN, ND_CAT_LOGICAL, ND_SET_AVX, 1130,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1910 Instruction:"VPANDND Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:1 p:1 l:x w:0 0xDF /r"/"RAVM"
{
ND_INS_VPANDND, ND_CAT_LOGICAL, ND_SET_AVX512F, 1131,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1911 Instruction:"VPANDNQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:1 p:1 l:x w:1 0xDF /r"/"RAVM"
{
ND_INS_VPANDNQ, ND_CAT_LOGICAL, ND_SET_AVX512F, 1132,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:1912 Instruction:"VPANDQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:1 p:1 l:x w:1 0xDB /r"/"RAVM"
{
ND_INS_VPANDQ, ND_CAT_LOGICAL, ND_SET_AVX512F, 1133,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:1913 Instruction:"VPAVGB Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xE0 /r"/"RAVM"
{
ND_INS_VPAVGB, ND_CAT_AVX512, ND_SET_AVX512BW, 1134,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1914 Instruction:"VPAVGB Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xE0 /r"/"RVM"
{
ND_INS_VPAVGB, ND_CAT_AVX, ND_SET_AVX, 1134,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1915 Instruction:"VPAVGW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xE3 /r"/"RAVM"
{
ND_INS_VPAVGW, ND_CAT_AVX512, ND_SET_AVX512BW, 1135,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1916 Instruction:"VPAVGW Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xE3 /r"/"RVM"
{
ND_INS_VPAVGW, ND_CAT_AVX, ND_SET_AVX, 1135,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1917 Instruction:"VPBLENDD Vx,Hx,Wx,Ib" Encoding:"vex m:3 p:1 l:x w:0 0x02 /r ib"/"RVMI"
{
ND_INS_VPBLENDD, ND_CAT_AVX2, ND_SET_AVX2, 1136,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1918 Instruction:"VPBLENDMB Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:0 0x66 /r"/"RAVM"
{
ND_INS_VPBLENDMB, ND_CAT_BLEND, ND_SET_AVX512BW, 1137,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1919 Instruction:"VPBLENDMD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x64 /r"/"RAVM"
{
ND_INS_VPBLENDMD, ND_CAT_BLEND, ND_SET_AVX512F, 1138,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1920 Instruction:"VPBLENDMQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x64 /r"/"RAVM"
{
ND_INS_VPBLENDMQ, ND_CAT_BLEND, ND_SET_AVX512F, 1139,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:1921 Instruction:"VPBLENDMW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:1 0x66 /r"/"RAVM"
{
ND_INS_VPBLENDMW, ND_CAT_BLEND, ND_SET_AVX512BW, 1140,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1922 Instruction:"VPBLENDVB Vx,Hx,Wx,Lx" Encoding:"vex m:3 p:1 l:x w:0 0x4C /r is4"/"RVML"
{
ND_INS_VPBLENDVB, ND_CAT_AVX, ND_SET_AVX, 1141,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1923 Instruction:"VPBLENDW Vx,Hx,Wx,Ib" Encoding:"vex m:3 p:1 l:x w:i 0x0E /r ib"/"RVMI"
{
ND_INS_VPBLENDW, ND_CAT_AVX, ND_SET_AVX, 1142,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1924 Instruction:"VPBROADCASTB Vn{K}{z},aKq,Wb" Encoding:"evex m:2 p:1 l:x w:0 0x78 /r"/"RAM"
{
ND_INS_VPBROADCASTB, ND_CAT_BROADCAST, ND_SET_AVX512BW, 1143,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S8, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1925 Instruction:"VPBROADCASTB Vn{K}{z},aKq,Rb" Encoding:"evex m:2 p:1 l:x w:0 0x7A /r:reg"/"RAM"
{
ND_INS_VPBROADCASTB, ND_CAT_BROADCAST, ND_SET_AVX512BW, 1143,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S8, ND_EXT_E7NM, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_R, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1926 Instruction:"VPBROADCASTB Vx,Wb" Encoding:"vex m:2 p:1 l:x w:0 0x78 /r"/"RM"
{
ND_INS_VPBROADCASTB, ND_CAT_BROADCAST, ND_SET_AVX2, 1143,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1927 Instruction:"VPBROADCASTD Vn{K}{z},aKq,Wd" Encoding:"evex m:2 p:1 l:x w:0 0x58 /r"/"RAM"
{
ND_INS_VPBROADCASTD, ND_CAT_BROADCAST, ND_SET_AVX512F, 1144,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:1928 Instruction:"VPBROADCASTD Vn{K}{z},aKq,Rd" Encoding:"evex m:2 p:1 l:x w:0 0x7C /r:reg"/"RAM"
{
ND_INS_VPBROADCASTD, ND_CAT_BROADCAST, ND_SET_AVX512F, 1144,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E7NM, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_R, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:1929 Instruction:"VPBROADCASTD Vx,Wd" Encoding:"vex m:2 p:1 l:x w:0 0x58 /r"/"RM"
{
ND_INS_VPBROADCASTD, ND_CAT_BROADCAST, ND_SET_AVX2, 1144,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:1930 Instruction:"VPBROADCASTMB2Q Vn,mKq" Encoding:"evex m:2 p:2 l:x w:1 0x2A /r:reg"/"RM"
{
ND_INS_VPBROADCASTMB2Q, ND_CAT_BROADCAST, ND_SET_AVX512CD, 1145,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_E6NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512CD,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1931 Instruction:"VPBROADCASTMW2D Vn,mKq" Encoding:"evex m:2 p:2 l:x w:0 0x3A /r:reg"/"RM"
{
ND_INS_VPBROADCASTMW2D, ND_CAT_BROADCAST, ND_SET_AVX512CD, 1146,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_E6NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512CD,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1932 Instruction:"VPBROADCASTQ Vn{K}{z},aKq,Wq" Encoding:"evex m:2 p:1 l:x w:1 0x59 /r"/"RAM"
{
ND_INS_VPBROADCASTQ, ND_CAT_BROADCAST, ND_SET_AVX512F, 1147,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1933 Instruction:"VPBROADCASTQ Vn{K}{z},aKq,Rq" Encoding:"evex m:2 p:1 l:x w:1 0x7C /r:reg"/"RAM"
{
ND_INS_VPBROADCASTQ, ND_CAT_BROADCAST, ND_SET_AVX512F, 1147,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E7NM, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_R, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1934 Instruction:"VPBROADCASTQ Vx,Wq" Encoding:"vex m:2 p:1 l:x w:0 0x59 /r"/"RM"
{
ND_INS_VPBROADCASTQ, ND_CAT_BROADCAST, ND_SET_AVX2, 1147,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:1935 Instruction:"VPBROADCASTW Vn{K}{z},aKq,Ww" Encoding:"evex m:2 p:1 l:x w:0 0x79 /r"/"RAM"
{
ND_INS_VPBROADCASTW, ND_CAT_BROADCAST, ND_SET_AVX512BW, 1148,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S16, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:1936 Instruction:"VPBROADCASTW Vn{K}{z},aKq,Rw" Encoding:"evex m:2 p:1 l:x w:0 0x7B /r:reg"/"RAM"
{
ND_INS_VPBROADCASTW, ND_CAT_BROADCAST, ND_SET_AVX512BW, 1148,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S16, ND_EXT_E7NM, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_R, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:1937 Instruction:"VPBROADCASTW Vx,Ww" Encoding:"vex m:2 p:1 l:x w:0 0x79 /r"/"RM"
{
ND_INS_VPBROADCASTW, ND_CAT_BROADCAST, ND_SET_AVX2, 1148,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:1938 Instruction:"VPCLMULQDQ Vn,Hn,Wn,Ib" Encoding:"evex m:3 p:1 l:x w:i 0x44 /r ib"/"RVMI"
{
ND_INS_VPCLMULQDQ, ND_CAT_VPCLMULQDQ, ND_SET_VPCLMULQDQ, 1149,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_VPCLMULQDQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1939 Instruction:"VPCLMULQDQ Vdq,Hdq,Wdq,Ib" Encoding:"vex m:3 p:1 l:0 w:i 0x44 /r ib"/"RVMI"
{
ND_INS_VPCLMULQDQ, ND_CAT_VPCLMULQDQ, ND_SET_VPCLMULQDQ, 1149,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_VPCLMULQDQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1940 Instruction:"VPCMOV Vx,Hx,Wx,Lx" Encoding:"xop m:8 w:0 0xA2 /r is4"/"RVML"
{
ND_INS_VPCMOV, ND_CAT_XOP, ND_SET_XOP, 1150,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1941 Instruction:"VPCMOV Vx,Hx,Lx,Wx" Encoding:"xop m:8 w:1 0xA2 /r is4"/"RVLM"
{
ND_INS_VPCMOV, ND_CAT_XOP, ND_SET_XOP, 1150,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1942 Instruction:"VPCMPB rKq{K},aKq,Hn,Wn,Ib" Encoding:"evex m:3 p:1 l:x w:0 0x3F /r ib"/"RAVMI"
{
ND_INS_VPCMPB, ND_CAT_AVX512, ND_SET_AVX512BW, 1151,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(5, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1943 Instruction:"VPCMPD rKq{K},aKq,Hn,Wn|B32,Ib" Encoding:"evex m:3 p:1 l:x w:0 0x1F /r ib"/"RAVMI"
{
ND_INS_VPCMPD, ND_CAT_AVX512, ND_SET_AVX512F, 1152,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1944 Instruction:"VPCMPEQB rKq{K},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0x74 /r"/"RAVM"
{
ND_INS_VPCMPEQB, ND_CAT_AVX512, ND_SET_AVX512BW, 1153,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1945 Instruction:"VPCMPEQB Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x74 /r"/"RVM"
{
ND_INS_VPCMPEQB, ND_CAT_AVX, ND_SET_AVX, 1153,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1946 Instruction:"VPCMPEQD rKq{K},aKq,Hn,Wn|B32" Encoding:"evex m:1 p:1 l:x w:i 0x76 /r"/"RAVM"
{
ND_INS_VPCMPEQD, ND_CAT_AVX512, ND_SET_AVX512F, 1154,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1947 Instruction:"VPCMPEQD Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x76 /r"/"RVM"
{
ND_INS_VPCMPEQD, ND_CAT_AVX, ND_SET_AVX, 1154,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1948 Instruction:"VPCMPEQQ rKq{K},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x29 /r"/"RAVM"
{
ND_INS_VPCMPEQQ, ND_CAT_AVX512, ND_SET_AVX512F, 1155,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:1949 Instruction:"VPCMPEQQ Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x29 /r"/"RVM"
{
ND_INS_VPCMPEQQ, ND_CAT_AVX, ND_SET_AVX, 1155,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1950 Instruction:"VPCMPEQW rKq{K},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0x75 /r"/"RAVM"
{
ND_INS_VPCMPEQW, ND_CAT_AVX512, ND_SET_AVX512BW, 1156,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1951 Instruction:"VPCMPEQW Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x75 /r"/"RVM"
{
ND_INS_VPCMPEQW, ND_CAT_AVX, ND_SET_AVX, 1156,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1952 Instruction:"VPCMPESTRI Vdq,Wdq,Ib" Encoding:"vex m:3 p:1 l:0 w:i 0x61 /r ib"/"RMI"
{
ND_INS_VPCMPESTRI, ND_CAT_STTNI, ND_SET_AVX, 1157,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 4), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_y, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_y, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_y, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1953 Instruction:"VPCMPESTRM Vdq,Wdq,Ib" Encoding:"vex m:3 p:1 l:0 w:i 0x60 /r ib"/"RMI"
{
ND_INS_VPCMPESTRM, ND_CAT_STTNI, ND_SET_AVX, 1158,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 4), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_y, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_y, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_SSE_XMM0, ND_OPS_dq, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1954 Instruction:"VPCMPGTB rKq{K},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0x64 /r"/"RAVM"
{
ND_INS_VPCMPGTB, ND_CAT_AVX512, ND_SET_AVX512BW, 1159,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1955 Instruction:"VPCMPGTB Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x64 /r"/"RVM"
{
ND_INS_VPCMPGTB, ND_CAT_AVX, ND_SET_AVX, 1159,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1956 Instruction:"VPCMPGTD rKq{K},aKq,Hn,Wn|B32" Encoding:"evex m:1 p:1 l:x w:0 0x66 /r"/"RAVM"
{
ND_INS_VPCMPGTD, ND_CAT_AVX512, ND_SET_AVX512F, 1160,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1957 Instruction:"VPCMPGTD Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x66 /r"/"RVM"
{
ND_INS_VPCMPGTD, ND_CAT_AVX, ND_SET_AVX, 1160,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1958 Instruction:"VPCMPGTQ rKq{K},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x37 /r"/"RAVM"
{
ND_INS_VPCMPGTQ, ND_CAT_AVX512, ND_SET_AVX512F, 1161,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:1959 Instruction:"VPCMPGTQ Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x37 /r"/"RVM"
{
ND_INS_VPCMPGTQ, ND_CAT_AVX, ND_SET_AVX, 1161,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1960 Instruction:"VPCMPGTW rKq{K},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0x65 /r"/"RAVM"
{
ND_INS_VPCMPGTW, ND_CAT_AVX512, ND_SET_AVX512BW, 1162,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1961 Instruction:"VPCMPGTW Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x65 /r"/"RVM"
{
ND_INS_VPCMPGTW, ND_CAT_AVX, ND_SET_AVX, 1162,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:1962 Instruction:"VPCMPISTRI Vdq,Wdq,Ib" Encoding:"vex m:3 p:1 l:0 w:i 0x63 /r ib"/"RMI"
{
ND_INS_VPCMPISTRI, ND_CAT_STTNI, ND_SET_AVX, 1163,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 2), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_y, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1963 Instruction:"VPCMPISTRM Vdq,Wdq,Ib" Encoding:"vex m:3 p:1 l:0 w:i 0x62 /r ib"/"RMI"
{
ND_INS_VPCMPISTRM, ND_CAT_STTNI, ND_SET_AVX, 1164,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 2), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_SSE_XMM0, ND_OPS_dq, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:1964 Instruction:"VPCMPQ rKq{K},aKq,Hn,Wn|B64,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x1F /r ib"/"RAVMI"
{
ND_INS_VPCMPQ, ND_CAT_AVX512, ND_SET_AVX512F, 1165,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1965 Instruction:"VPCMPUB rKq{K},aKq,Hn,Wn,Ib" Encoding:"evex m:3 p:1 l:x w:0 0x3E /r ib"/"RAVMI"
{
ND_INS_VPCMPUB, ND_CAT_AVX512, ND_SET_AVX512BW, 1166,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(5, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1966 Instruction:"VPCMPUD rKq{K},aKq,Hn,Wn|B32,Ib" Encoding:"evex m:3 p:1 l:x w:0 0x1E /r ib"/"RAVMI"
{
ND_INS_VPCMPUD, ND_CAT_AVX512, ND_SET_AVX512F, 1167,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1967 Instruction:"VPCMPUQ rKq{K},aKq,Hn,Wn|B64,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x1E /r ib"/"RAVMI"
{
ND_INS_VPCMPUQ, ND_CAT_AVX512, ND_SET_AVX512F, 1168,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1968 Instruction:"VPCMPUW rKq{K},aKq,Hn,Wn,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x3E /r ib"/"RAVMI"
{
ND_INS_VPCMPUW, ND_CAT_AVX512, ND_SET_AVX512BW, 1169,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(5, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1969 Instruction:"VPCMPW rKq{K},aKq,Hn,Wn,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x3F /r ib"/"RAVMI"
{
ND_INS_VPCMPW, ND_CAT_AVX512, ND_SET_AVX512BW, 1170,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(5, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1970 Instruction:"VPCOMB Vdq,Hdq,Wdq,Ib" Encoding:"xop m:8 0xCC /r ib"/"RVMI"
{
ND_INS_VPCOMB, ND_CAT_XOP, ND_SET_XOP, 1171,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1971 Instruction:"VPCOMD Vdq,Hdq,Wdq,Ib" Encoding:"xop m:8 0xCE /r ib"/"RVMI"
{
ND_INS_VPCOMD, ND_CAT_XOP, ND_SET_XOP, 1172,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1972 Instruction:"VPCOMPRESSB Wn{K}{z},aKq,Vn" Encoding:"evex m:2 p:1 l:x w:0 0x63 /r"/"MAR"
{
ND_INS_VPCOMPRESSB, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI2, 1173,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOMZ|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI2,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1973 Instruction:"VPCOMPRESSD Wn{K}{z},aKq,Vn" Encoding:"evex m:2 p:1 l:x w:0 0x8B /r"/"MAR"
{
ND_INS_VPCOMPRESSD, ND_CAT_COMPRESS, ND_SET_AVX512F, 1174,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOMZ|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1974 Instruction:"VPCOMPRESSQ Wn{K}{z},aKq,Vn" Encoding:"evex m:2 p:1 l:x w:1 0x8B /r"/"MAR"
{
ND_INS_VPCOMPRESSQ, ND_CAT_COMPRESS, ND_SET_AVX512F, 1175,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOMZ|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1975 Instruction:"VPCOMPRESSW Wn{K}{z},aKq,Vn" Encoding:"evex m:2 p:1 l:x w:1 0x63 /r"/"MAR"
{
ND_INS_VPCOMPRESSW, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI2, 1176,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOMZ|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI2,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1976 Instruction:"VPCOMQ Vdq,Hdq,Wdq,Ib" Encoding:"xop m:8 0xCF /r ib"/"RVMI"
{
ND_INS_VPCOMQ, ND_CAT_XOP, ND_SET_XOP, 1177,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1977 Instruction:"VPCOMUB Vdq,Hdq,Wdq,Ib" Encoding:"xop m:8 0xEC /r ib"/"RVMI"
{
ND_INS_VPCOMUB, ND_CAT_XOP, ND_SET_XOP, 1178,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1978 Instruction:"VPCOMUD Vdq,Hdq,Wdq,Ib" Encoding:"xop m:8 0xEE /r ib"/"RVMI"
{
ND_INS_VPCOMUD, ND_CAT_XOP, ND_SET_XOP, 1179,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1979 Instruction:"VPCOMUQ Vdq,Hdq,Wdq,Ib" Encoding:"xop m:8 0xEF /r ib"/"RVMI"
{
ND_INS_VPCOMUQ, ND_CAT_XOP, ND_SET_XOP, 1180,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1980 Instruction:"VPCOMUW Vdq,Hdq,Wdq,Ib" Encoding:"xop m:8 0xED /r ib"/"RVMI"
{
ND_INS_VPCOMUW, ND_CAT_XOP, ND_SET_XOP, 1181,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1981 Instruction:"VPCOMW Vdq,Hdq,Wdq,Ib" Encoding:"xop m:8 0xCD /r ib"/"RVMI"
{
ND_INS_VPCOMW, ND_CAT_XOP, ND_SET_XOP, 1182,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1982 Instruction:"VPCONFLICTD Vn{K}{z},aKq,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0xC4 /r"/"RAM"
{
ND_INS_VPCONFLICTD, ND_CAT_CONFLICT, ND_SET_AVX512CD, 1183,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512CD,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1983 Instruction:"VPCONFLICTQ Vn{K}{z},aKq,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0xC4 /r"/"RAM"
{
ND_INS_VPCONFLICTQ, ND_CAT_CONFLICT, ND_SET_AVX512CD, 1184,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512CD,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:1984 Instruction:"VPDPBUSD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x50 /r"/"RAVM"
{
ND_INS_VPDPBUSD, ND_CAT_VNNI, ND_SET_AVX512VNNI, 1185,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VNNI,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1985 Instruction:"VPDPBUSDS Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x51 /r"/"RAVM"
{
ND_INS_VPDPBUSDS, ND_CAT_VNNI, ND_SET_AVX512VNNI, 1186,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VNNI,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1986 Instruction:"VPDPWSSD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x52 /r"/"RAVM"
{
ND_INS_VPDPWSSD, ND_CAT_VNNI, ND_SET_AVX512VNNI, 1187,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VNNI,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1987 Instruction:"VPDPWSSDS Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x53 /r"/"RAVM"
{
ND_INS_VPDPWSSDS, ND_CAT_VNNI, ND_SET_AVX512VNNI, 1188,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VNNI,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1988 Instruction:"VPERM2F128 Vqq,Hqq,Wqq,Ib" Encoding:"vex m:3 p:1 l:1 w:0 0x06 /r ib"/"RVMI"
{
ND_INS_VPERM2F128, ND_CAT_AVX, ND_SET_AVX, 1189,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_qq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_qq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1989 Instruction:"VPERM2I128 Vqq,Hqq,Wqq,Ib" Encoding:"vex m:3 p:1 l:1 w:0 0x46 /r ib"/"RVMI"
{
ND_INS_VPERM2I128, ND_CAT_AVX2, ND_SET_AVX2, 1190,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_qq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_qq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:1990 Instruction:"VPERMB Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:0 0x8D /r"/"RAVM"
{
ND_INS_VPERMB, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI, 1191,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOMZ|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1991 Instruction:"VPERMD Vu{K}{z},aKq,Hu,Wu|B32" Encoding:"evex m:2 p:1 l:x w:0 0x36 /r"/"RAVM"
{
ND_INS_VPERMD, ND_CAT_AVX512, ND_SET_AVX512F, 1192,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_u, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_u, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1992 Instruction:"VPERMD Vqq,Hqq,Wqq" Encoding:"vex m:2 p:1 l:1 w:0 0x36 /r"/"RVM"
{
ND_INS_VPERMD, ND_CAT_AVX2, ND_SET_AVX2, 1192,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_qq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_qq, ND_OPF_R, 0, 0),
},
// Pos:1993 Instruction:"VPERMI2B Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:0 0x75 /r"/"RAVM"
{
ND_INS_VPERMI2B, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI, 1193,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1994 Instruction:"VPERMI2D Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x76 /r"/"RAVM"
{
ND_INS_VPERMI2D, ND_CAT_AVX512, ND_SET_AVX512F, 1194,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1995 Instruction:"VPERMI2PD Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x77 /r"/"RAVM"
{
ND_INS_VPERMI2PD, ND_CAT_AVX512, ND_SET_AVX512F, 1195,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:1996 Instruction:"VPERMI2PS Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x77 /r"/"RAVM"
{
ND_INS_VPERMI2PS, ND_CAT_AVX512, ND_SET_AVX512F, 1196,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:1997 Instruction:"VPERMI2Q Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x76 /r"/"RAVM"
{
ND_INS_VPERMI2Q, ND_CAT_AVX512, ND_SET_AVX512F, 1197,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:1998 Instruction:"VPERMI2W Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:1 0x75 /r"/"RAVM"
{
ND_INS_VPERMI2W, ND_CAT_AVX512, ND_SET_AVX512BW, 1198,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:1999 Instruction:"VPERMILPD Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x0D /r"/"RAVM"
{
ND_INS_VPERMILPD, ND_CAT_AVX512, ND_SET_AVX512F, 1199,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2000 Instruction:"VPERMILPD Vn{K}{z},aKq,Wn|B64,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x05 /r ib"/"RAMI"
{
ND_INS_VPERMILPD, ND_CAT_AVX512, ND_SET_AVX512F, 1199,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2001 Instruction:"VPERMILPD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0x0D /r"/"RVM"
{
ND_INS_VPERMILPD, ND_CAT_AVX, ND_SET_AVX, 1199,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2002 Instruction:"VPERMILPD Vx,Wx,Ib" Encoding:"vex m:3 p:1 l:x w:0 0x05 /r ib"/"RMI"
{
ND_INS_VPERMILPD, ND_CAT_AVX, ND_SET_AVX, 1199,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2003 Instruction:"VPERMILPS Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x0C /r"/"RAVM"
{
ND_INS_VPERMILPS, ND_CAT_AVX512, ND_SET_AVX512F, 1200,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2004 Instruction:"VPERMILPS Vn{K}{z},aKq,Wn|B32,Ib" Encoding:"evex m:3 p:1 l:x w:0 0x04 /r ib"/"RAMI"
{
ND_INS_VPERMILPS, ND_CAT_AVX512, ND_SET_AVX512F, 1200,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2005 Instruction:"VPERMILPS Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0x0C /r"/"RVM"
{
ND_INS_VPERMILPS, ND_CAT_AVX, ND_SET_AVX, 1200,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2006 Instruction:"VPERMILPS Vx,Wx,Ib" Encoding:"vex m:3 p:1 l:x w:0 0x04 /r ib"/"RMI"
{
ND_INS_VPERMILPS, ND_CAT_AVX, ND_SET_AVX, 1200,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2007 Instruction:"VPERMILzz2PD Vx,Hx,Wx,Lx,Ib" Encoding:"vex m:3 p:1 l:x w:0 0x49 /r ib"/"RVMLI"
{
ND_INS_VPERMILzz2PD, ND_CAT_XOP, ND_SET_XOP, 1201,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(5, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2008 Instruction:"VPERMILzz2PD Vx,Hx,Lx,Wx,Ib" Encoding:"vex m:3 p:1 l:x w:1 0x49 /r ib"/"RVLMI"
{
ND_INS_VPERMILzz2PD, ND_CAT_XOP, ND_SET_XOP, 1201,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(5, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2009 Instruction:"VPERMILzz2PS Vx,Hx,Wx,Lx,Ib" Encoding:"vex m:3 p:1 l:x w:0 0x48 /r ib"/"RVMLI"
{
ND_INS_VPERMILzz2PS, ND_CAT_XOP, ND_SET_XOP, 1202,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(5, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2010 Instruction:"VPERMILzz2PS Vx,Hx,Lx,Wx,Ib" Encoding:"vex m:3 p:1 l:x w:1 0x48 /r ib"/"RVLMI"
{
ND_INS_VPERMILzz2PS, ND_CAT_XOP, ND_SET_XOP, 1202,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(5, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2011 Instruction:"VPERMPD Vu{K}{z},aKq,Hu,Wu|B64" Encoding:"evex m:2 p:1 l:1 w:1 0x16 /r"/"RAVM"
{
ND_INS_VPERMPD, ND_CAT_AVX512, ND_SET_AVX512F, 1203,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_u, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_u, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2012 Instruction:"VPERMPD Vu{K}{z},aKq,Hu,Wu|B64" Encoding:"evex m:2 p:1 l:2 w:1 0x16 /r"/"RAVM"
{
ND_INS_VPERMPD, ND_CAT_AVX512, ND_SET_AVX512F, 1203,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_u, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_u, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2013 Instruction:"VPERMPD Vu{K}{z},aKq,Wu|B64,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x01 /r ib"/"RAMI"
{
ND_INS_VPERMPD, ND_CAT_AVX512, ND_SET_AVX512F, 1203,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_u, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2014 Instruction:"VPERMPD Vqq,Wqq,Ib" Encoding:"vex m:3 p:1 l:1 w:1 0x01 /r ib"/"RMI"
{
ND_INS_VPERMPD, ND_CAT_AVX2, ND_SET_AVX2, 1203,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_qq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2015 Instruction:"VPERMPS Vu{K}{z},aKq,Hu,Wu|B32" Encoding:"evex m:2 p:1 l:1 w:0 0x16 /r"/"RAVM"
{
ND_INS_VPERMPS, ND_CAT_AVX512, ND_SET_AVX512F, 1204,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_u, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_u, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2016 Instruction:"VPERMPS Vu{K}{z},aKq,Hu,Wu|B32" Encoding:"evex m:2 p:1 l:2 w:0 0x16 /r"/"RAVM"
{
ND_INS_VPERMPS, ND_CAT_AVX512, ND_SET_AVX512F, 1204,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_u, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_u, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2017 Instruction:"VPERMPS Vqq,Hqq,Wqq" Encoding:"vex m:2 p:1 l:1 w:0 0x16 /r"/"RVM"
{
ND_INS_VPERMPS, ND_CAT_AVX2, ND_SET_AVX2, 1204,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_qq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_qq, ND_OPF_R, 0, 0),
},
// Pos:2018 Instruction:"VPERMQ Vu{K}{z},aKq,Hu,Wu|B64" Encoding:"evex m:2 p:1 l:x w:1 0x36 /r"/"RAVM"
{
ND_INS_VPERMQ, ND_CAT_AVX512, ND_SET_AVX512F, 1205,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_u, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_u, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2019 Instruction:"VPERMQ Vu{K}{z},aKq,Wu|B64,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x00 /r ib"/"RAMI"
{
ND_INS_VPERMQ, ND_CAT_AVX512, ND_SET_AVX512F, 1205,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_u, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2020 Instruction:"VPERMQ Vqq,Wqq,Ib" Encoding:"vex m:3 p:1 l:1 w:1 0x00 /r ib"/"RMI"
{
ND_INS_VPERMQ, ND_CAT_AVX2, ND_SET_AVX2, 1205,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_qq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2021 Instruction:"VPERMT2B Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:0 0x7D /r"/"RAVM"
{
ND_INS_VPERMT2B, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI, 1206,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2022 Instruction:"VPERMT2D Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x7E /r"/"RAVM"
{
ND_INS_VPERMT2D, ND_CAT_AVX512, ND_SET_AVX512F, 1207,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2023 Instruction:"VPERMT2PD Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x7F /r"/"RAVM"
{
ND_INS_VPERMT2PD, ND_CAT_AVX512, ND_SET_AVX512F, 1208,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2024 Instruction:"VPERMT2PS Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x7F /r"/"RAVM"
{
ND_INS_VPERMT2PS, ND_CAT_AVX512, ND_SET_AVX512F, 1209,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2025 Instruction:"VPERMT2Q Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x7E /r"/"RAVM"
{
ND_INS_VPERMT2Q, ND_CAT_AVX512, ND_SET_AVX512F, 1210,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2026 Instruction:"VPERMT2W Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:1 0x7D /r"/"RAVM"
{
ND_INS_VPERMT2W, ND_CAT_AVX512, ND_SET_AVX512BW, 1211,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2027 Instruction:"VPERMW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:1 0x8D /r"/"RAVM"
{
ND_INS_VPERMW, ND_CAT_AVX512, ND_SET_AVX512BW, 1212,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOMZ|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2028 Instruction:"VPEXPANDB Vn{K}{z},aKq,Wn" Encoding:"evex m:2 p:1 l:x w:0 0x62 /r"/"RAM"
{
ND_INS_VPEXPANDB, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI2, 1213,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2029 Instruction:"VPEXPANDD Vn{K}{z},aKq,Wn" Encoding:"evex m:2 p:1 l:x w:0 0x89 /r"/"RAM"
{
ND_INS_VPEXPANDD, ND_CAT_EXPAND, ND_SET_AVX512F, 1214,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2030 Instruction:"VPEXPANDQ Vn{K}{z},aKq,Wn" Encoding:"evex m:2 p:1 l:x w:1 0x89 /r"/"RAM"
{
ND_INS_VPEXPANDQ, ND_CAT_EXPAND, ND_SET_AVX512F, 1215,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2031 Instruction:"VPEXPANDW Vn{K}{z},aKq,Wn" Encoding:"evex m:2 p:1 l:x w:1 0x62 /r"/"RAM"
{
ND_INS_VPEXPANDW, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI2, 1216,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2032 Instruction:"VPEXTRB Mb,Vdq,Ib" Encoding:"evex m:3 p:1 l:0 w:i 0x14 /r:mem ib"/"MRI"
{
ND_INS_VPEXTRB, ND_CAT_AVX512, ND_SET_AVX512BW, 1217,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2033 Instruction:"VPEXTRB Ry,Vdq,Ib" Encoding:"evex m:3 p:1 l:0 w:i 0x14 /r:reg ib"/"MRI"
{
ND_INS_VPEXTRB, ND_CAT_AVX512, ND_SET_AVX512BW, 1217,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2034 Instruction:"VPEXTRB Mb,Vdq,Ib" Encoding:"vex m:3 p:1 l:0 w:0 0x14 /r:mem ib"/"MRI"
{
ND_INS_VPEXTRB, ND_CAT_AVX, ND_SET_AVX, 1217,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_b, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2035 Instruction:"VPEXTRB Ry,Vdq,Ib" Encoding:"vex m:3 p:1 l:0 w:0 0x14 /r:reg ib"/"MRI"
{
ND_INS_VPEXTRB, ND_CAT_AVX, ND_SET_AVX, 1217,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2036 Instruction:"VPEXTRD Ed,Vdq,Ib" Encoding:"evex m:3 p:1 l:0 w:0 0x16 /r ib"/"MRI"
{
ND_INS_VPEXTRD, ND_CAT_AVX512, ND_SET_AVX512DQ, 1218,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2037 Instruction:"VPEXTRD Ey,Vdq,Ib" Encoding:"vex m:3 p:1 l:0 w:0 0x16 /r ib"/"MRI"
{
ND_INS_VPEXTRD, ND_CAT_AVX, ND_SET_AVX, 1218,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2038 Instruction:"VPEXTRQ Eq,Vdq,Ib" Encoding:"evex m:3 p:1 l:0 w:1 0x16 /r ib"/"MRI"
{
ND_INS_VPEXTRQ, ND_CAT_AVX512, ND_SET_AVX512DQ, 1219,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2039 Instruction:"VPEXTRQ Ey,Vdq,Ib" Encoding:"vex m:3 p:1 l:0 w:1 0x16 /r ib"/"MRI"
{
ND_INS_VPEXTRQ, ND_CAT_AVX, ND_SET_AVX, 1219,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2040 Instruction:"VPEXTRW Gy,Udq,Ib" Encoding:"evex m:1 p:1 l:0 w:i 0xC5 /r:reg ib"/"RMI"
{
ND_INS_VPEXTRW, ND_CAT_AVX512, ND_SET_AVX512BW, 1220,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2041 Instruction:"VPEXTRW Mw,Vdq,Ib" Encoding:"evex m:3 p:1 l:0 w:i 0x15 /r:mem ib"/"MRI"
{
ND_INS_VPEXTRW, ND_CAT_AVX512, ND_SET_AVX512BW, 1220,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2042 Instruction:"VPEXTRW Ry,Vdq,Ib" Encoding:"evex m:3 p:1 l:0 w:i 0x15 /r:reg ib"/"MRI"
{
ND_INS_VPEXTRW, ND_CAT_AVX512, ND_SET_AVX512BW, 1220,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2043 Instruction:"VPEXTRW Gy,Udq,Ib" Encoding:"vex m:1 p:1 l:0 w:0 0xC5 /r:reg ib"/"RMI"
{
ND_INS_VPEXTRW, ND_CAT_AVX, ND_SET_AVX, 1220,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2044 Instruction:"VPEXTRW Mw,Vdq,Ib" Encoding:"vex m:3 p:1 l:0 w:0 0x15 /r:mem ib"/"MRI"
{
ND_INS_VPEXTRW, ND_CAT_AVX, ND_SET_AVX, 1220,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_w, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2045 Instruction:"VPEXTRW Ry,Vdq,Ib" Encoding:"vex m:3 p:1 l:0 w:0 0x15 /r:reg ib"/"MRI"
{
ND_INS_VPEXTRW, ND_CAT_AVX, ND_SET_AVX, 1220,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2046 Instruction:"VPGATHERDD Vn{K},aKq,Mvm32n" Encoding:"evex m:2 p:1 l:x w:0 0x90 /r:mem vsib"/"RAM"
{
ND_INS_VPGATHERDD, ND_CAT_GATHER, ND_SET_AVX512F, 1221,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E12, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_vm32n, ND_OPF_RW, 0, 0),
},
// Pos:2047 Instruction:"VPGATHERDD Vx,Mvm32n,Hx" Encoding:"vex m:2 p:1 l:x w:0 0x90 /r:mem vsib"/"RMV"
{
ND_INS_VPGATHERDD, ND_CAT_AVX2GATHER, ND_SET_AVX2GATHER, 1221,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_12, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, 0,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_CRW, 0, 0),
OP(ND_OPT_M, ND_OPS_vm32n, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_RW, 0, 0),
},
// Pos:2048 Instruction:"VPGATHERDQ Vn{K},aKq,Mvm32h" Encoding:"evex m:2 p:1 l:x w:1 0x90 /r:mem vsib"/"RAM"
{
ND_INS_VPGATHERDQ, ND_CAT_GATHER, ND_SET_AVX512F, 1222,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E12, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_vm32h, ND_OPF_RW, 0, 0),
},
// Pos:2049 Instruction:"VPGATHERDQ Vx,Mvm32h,Hx" Encoding:"vex m:2 p:1 l:x w:1 0x90 /r:mem vsib"/"RMV"
{
ND_INS_VPGATHERDQ, ND_CAT_AVX2GATHER, ND_SET_AVX2GATHER, 1222,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_12, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, 0,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_CRW, 0, 0),
OP(ND_OPT_M, ND_OPS_vm32h, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_RW, 0, 0),
},
// Pos:2050 Instruction:"VPGATHERQD Vh{K},aKq,Mvm64n" Encoding:"evex m:2 p:1 l:x w:0 0x91 /r:mem vsib"/"RAM"
{
ND_INS_VPGATHERQD, ND_CAT_GATHER, ND_SET_AVX512F, 1223,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E12, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_h, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_RW, 0, 0),
},
// Pos:2051 Instruction:"VPGATHERQD Vdq,Mvm64n,Hdq" Encoding:"vex m:2 p:1 l:x w:0 0x91 /r:mem vsib"/"RMV"
{
ND_INS_VPGATHERQD, ND_CAT_AVX2GATHER, ND_SET_AVX2GATHER, 1223,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_12, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, 0,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_CRW, 0, 0),
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_RW, 0, 0),
},
// Pos:2052 Instruction:"VPGATHERQQ Vn{K},aKq,Mvm64n" Encoding:"evex m:2 p:1 l:x w:1 0x91 /r:mem vsib"/"RAM"
{
ND_INS_VPGATHERQQ, ND_CAT_GATHER, ND_SET_AVX512F, 1224,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E12, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_RW, 0, 0),
},
// Pos:2053 Instruction:"VPGATHERQQ Vx,Mvm64n,Hx" Encoding:"vex m:2 p:1 l:x w:1 0x91 /r:mem vsib"/"RMV"
{
ND_INS_VPGATHERQQ, ND_CAT_AVX2GATHER, ND_SET_AVX2GATHER, 1224,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_12, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, 0,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_CRW, 0, 0),
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_RW, 0, 0),
},
// Pos:2054 Instruction:"VPHADDBD Vdq,Wdq" Encoding:"xop m:9 0xC2 /r"/"RM"
{
ND_INS_VPHADDBD, ND_CAT_XOP, ND_SET_XOP, 1225,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2055 Instruction:"VPHADDBQ Vdq,Wdq" Encoding:"xop m:9 0xC3 /r"/"RM"
{
ND_INS_VPHADDBQ, ND_CAT_XOP, ND_SET_XOP, 1226,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2056 Instruction:"VPHADDBW Vdq,Wdq" Encoding:"xop m:9 0xC1 /r"/"RM"
{
ND_INS_VPHADDBW, ND_CAT_XOP, ND_SET_XOP, 1227,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2057 Instruction:"VPHADDD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x02 /r"/"RVM"
{
ND_INS_VPHADDD, ND_CAT_AVX, ND_SET_AVX, 1228,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2058 Instruction:"VPHADDDQ Vdq,Wdq" Encoding:"xop m:9 0xCB /r"/"RM"
{
ND_INS_VPHADDDQ, ND_CAT_XOP, ND_SET_XOP, 1229,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2059 Instruction:"VPHADDSW Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x03 /r"/"RVM"
{
ND_INS_VPHADDSW, ND_CAT_AVX, ND_SET_AVX, 1230,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2060 Instruction:"VPHADDUBD Vdq,Wdq" Encoding:"xop m:9 0xD2 /r"/"RM"
{
ND_INS_VPHADDUBD, ND_CAT_XOP, ND_SET_XOP, 1231,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2061 Instruction:"VPHADDUBQ Vdq,Wdq" Encoding:"xop m:9 0xD3 /r"/"RM"
{
ND_INS_VPHADDUBQ, ND_CAT_XOP, ND_SET_XOP, 1232,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2062 Instruction:"VPHADDUBW Vdq,Wdq" Encoding:"xop m:9 0xD1 /r"/"RM"
{
ND_INS_VPHADDUBW, ND_CAT_XOP, ND_SET_XOP, 1233,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2063 Instruction:"VPHADDUDQ Vdq,Wdq" Encoding:"xop m:9 0xDB /r"/"RM"
{
ND_INS_VPHADDUDQ, ND_CAT_XOP, ND_SET_XOP, 1234,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2064 Instruction:"VPHADDUWD Vdq,Wdq" Encoding:"xop m:9 0xD6 /r"/"RM"
{
ND_INS_VPHADDUWD, ND_CAT_XOP, ND_SET_XOP, 1235,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2065 Instruction:"VPHADDUWQ Vdq,Wdq" Encoding:"xop m:9 0xD7 /r"/"RM"
{
ND_INS_VPHADDUWQ, ND_CAT_XOP, ND_SET_XOP, 1236,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2066 Instruction:"VPHADDW Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x01 /r"/"RVM"
{
ND_INS_VPHADDW, ND_CAT_AVX, ND_SET_AVX, 1237,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2067 Instruction:"VPHADDWD Vdq,Wdq" Encoding:"xop m:9 0xC6 /r"/"RM"
{
ND_INS_VPHADDWD, ND_CAT_XOP, ND_SET_XOP, 1238,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2068 Instruction:"VPHADDWQ Vdq,Wdq" Encoding:"xop m:9 0xC7 /r"/"RM"
{
ND_INS_VPHADDWQ, ND_CAT_XOP, ND_SET_XOP, 1239,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2069 Instruction:"VPHMINPOSUW Vdq,Wdq" Encoding:"vex m:2 p:1 l:0 w:i 0x41 /r"/"RM"
{
ND_INS_VPHMINPOSUW, ND_CAT_AVX, ND_SET_AVX, 1240,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2070 Instruction:"VPHSUBBW Vdq,Wdq" Encoding:"xop m:9 0xE1 /r"/"RM"
{
ND_INS_VPHSUBBW, ND_CAT_XOP, ND_SET_XOP, 1241,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2071 Instruction:"VPHSUBD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x06 /r"/"RVM"
{
ND_INS_VPHSUBD, ND_CAT_AVX, ND_SET_AVX, 1242,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2072 Instruction:"VPHSUBDQ Vdq,Wdq" Encoding:"xop m:9 0xE3 /r"/"RM"
{
ND_INS_VPHSUBDQ, ND_CAT_XOP, ND_SET_XOP, 1243,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2073 Instruction:"VPHSUBSW Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x07 /r"/"RVM"
{
ND_INS_VPHSUBSW, ND_CAT_AVX, ND_SET_AVX, 1244,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2074 Instruction:"VPHSUBW Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x05 /r"/"RVM"
{
ND_INS_VPHSUBW, ND_CAT_AVX, ND_SET_AVX, 1245,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2075 Instruction:"VPHSUBWD Vdq,Wdq" Encoding:"xop m:9 0xE2 /r"/"RM"
{
ND_INS_VPHSUBWD, ND_CAT_XOP, ND_SET_XOP, 1246,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2076 Instruction:"VPINSRB Vdq,Hdq,Mb,Ib" Encoding:"evex m:3 p:1 l:0 w:i 0x20 /r:mem ib"/"RVMI"
{
ND_INS_VPINSRB, ND_CAT_AVX512, ND_SET_AVX512BW, 1247,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2077 Instruction:"VPINSRB Vdq,Hdq,Rd,Ib" Encoding:"evex m:3 p:1 l:0 w:i 0x20 /r:reg ib"/"RVMI"
{
ND_INS_VPINSRB, ND_CAT_AVX512, ND_SET_AVX512BW, 1247,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_R, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2078 Instruction:"VPINSRB Vdq,Hdq,Mb,Ib" Encoding:"vex m:3 p:1 l:0 w:i 0x20 /r:mem ib"/"RVMI"
{
ND_INS_VPINSRB, ND_CAT_AVX, ND_SET_AVX, 1247,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2079 Instruction:"VPINSRB Vdq,Hdq,Rd,Ib" Encoding:"vex m:3 p:1 l:0 w:i 0x20 /r:reg ib"/"RVMI"
{
ND_INS_VPINSRB, ND_CAT_AVX, ND_SET_AVX, 1247,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_R, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2080 Instruction:"VPINSRD Vdq,Hdq,Ed,Ib" Encoding:"evex m:3 p:1 l:0 w:0 0x22 /r ib"/"RVMI"
{
ND_INS_VPINSRD, ND_CAT_AVX512, ND_SET_AVX512DQ, 1248,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_d, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2081 Instruction:"VPINSRD Vdq,Hdq,Ey,Ib" Encoding:"vex m:3 p:1 l:0 w:0 0x22 /r ib"/"RVMI"
{
ND_INS_VPINSRD, ND_CAT_AVX, ND_SET_AVX, 1248,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2082 Instruction:"VPINSRQ Vdq,Hdq,Eq,Ib" Encoding:"evex m:3 p:1 l:0 w:1 0x22 /r ib"/"RVMI"
{
ND_INS_VPINSRQ, ND_CAT_AVX512, ND_SET_AVX512DQ, 1249,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2083 Instruction:"VPINSRQ Vdq,Hdq,Ey,Ib" Encoding:"vex m:3 p:1 l:0 w:1 0x22 /r ib"/"RVMI"
{
ND_INS_VPINSRQ, ND_CAT_AVX, ND_SET_AVX, 1249,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_E, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2084 Instruction:"VPINSRW Vdq,Hdq,Mw,Ib" Encoding:"evex m:1 p:1 l:0 w:i 0xC4 /r:mem ib"/"RVMI"
{
ND_INS_VPINSRW, ND_CAT_AVX512, ND_SET_AVX512BW, 1250,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2085 Instruction:"VPINSRW Vdq,Hdq,Rv,Ib" Encoding:"evex m:1 p:1 l:0 w:i 0xC4 /r:reg ib"/"RVMI"
{
ND_INS_VPINSRW, ND_CAT_AVX512, ND_SET_AVX512BW, 1250,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E9NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_R, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2086 Instruction:"VPINSRW Vdq,Hdq,Mw,Ib" Encoding:"vex m:1 p:1 l:0 w:0 0xC4 /r:mem ib"/"RVMI"
{
ND_INS_VPINSRW, ND_CAT_AVX, ND_SET_AVX, 1250,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_w, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2087 Instruction:"VPINSRW Vdq,Hdq,Ry,Ib" Encoding:"vex m:1 p:1 l:0 w:0 0xC4 /r:reg ib"/"RVMI"
{
ND_INS_VPINSRW, ND_CAT_AVX, ND_SET_AVX, 1250,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_R, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2088 Instruction:"VPLZCNTD Vn{K}{z},aKq,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x44 /r"/"RAM"
{
ND_INS_VPLZCNTD, ND_CAT_CONFLICT, ND_SET_AVX512CD, 1251,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512CD,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2089 Instruction:"VPLZCNTQ Vn{K}{z},aKq,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x44 /r"/"RAM"
{
ND_INS_VPLZCNTQ, ND_CAT_CONFLICT, ND_SET_AVX512CD, 1252,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512CD,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2090 Instruction:"VPMACSDD Vdq,Hdq,Wdq,Ldq" Encoding:"xop m:8 0x9E /r is4"/"RVML"
{
ND_INS_VPMACSDD, ND_CAT_XOP, ND_SET_XOP, 1253,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2091 Instruction:"VPMACSDQH Vdq,Hdq,Wdq,Ldq" Encoding:"xop m:8 0x9F /r is4"/"RVML"
{
ND_INS_VPMACSDQH, ND_CAT_XOP, ND_SET_XOP, 1254,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2092 Instruction:"VPMACSDQL Vdq,Hdq,Wdq,Ldq" Encoding:"xop m:8 0x97 /r is4"/"RVML"
{
ND_INS_VPMACSDQL, ND_CAT_XOP, ND_SET_XOP, 1255,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2093 Instruction:"VPMACSSDD Vdq,Hdq,Wdq,Ldq" Encoding:"xop m:8 0x8E /r is4"/"RVML"
{
ND_INS_VPMACSSDD, ND_CAT_XOP, ND_SET_XOP, 1256,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2094 Instruction:"VPMACSSDQH Vdq,Hdq,Wdq,Ldq" Encoding:"xop m:8 0x8F /r is4"/"RVML"
{
ND_INS_VPMACSSDQH, ND_CAT_XOP, ND_SET_XOP, 1257,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2095 Instruction:"VPMACSSDQL Vdq,Hdq,Wdq,Ldq" Encoding:"xop m:8 0x87 /r is4"/"RVML"
{
ND_INS_VPMACSSDQL, ND_CAT_XOP, ND_SET_XOP, 1258,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2096 Instruction:"VPMACSSWD Vdq,Hdq,Wdq,Ldq" Encoding:"xop m:8 0x86 /r is4"/"RVML"
{
ND_INS_VPMACSSWD, ND_CAT_XOP, ND_SET_XOP, 1259,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2097 Instruction:"VPMACSSWW Vdq,Hdq,Wdq,Ldq" Encoding:"xop m:8 0x85 /r is4"/"RVML"
{
ND_INS_VPMACSSWW, ND_CAT_XOP, ND_SET_XOP, 1260,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2098 Instruction:"VPMACSWD Vdq,Hdq,Wdq,Ldq" Encoding:"xop m:8 0x96 /r is4"/"RVML"
{
ND_INS_VPMACSWD, ND_CAT_XOP, ND_SET_XOP, 1261,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2099 Instruction:"VPMACSWW Vdq,Hdq,Wdq,Ldq" Encoding:"xop m:8 0x95 /r is4"/"RVML"
{
ND_INS_VPMACSWW, ND_CAT_XOP, ND_SET_XOP, 1262,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2100 Instruction:"VPMADCSSWD Vdq,Hdq,Wdq,Ldq" Encoding:"xop m:8 0xA6 /r is4"/"RVML"
{
ND_INS_VPMADCSSWD, ND_CAT_XOP, ND_SET_XOP, 1263,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2101 Instruction:"VPMADCSWD Vdq,Hdq,Wdq,Ldq" Encoding:"xop m:8 0xB6 /r is4"/"RVML"
{
ND_INS_VPMADCSWD, ND_CAT_XOP, ND_SET_XOP, 1264,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2102 Instruction:"VPMADD52HUQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0xB5 /r"/"RAVM"
{
ND_INS_VPMADD52HUQ, ND_CAT_IFMA, ND_SET_AVX512IFMA, 1265,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512IFMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2103 Instruction:"VPMADD52LUQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0xB4 /r"/"RAVM"
{
ND_INS_VPMADD52LUQ, ND_CAT_IFMA, ND_SET_AVX512IFMA, 1266,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512IFMA,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2104 Instruction:"VPMADDUBSW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:i 0x04 /r"/"RAVM"
{
ND_INS_VPMADDUBSW, ND_CAT_AVX512, ND_SET_AVX512BW, 1267,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2105 Instruction:"VPMADDUBSW Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x04 /r"/"RVM"
{
ND_INS_VPMADDUBSW, ND_CAT_AVX, ND_SET_AVX, 1267,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2106 Instruction:"VPMADDWD Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xF5 /r"/"RAVM"
{
ND_INS_VPMADDWD, ND_CAT_AVX512, ND_SET_AVX512BW, 1268,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2107 Instruction:"VPMADDWD Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xF5 /r"/"RVM"
{
ND_INS_VPMADDWD, ND_CAT_AVX, ND_SET_AVX, 1268,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2108 Instruction:"VPMASKMOVD Vx,Hx,Mx" Encoding:"vex m:2 p:1 l:x w:0 0x8C /r:mem"/"RVM"
{
ND_INS_VPMASKMOVD, ND_CAT_AVX2, ND_SET_AVX2, 1269,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2109 Instruction:"VPMASKMOVD Mx,Hx,Vx" Encoding:"vex m:2 p:1 l:x w:0 0x8E /r:mem"/"MVR"
{
ND_INS_VPMASKMOVD, ND_CAT_AVX2, ND_SET_AVX2, 1269,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2110 Instruction:"VPMASKMOVQ Vx,Hx,Mx" Encoding:"vex m:2 p:1 l:x w:1 0x8C /r:mem"/"RVM"
{
ND_INS_VPMASKMOVQ, ND_CAT_AVX2, ND_SET_AVX2, 1270,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_M, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2111 Instruction:"VPMASKMOVQ Mx,Hx,Vx" Encoding:"vex m:2 p:1 l:x w:1 0x8E /r:mem"/"MVR"
{
ND_INS_VPMASKMOVQ, ND_CAT_AVX2, ND_SET_AVX2, 1270,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_6, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2112 Instruction:"VPMAXSB Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:i 0x3C /r"/"RAVM"
{
ND_INS_VPMAXSB, ND_CAT_AVX512, ND_SET_AVX512BW, 1271,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2113 Instruction:"VPMAXSB Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x3C /r"/"RVM"
{
ND_INS_VPMAXSB, ND_CAT_AVX, ND_SET_AVX, 1271,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2114 Instruction:"VPMAXSD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x3D /r"/"RAVM"
{
ND_INS_VPMAXSD, ND_CAT_AVX512, ND_SET_AVX512F, 1272,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2115 Instruction:"VPMAXSD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x3D /r"/"RVM"
{
ND_INS_VPMAXSD, ND_CAT_AVX, ND_SET_AVX, 1272,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2116 Instruction:"VPMAXSQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x3D /r"/"RAVM"
{
ND_INS_VPMAXSQ, ND_CAT_AVX512, ND_SET_AVX512F, 1273,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2117 Instruction:"VPMAXSW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xEE /r"/"RAVM"
{
ND_INS_VPMAXSW, ND_CAT_AVX512, ND_SET_AVX512BW, 1274,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2118 Instruction:"VPMAXSW Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xEE /r"/"RVM"
{
ND_INS_VPMAXSW, ND_CAT_AVX, ND_SET_AVX, 1274,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2119 Instruction:"VPMAXUB Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xDE /r"/"RAVM"
{
ND_INS_VPMAXUB, ND_CAT_AVX512, ND_SET_AVX512BW, 1275,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2120 Instruction:"VPMAXUB Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xDE /r"/"RVM"
{
ND_INS_VPMAXUB, ND_CAT_AVX, ND_SET_AVX, 1275,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2121 Instruction:"VPMAXUD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x3F /r"/"RAVM"
{
ND_INS_VPMAXUD, ND_CAT_AVX512, ND_SET_AVX512F, 1276,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2122 Instruction:"VPMAXUD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x3F /r"/"RVM"
{
ND_INS_VPMAXUD, ND_CAT_AVX, ND_SET_AVX, 1276,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2123 Instruction:"VPMAXUQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x3F /r"/"RAVM"
{
ND_INS_VPMAXUQ, ND_CAT_AVX512, ND_SET_AVX512F, 1277,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2124 Instruction:"VPMAXUW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:i 0x3E /r"/"RAVM"
{
ND_INS_VPMAXUW, ND_CAT_AVX512, ND_SET_AVX512BW, 1278,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2125 Instruction:"VPMAXUW Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x3E /r"/"RVM"
{
ND_INS_VPMAXUW, ND_CAT_AVX, ND_SET_AVX, 1278,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2126 Instruction:"VPMINSB Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:i 0x38 /r"/"RAVM"
{
ND_INS_VPMINSB, ND_CAT_AVX512, ND_SET_AVX512BW, 1279,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2127 Instruction:"VPMINSB Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x38 /r"/"RVM"
{
ND_INS_VPMINSB, ND_CAT_AVX, ND_SET_AVX, 1279,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2128 Instruction:"VPMINSD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x39 /r"/"RAVM"
{
ND_INS_VPMINSD, ND_CAT_AVX512, ND_SET_AVX512F, 1280,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2129 Instruction:"VPMINSD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x39 /r"/"RVM"
{
ND_INS_VPMINSD, ND_CAT_AVX, ND_SET_AVX, 1280,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2130 Instruction:"VPMINSQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x39 /r"/"RAVM"
{
ND_INS_VPMINSQ, ND_CAT_AVX512, ND_SET_AVX512F, 1281,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2131 Instruction:"VPMINSW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xEA /r"/"RAVM"
{
ND_INS_VPMINSW, ND_CAT_AVX512, ND_SET_AVX512BW, 1282,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2132 Instruction:"VPMINSW Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xEA /r"/"RVM"
{
ND_INS_VPMINSW, ND_CAT_AVX, ND_SET_AVX, 1282,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2133 Instruction:"VPMINUB Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xDA /r"/"RAVM"
{
ND_INS_VPMINUB, ND_CAT_AVX512, ND_SET_AVX512BW, 1283,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2134 Instruction:"VPMINUB Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xDA /r"/"RVM"
{
ND_INS_VPMINUB, ND_CAT_AVX, ND_SET_AVX, 1283,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2135 Instruction:"VPMINUD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x3B /r"/"RAVM"
{
ND_INS_VPMINUD, ND_CAT_AVX512, ND_SET_AVX512F, 1284,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2136 Instruction:"VPMINUD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x3B /r"/"RVM"
{
ND_INS_VPMINUD, ND_CAT_AVX, ND_SET_AVX, 1284,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2137 Instruction:"VPMINUQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x3B /r"/"RAVM"
{
ND_INS_VPMINUQ, ND_CAT_AVX512, ND_SET_AVX512F, 1285,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2138 Instruction:"VPMINUW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:i 0x3A /r"/"RAVM"
{
ND_INS_VPMINUW, ND_CAT_AVX512, ND_SET_AVX512BW, 1286,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2139 Instruction:"VPMINUW Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x3A /r"/"RVM"
{
ND_INS_VPMINUW, ND_CAT_AVX, ND_SET_AVX, 1286,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2140 Instruction:"VPMOVB2M rKq,Un" Encoding:"evex m:2 p:2 l:x w:0 0x29 /r:reg"/"RM"
{
ND_INS_VPMOVB2M, ND_CAT_DATAXFER, ND_SET_AVX512BW, 1287,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_E7NM, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2141 Instruction:"VPMOVD2M rKq,Un" Encoding:"evex m:2 p:2 l:x w:0 0x39 /r:reg"/"RM"
{
ND_INS_VPMOVD2M, ND_CAT_DATAXFER, ND_SET_AVX512DQ, 1288,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_E7NM, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2142 Instruction:"VPMOVDB Wf{K}{z},aKq,Vn" Encoding:"evex m:2 p:2 l:x w:0 0x31 /r"/"MAR"
{
ND_INS_VPMOVDB, ND_CAT_DATAXFER, ND_SET_AVX512F, 1289,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_QVM, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_f, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2143 Instruction:"VPMOVDW Wh{K}{z},aKq,Vn" Encoding:"evex m:2 p:2 l:x w:0 0x33 /r"/"MAR"
{
ND_INS_VPMOVDW, ND_CAT_DATAXFER, ND_SET_AVX512F, 1290,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_HVM, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_h, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2144 Instruction:"VPMOVM2B Vn,mKq" Encoding:"evex m:2 p:2 l:x w:0 0x28 /r:reg"/"RM"
{
ND_INS_VPMOVM2B, ND_CAT_DATAXFER, ND_SET_AVX512BW, 1291,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_E7NM, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2145 Instruction:"VPMOVM2D Vn,mKq" Encoding:"evex m:2 p:2 l:x w:0 0x38 /r:reg"/"RM"
{
ND_INS_VPMOVM2D, ND_CAT_DATAXFER, ND_SET_AVX512DQ, 1292,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_E7NM, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2146 Instruction:"VPMOVM2Q Vn,mKq" Encoding:"evex m:2 p:2 l:x w:1 0x38 /r:reg"/"RM"
{
ND_INS_VPMOVM2Q, ND_CAT_DATAXFER, ND_SET_AVX512DQ, 1293,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_E7NM, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2147 Instruction:"VPMOVM2W Vn,mKq" Encoding:"evex m:2 p:2 l:x w:1 0x28 /r:reg"/"RM"
{
ND_INS_VPMOVM2W, ND_CAT_DATAXFER, ND_SET_AVX512BW, 1294,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_E7NM, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, 0, 0),
OP(ND_OPT_mK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2148 Instruction:"VPMOVMSKB Gy,Ux" Encoding:"vex m:1 p:1 l:x w:i 0xD7 /r:reg"/"RM"
{
ND_INS_VPMOVMSKB, ND_CAT_DATAXFER, ND_SET_AVX, 1295,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_G, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2149 Instruction:"VPMOVQ2M rKq,Un" Encoding:"evex m:2 p:2 l:x w:1 0x39 /r:reg"/"RM"
{
ND_INS_VPMOVQ2M, ND_CAT_DATAXFER, ND_SET_AVX512DQ, 1296,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_E7NM, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2150 Instruction:"VPMOVQB We{K}{z},aKq,Vn" Encoding:"evex m:2 p:2 l:x w:0 0x32 /r"/"MAR"
{
ND_INS_VPMOVQB, ND_CAT_DATAXFER, ND_SET_AVX512F, 1297,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_OVM, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_e, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2151 Instruction:"VPMOVQD Wh{K}{z},aKq,Vn" Encoding:"evex m:2 p:2 l:x w:0 0x35 /r"/"MAR"
{
ND_INS_VPMOVQD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1298,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_HVM, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_h, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2152 Instruction:"VPMOVQW Wf{K}{z},aKq,Vn" Encoding:"evex m:2 p:2 l:x w:0 0x34 /r"/"MAR"
{
ND_INS_VPMOVQW, ND_CAT_DATAXFER, ND_SET_AVX512F, 1299,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_QVM, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_f, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2153 Instruction:"VPMOVSDB Wf{K}{z},aKq,Vn" Encoding:"evex m:2 p:2 l:x w:0 0x21 /r"/"MAR"
{
ND_INS_VPMOVSDB, ND_CAT_DATAXFER, ND_SET_AVX512F, 1300,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_QVM, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_f, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2154 Instruction:"VPMOVSDW Wh{K}{z},aKq,Vn" Encoding:"evex m:2 p:2 l:x w:0 0x23 /r"/"MAR"
{
ND_INS_VPMOVSDW, ND_CAT_DATAXFER, ND_SET_AVX512F, 1301,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_HVM, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_h, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2155 Instruction:"VPMOVSQB We{K}{z},aKq,Vn" Encoding:"evex m:2 p:2 l:x w:0 0x22 /r"/"MAR"
{
ND_INS_VPMOVSQB, ND_CAT_DATAXFER, ND_SET_AVX512F, 1302,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_OVM, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_e, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2156 Instruction:"VPMOVSQD Wh{K}{z},aKq,Vn" Encoding:"evex m:2 p:2 l:x w:0 0x25 /r"/"MAR"
{
ND_INS_VPMOVSQD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1303,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_HVM, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_h, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2157 Instruction:"VPMOVSQW Wf{K}{z},aKq,Vn" Encoding:"evex m:2 p:2 l:x w:0 0x24 /r"/"MAR"
{
ND_INS_VPMOVSQW, ND_CAT_DATAXFER, ND_SET_AVX512F, 1304,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_QVM, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_f, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2158 Instruction:"VPMOVSWB Wh{K}{z},aKq,Vn" Encoding:"evex m:2 p:2 l:x w:0 0x20 /r"/"MAR"
{
ND_INS_VPMOVSWB, ND_CAT_DATAXFER, ND_SET_AVX512BW, 1305,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_HVM, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_h, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2159 Instruction:"VPMOVSXBD Vn{K}{z},aKq,Wf" Encoding:"evex m:2 p:1 l:x w:i 0x21 /r"/"RAM"
{
ND_INS_VPMOVSXBD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1306,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_QVM, ND_EXT_E5, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_f, ND_OPF_R, 0, 0),
},
// Pos:2160 Instruction:"VPMOVSXBD Vdq,Wd" Encoding:"vex m:2 p:1 l:0 w:i 0x21 /r"/"RM"
{
ND_INS_VPMOVSXBD, ND_CAT_AVX, ND_SET_AVX, 1306,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:2161 Instruction:"VPMOVSXBD Vqq,Wq" Encoding:"vex m:2 p:1 l:1 w:i 0x21 /r"/"RM"
{
ND_INS_VPMOVSXBD, ND_CAT_AVX2, ND_SET_AVX2, 1306,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2162 Instruction:"VPMOVSXBQ Vn{K}{z},aKq,We" Encoding:"evex m:2 p:1 l:x w:i 0x22 /r"/"RAM"
{
ND_INS_VPMOVSXBQ, ND_CAT_DATAXFER, ND_SET_AVX512F, 1307,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_OVM, ND_EXT_E5, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_e, ND_OPF_R, 0, 0),
},
// Pos:2163 Instruction:"VPMOVSXBQ Vdq,Ww" Encoding:"vex m:2 p:1 l:0 w:i 0x22 /r"/"RM"
{
ND_INS_VPMOVSXBQ, ND_CAT_AVX, ND_SET_AVX, 1307,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:2164 Instruction:"VPMOVSXBQ Vqq,Wd" Encoding:"vex m:2 p:1 l:1 w:i 0x22 /r"/"RM"
{
ND_INS_VPMOVSXBQ, ND_CAT_AVX2, ND_SET_AVX2, 1307,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:2165 Instruction:"VPMOVSXBW Vn{K}{z},aKq,Wh" Encoding:"evex m:2 p:1 l:x w:i 0x20 /r"/"RAM"
{
ND_INS_VPMOVSXBW, ND_CAT_DATAXFER, ND_SET_AVX512BW, 1308,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_HVM, ND_EXT_E5, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_h, ND_OPF_R, 0, 0),
},
// Pos:2166 Instruction:"VPMOVSXBW Vdq,Wq" Encoding:"vex m:2 p:1 l:0 w:i 0x20 /r"/"RM"
{
ND_INS_VPMOVSXBW, ND_CAT_AVX, ND_SET_AVX, 1308,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2167 Instruction:"VPMOVSXBW Vqq,Wdq" Encoding:"vex m:2 p:1 l:1 w:i 0x20 /r"/"RM"
{
ND_INS_VPMOVSXBW, ND_CAT_AVX2, ND_SET_AVX2, 1308,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2168 Instruction:"VPMOVSXDQ Vn{K}{z},aKq,Wh" Encoding:"evex m:2 p:1 l:x w:0 0x25 /r"/"RAM"
{
ND_INS_VPMOVSXDQ, ND_CAT_DATAXFER, ND_SET_AVX512F, 1309,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_HVM, ND_EXT_E5, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_h, ND_OPF_R, 0, 0),
},
// Pos:2169 Instruction:"VPMOVSXDQ Vdq,Wq" Encoding:"vex m:2 p:1 l:0 w:i 0x25 /r"/"RM"
{
ND_INS_VPMOVSXDQ, ND_CAT_AVX, ND_SET_AVX, 1309,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2170 Instruction:"VPMOVSXDQ Vqq,Wdq" Encoding:"vex m:2 p:1 l:1 w:i 0x25 /r"/"RM"
{
ND_INS_VPMOVSXDQ, ND_CAT_AVX2, ND_SET_AVX2, 1309,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2171 Instruction:"VPMOVSXWD Vn{K}{z},aKq,Wh" Encoding:"evex m:2 p:1 l:x w:i 0x23 /r"/"RAM"
{
ND_INS_VPMOVSXWD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1310,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_HVM, ND_EXT_E5, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_h, ND_OPF_R, 0, 0),
},
// Pos:2172 Instruction:"VPMOVSXWD Vdq,Wq" Encoding:"vex m:2 p:1 l:0 w:i 0x23 /r"/"RM"
{
ND_INS_VPMOVSXWD, ND_CAT_AVX, ND_SET_AVX, 1310,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2173 Instruction:"VPMOVSXWD Vqq,Wdq" Encoding:"vex m:2 p:1 l:1 w:i 0x23 /r"/"RM"
{
ND_INS_VPMOVSXWD, ND_CAT_AVX2, ND_SET_AVX2, 1310,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2174 Instruction:"VPMOVSXWQ Vn{K}{z},aKq,Wf" Encoding:"evex m:2 p:1 l:x w:i 0x24 /r"/"RAM"
{
ND_INS_VPMOVSXWQ, ND_CAT_DATAXFER, ND_SET_AVX512F, 1311,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_QVM, ND_EXT_E5, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_f, ND_OPF_R, 0, 0),
},
// Pos:2175 Instruction:"VPMOVSXWQ Vdq,Wd" Encoding:"vex m:2 p:1 l:0 w:i 0x24 /r"/"RM"
{
ND_INS_VPMOVSXWQ, ND_CAT_AVX, ND_SET_AVX, 1311,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:2176 Instruction:"VPMOVSXWQ Vqq,Wq" Encoding:"vex m:2 p:1 l:1 w:i 0x24 /r"/"RM"
{
ND_INS_VPMOVSXWQ, ND_CAT_AVX2, ND_SET_AVX2, 1311,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2177 Instruction:"VPMOVUSDB Wf{K}{z},aKq,Vn" Encoding:"evex m:2 p:2 l:x w:0 0x11 /r"/"MAR"
{
ND_INS_VPMOVUSDB, ND_CAT_DATAXFER, ND_SET_AVX512F, 1312,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_QVM, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_f, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2178 Instruction:"VPMOVUSDW Wh{K}{z},aKq,Vn" Encoding:"evex m:2 p:2 l:x w:0 0x13 /r"/"MAR"
{
ND_INS_VPMOVUSDW, ND_CAT_DATAXFER, ND_SET_AVX512F, 1313,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_HVM, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_h, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2179 Instruction:"VPMOVUSQB We{K}{z},aKq,Vn" Encoding:"evex m:2 p:2 l:x w:0 0x12 /r"/"MAR"
{
ND_INS_VPMOVUSQB, ND_CAT_DATAXFER, ND_SET_AVX512F, 1314,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_OVM, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_e, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2180 Instruction:"VPMOVUSQD Wh{K}{z},aKq,Vn" Encoding:"evex m:2 p:2 l:x w:0 0x15 /r"/"MAR"
{
ND_INS_VPMOVUSQD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1315,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_HVM, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_h, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2181 Instruction:"VPMOVUSQW Wf{K}{z},aKq,Vn" Encoding:"evex m:2 p:2 l:x w:0 0x14 /r"/"MAR"
{
ND_INS_VPMOVUSQW, ND_CAT_DATAXFER, ND_SET_AVX512F, 1316,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_QVM, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_f, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2182 Instruction:"VPMOVUSWB Wh{K}{z},aKq,Vn" Encoding:"evex m:2 p:2 l:x w:0 0x10 /r"/"MAR"
{
ND_INS_VPMOVUSWB, ND_CAT_DATAXFER, ND_SET_AVX512BW, 1317,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_HVM, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_h, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2183 Instruction:"VPMOVW2M rKq,Un" Encoding:"evex m:2 p:2 l:x w:1 0x29 /r:reg"/"RM"
{
ND_INS_VPMOVW2M, ND_CAT_DATAXFER, ND_SET_AVX512BW, 1318,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_E7NM, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2184 Instruction:"VPMOVWB Wh{K}{z},aKq,Vn" Encoding:"evex m:2 p:2 l:x w:0 0x30 /r"/"MAR"
{
ND_INS_VPMOVWB, ND_CAT_DATAXFER, ND_SET_AVX512BW, 1319,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_HVM, ND_EXT_E6, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_W, ND_OPS_h, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2185 Instruction:"VPMOVZXBD Vn{K}{z},aKq,Wf" Encoding:"evex m:2 p:1 l:x w:i 0x31 /r"/"RAM"
{
ND_INS_VPMOVZXBD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1320,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_QVM, ND_EXT_E5, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_f, ND_OPF_R, 0, 0),
},
// Pos:2186 Instruction:"VPMOVZXBD Vdq,Wd" Encoding:"vex m:2 p:1 l:0 w:i 0x31 /r"/"RM"
{
ND_INS_VPMOVZXBD, ND_CAT_AVX, ND_SET_AVX, 1320,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:2187 Instruction:"VPMOVZXBD Vqq,Wq" Encoding:"vex m:2 p:1 l:1 w:i 0x31 /r"/"RM"
{
ND_INS_VPMOVZXBD, ND_CAT_AVX2, ND_SET_AVX2, 1320,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2188 Instruction:"VPMOVZXBQ Vn{K}{z},aKq,We" Encoding:"evex m:2 p:1 l:x w:i 0x32 /r"/"RAM"
{
ND_INS_VPMOVZXBQ, ND_CAT_DATAXFER, ND_SET_AVX512F, 1321,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_OVM, ND_EXT_E5, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_e, ND_OPF_R, 0, 0),
},
// Pos:2189 Instruction:"VPMOVZXBQ Vdq,Ww" Encoding:"vex m:2 p:1 l:0 w:i 0x32 /r"/"RM"
{
ND_INS_VPMOVZXBQ, ND_CAT_AVX, ND_SET_AVX, 1321,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_w, ND_OPF_R, 0, 0),
},
// Pos:2190 Instruction:"VPMOVZXBQ Vqq,Wd" Encoding:"vex m:2 p:1 l:1 w:i 0x32 /r"/"RM"
{
ND_INS_VPMOVZXBQ, ND_CAT_AVX2, ND_SET_AVX2, 1321,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:2191 Instruction:"VPMOVZXBW Vn{K}{z},aKq,Wh" Encoding:"evex m:2 p:1 l:x w:i 0x30 /r"/"RAM"
{
ND_INS_VPMOVZXBW, ND_CAT_DATAXFER, ND_SET_AVX512BW, 1322,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_HVM, ND_EXT_E5, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_h, ND_OPF_R, 0, 0),
},
// Pos:2192 Instruction:"VPMOVZXBW Vdq,Wq" Encoding:"vex m:2 p:1 l:0 w:i 0x30 /r"/"RM"
{
ND_INS_VPMOVZXBW, ND_CAT_AVX, ND_SET_AVX, 1322,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2193 Instruction:"VPMOVZXBW Vqq,Wdq" Encoding:"vex m:2 p:1 l:1 w:i 0x30 /r"/"RM"
{
ND_INS_VPMOVZXBW, ND_CAT_AVX2, ND_SET_AVX2, 1322,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2194 Instruction:"VPMOVZXDQ Vn{K}{z},aKq,Wh" Encoding:"evex m:2 p:1 l:x w:0 0x35 /r"/"RAM"
{
ND_INS_VPMOVZXDQ, ND_CAT_DATAXFER, ND_SET_AVX512F, 1323,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_HVM, ND_EXT_E5, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_h, ND_OPF_R, 0, 0),
},
// Pos:2195 Instruction:"VPMOVZXDQ Vdq,Wq" Encoding:"vex m:2 p:1 l:0 w:i 0x35 /r"/"RM"
{
ND_INS_VPMOVZXDQ, ND_CAT_AVX, ND_SET_AVX, 1323,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2196 Instruction:"VPMOVZXDQ Vqq,Wdq" Encoding:"vex m:2 p:1 l:1 w:i 0x35 /r"/"RM"
{
ND_INS_VPMOVZXDQ, ND_CAT_AVX2, ND_SET_AVX2, 1323,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2197 Instruction:"VPMOVZXWD Vn{K}{z},aKq,Wh" Encoding:"evex m:2 p:1 l:x w:i 0x33 /r"/"RAM"
{
ND_INS_VPMOVZXWD, ND_CAT_DATAXFER, ND_SET_AVX512F, 1324,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_HVM, ND_EXT_E5, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_h, ND_OPF_R, 0, 0),
},
// Pos:2198 Instruction:"VPMOVZXWD Vdq,Wq" Encoding:"vex m:2 p:1 l:0 w:i 0x33 /r"/"RM"
{
ND_INS_VPMOVZXWD, ND_CAT_AVX, ND_SET_AVX, 1324,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2199 Instruction:"VPMOVZXWD Vqq,Wdq" Encoding:"vex m:2 p:1 l:1 w:i 0x33 /r"/"RM"
{
ND_INS_VPMOVZXWD, ND_CAT_AVX2, ND_SET_AVX2, 1324,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2200 Instruction:"VPMOVZXWQ Vn{K}{z},aKq,Wf" Encoding:"evex m:2 p:1 l:x w:i 0x34 /r"/"RAM"
{
ND_INS_VPMOVZXWQ, ND_CAT_DATAXFER, ND_SET_AVX512F, 1325,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_QVM, ND_EXT_E5, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_f, ND_OPF_R, 0, 0),
},
// Pos:2201 Instruction:"VPMOVZXWQ Vdq,Wd" Encoding:"vex m:2 p:1 l:0 w:i 0x34 /r"/"RM"
{
ND_INS_VPMOVZXWQ, ND_CAT_AVX, ND_SET_AVX, 1325,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_d, ND_OPF_R, 0, 0),
},
// Pos:2202 Instruction:"VPMOVZXWQ Vqq,Wq" Encoding:"vex m:2 p:1 l:1 w:i 0x34 /r"/"RM"
{
ND_INS_VPMOVZXWQ, ND_CAT_AVX2, ND_SET_AVX2, 1325,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_qq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2203 Instruction:"VPMULDQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x28 /r"/"RAVM"
{
ND_INS_VPMULDQ, ND_CAT_AVX512, ND_SET_AVX512F, 1326,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2204 Instruction:"VPMULDQ Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x28 /r"/"RVM"
{
ND_INS_VPMULDQ, ND_CAT_AVX, ND_SET_AVX, 1326,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2205 Instruction:"VPMULHRSW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:i 0x0B /r"/"RAVM"
{
ND_INS_VPMULHRSW, ND_CAT_AVX512, ND_SET_AVX512BW, 1327,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2206 Instruction:"VPMULHRSW Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x0B /r"/"RVM"
{
ND_INS_VPMULHRSW, ND_CAT_AVX, ND_SET_AVX, 1327,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2207 Instruction:"VPMULHUW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xE4 /r"/"RAVM"
{
ND_INS_VPMULHUW, ND_CAT_AVX512, ND_SET_AVX512BW, 1328,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2208 Instruction:"VPMULHUW Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xE4 /r"/"RVM"
{
ND_INS_VPMULHUW, ND_CAT_AVX, ND_SET_AVX, 1328,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2209 Instruction:"VPMULHW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xE5 /r"/"RAVM"
{
ND_INS_VPMULHW, ND_CAT_AVX512, ND_SET_AVX512BW, 1329,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2210 Instruction:"VPMULHW Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xE5 /r"/"RVM"
{
ND_INS_VPMULHW, ND_CAT_AVX, ND_SET_AVX, 1329,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2211 Instruction:"VPMULLD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x40 /r"/"RAVM"
{
ND_INS_VPMULLD, ND_CAT_AVX512, ND_SET_AVX512F, 1330,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2212 Instruction:"VPMULLD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x40 /r"/"RVM"
{
ND_INS_VPMULLD, ND_CAT_AVX, ND_SET_AVX, 1330,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2213 Instruction:"VPMULLQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x40 /r"/"RAVM"
{
ND_INS_VPMULLQ, ND_CAT_AVX512, ND_SET_AVX512DQ, 1331,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2214 Instruction:"VPMULLW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xD5 /r"/"RAVM"
{
ND_INS_VPMULLW, ND_CAT_AVX512, ND_SET_AVX512BW, 1332,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2215 Instruction:"VPMULLW Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xD5 /r"/"RVM"
{
ND_INS_VPMULLW, ND_CAT_AVX, ND_SET_AVX, 1332,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2216 Instruction:"VPMULTISHIFTQB Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x83 /r"/"RAVM"
{
ND_INS_VPMULTISHIFTQB, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI, 1333,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2217 Instruction:"VPMULUDQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:1 p:1 l:x w:1 0xF4 /r"/"RAVM"
{
ND_INS_VPMULUDQ, ND_CAT_AVX512, ND_SET_AVX512F, 1334,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2218 Instruction:"VPMULUDQ Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xF4 /r"/"RVM"
{
ND_INS_VPMULUDQ, ND_CAT_AVX, ND_SET_AVX, 1334,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2219 Instruction:"VPOPCNTB Vn{K}{z},aKq,Wn" Encoding:"evex m:2 p:1 l:x w:0 0x54 /r"/"RAM"
{
ND_INS_VPOPCNTB, ND_CAT_VPOPCNT, ND_SET_AVX512BITALG, 1335,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BITALG,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2220 Instruction:"VPOPCNTD Vn{K}{z},aKq,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x55 /r"/"RAM"
{
ND_INS_VPOPCNTD, ND_CAT_VPOPCNT, ND_SET_AVX512VPOPCNTDQ, 1336,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VPOPCNTDQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2221 Instruction:"VPOPCNTQ Vn{K}{z},aKq,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x55 /r"/"RAM"
{
ND_INS_VPOPCNTQ, ND_CAT_VPOPCNT, ND_SET_AVX512VPOPCNTDQ, 1337,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VPOPCNTDQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2222 Instruction:"VPOPCNTW Vn{K}{z},aKq,Wn" Encoding:"evex m:2 p:1 l:x w:1 0x54 /r"/"RAM"
{
ND_INS_VPOPCNTW, ND_CAT_VPOPCNT, ND_SET_AVX512BITALG, 1338,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BITALG,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2223 Instruction:"VPOR Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xEB /r"/"RVM"
{
ND_INS_VPOR, ND_CAT_LOGICAL, ND_SET_AVX, 1339,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2224 Instruction:"VPORD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:1 p:1 l:x w:0 0xEB /r"/"RAVM"
{
ND_INS_VPORD, ND_CAT_LOGICAL, ND_SET_AVX512F, 1340,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2225 Instruction:"VPORQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:1 p:1 l:x w:1 0xEB /r"/"RAVM"
{
ND_INS_VPORQ, ND_CAT_LOGICAL, ND_SET_AVX512F, 1341,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2226 Instruction:"VPPERM Vx,Hx,Wx,Lx" Encoding:"xop m:8 w:0 0xA3 /r is4"/"RVML"
{
ND_INS_VPPERM, ND_CAT_XOP, ND_SET_XOP, 1342,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2227 Instruction:"VPPERM Vx,Hx,Lx,Wx" Encoding:"xop m:8 w:1 0xA3 /r is4"/"RVLM"
{
ND_INS_VPPERM, ND_CAT_XOP, ND_SET_XOP, 1342,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_L, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2228 Instruction:"VPROLD Hn{K}{z},aKq,Wn|B32,Ib" Encoding:"evex m:1 p:1 l:x w:0 0x72 /1 ib"/"VAMI"
{
ND_INS_VPROLD, ND_CAT_AVX512, ND_SET_AVX512F, 1343,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2229 Instruction:"VPROLQ Hn{K}{z},aKq,Wn|B64,Ib" Encoding:"evex m:1 p:1 l:x w:1 0x72 /1 ib"/"VAMI"
{
ND_INS_VPROLQ, ND_CAT_AVX512, ND_SET_AVX512F, 1344,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2230 Instruction:"VPROLVD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x15 /r"/"RAVM"
{
ND_INS_VPROLVD, ND_CAT_AVX512, ND_SET_AVX512F, 1345,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2231 Instruction:"VPROLVQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x15 /r"/"RAVM"
{
ND_INS_VPROLVQ, ND_CAT_AVX512, ND_SET_AVX512F, 1346,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2232 Instruction:"VPRORD Hn{K}{z},aKq,Wn|B32,Ib" Encoding:"evex m:1 p:1 l:x w:0 0x72 /0 ib"/"VAMI"
{
ND_INS_VPRORD, ND_CAT_AVX512, ND_SET_AVX512F, 1347,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2233 Instruction:"VPRORQ Hn{K}{z},aKq,Wn|B64,Ib" Encoding:"evex m:1 p:1 l:x w:1 0x72 /0 ib"/"VAMI"
{
ND_INS_VPRORQ, ND_CAT_AVX512, ND_SET_AVX512F, 1348,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2234 Instruction:"VPRORVD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x14 /r"/"RAVM"
{
ND_INS_VPRORVD, ND_CAT_AVX512, ND_SET_AVX512F, 1349,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2235 Instruction:"VPRORVQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x14 /r"/"RAVM"
{
ND_INS_VPRORVQ, ND_CAT_AVX512, ND_SET_AVX512F, 1350,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2236 Instruction:"VPROTB Vdq,Wdq,Ib" Encoding:"xop m:8 0xC0 /r ib"/"RMI"
{
ND_INS_VPROTB, ND_CAT_XOP, ND_SET_XOP, 1351,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2237 Instruction:"VPROTB Vdq,Wdq,Hdq" Encoding:"xop m:9 w:0 0x90 /r"/"RMV"
{
ND_INS_VPROTB, ND_CAT_XOP, ND_SET_XOP, 1351,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2238 Instruction:"VPROTB Vdq,Hdq,Wdq" Encoding:"xop m:9 w:1 0x90 /r"/"RVM"
{
ND_INS_VPROTB, ND_CAT_XOP, ND_SET_XOP, 1351,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2239 Instruction:"VPROTD Vdq,Wdq,Ib" Encoding:"xop m:8 0xC2 /r ib"/"RMI"
{
ND_INS_VPROTD, ND_CAT_XOP, ND_SET_XOP, 1352,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2240 Instruction:"VPROTD Vdq,Wdq,Hdq" Encoding:"xop m:9 w:0 0x92 /r"/"RMV"
{
ND_INS_VPROTD, ND_CAT_XOP, ND_SET_XOP, 1352,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2241 Instruction:"VPROTD Vdq,Hdq,Wdq" Encoding:"xop m:9 w:1 0x92 /r"/"RVM"
{
ND_INS_VPROTD, ND_CAT_XOP, ND_SET_XOP, 1352,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2242 Instruction:"VPROTQ Vdq,Wdq,Ib" Encoding:"xop m:8 0xC3 /r ib"/"RMI"
{
ND_INS_VPROTQ, ND_CAT_XOP, ND_SET_XOP, 1353,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2243 Instruction:"VPROTQ Vdq,Wdq,Hdq" Encoding:"xop m:9 w:0 0x93 /r"/"RMV"
{
ND_INS_VPROTQ, ND_CAT_XOP, ND_SET_XOP, 1353,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2244 Instruction:"VPROTQ Vdq,Hdq,Wdq" Encoding:"xop m:9 w:1 0x93 /r"/"RVM"
{
ND_INS_VPROTQ, ND_CAT_XOP, ND_SET_XOP, 1353,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2245 Instruction:"VPROTW Vdq,Wdq,Ib" Encoding:"xop m:8 0xC1 /r ib"/"RMI"
{
ND_INS_VPROTW, ND_CAT_XOP, ND_SET_XOP, 1354,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2246 Instruction:"VPROTW Vdq,Wdq,Hdq" Encoding:"xop m:9 w:0 0x91 /r"/"RMV"
{
ND_INS_VPROTW, ND_CAT_XOP, ND_SET_XOP, 1354,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2247 Instruction:"VPROTW Vdq,Hdq,Wdq" Encoding:"xop m:9 w:1 0x91 /r"/"RVM"
{
ND_INS_VPROTW, ND_CAT_XOP, ND_SET_XOP, 1354,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2248 Instruction:"VPSADBW Vn,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xF6 /r"/"RVM"
{
ND_INS_VPSADBW, ND_CAT_AVX512, ND_SET_AVX512BW, 1355,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2249 Instruction:"VPSADBW Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xF6 /r"/"RVM"
{
ND_INS_VPSADBW, ND_CAT_AVX, ND_SET_AVX, 1355,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2250 Instruction:"VPSCATTERDD Mvm32n{K},aKq,Vn" Encoding:"evex m:2 p:1 l:x w:0 0xA0 /r:mem vsib"/"MAR"
{
ND_INS_VPSCATTERDD, ND_CAT_SCATTER, ND_SET_AVX512F, 1356,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E12, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm32n, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, 0, 0),
},
// Pos:2251 Instruction:"VPSCATTERDQ Mvm32h{K},aKq,Vn" Encoding:"evex m:2 p:1 l:x w:1 0xA0 /r:mem vsib"/"MAR"
{
ND_INS_VPSCATTERDQ, ND_CAT_SCATTER, ND_SET_AVX512F, 1357,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E12, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm32h, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, 0, 0),
},
// Pos:2252 Instruction:"VPSCATTERQD Mvm64n{K},aKq,Vh" Encoding:"evex m:2 p:1 l:x w:0 0xA1 /r:mem vsib"/"MAR"
{
ND_INS_VPSCATTERQD, ND_CAT_SCATTER, ND_SET_AVX512F, 1358,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E12, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_h, ND_OPF_RW, 0, 0),
},
// Pos:2253 Instruction:"VPSCATTERQQ Mvm64n{K},aKq,Vn" Encoding:"evex m:2 p:1 l:x w:1 0xA1 /r:mem vsib"/"MAR"
{
ND_INS_VPSCATTERQQ, ND_CAT_SCATTER, ND_SET_AVX512F, 1359,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E12, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, 0, 0),
},
// Pos:2254 Instruction:"VPSHAB Vdq,Wdq,Hdq" Encoding:"xop m:9 w:0 0x98 /r"/"RMV"
{
ND_INS_VPSHAB, ND_CAT_XOP, ND_SET_XOP, 1360,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2255 Instruction:"VPSHAB Vdq,Hdq,Wdq" Encoding:"xop m:9 w:1 0x98 /r"/"RVM"
{
ND_INS_VPSHAB, ND_CAT_XOP, ND_SET_XOP, 1360,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2256 Instruction:"VPSHAD Vdq,Wdq,Hdq" Encoding:"xop m:9 w:0 0x9A /r"/"RMV"
{
ND_INS_VPSHAD, ND_CAT_XOP, ND_SET_XOP, 1361,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2257 Instruction:"VPSHAD Vdq,Hdq,Wdq" Encoding:"xop m:9 w:1 0x9A /r"/"RVM"
{
ND_INS_VPSHAD, ND_CAT_XOP, ND_SET_XOP, 1361,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2258 Instruction:"VPSHAQ Vdq,Wdq,Hdq" Encoding:"xop m:9 w:0 0x9B /r"/"RMV"
{
ND_INS_VPSHAQ, ND_CAT_XOP, ND_SET_XOP, 1362,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2259 Instruction:"VPSHAQ Vdq,Hdq,Wdq" Encoding:"xop m:9 w:1 0x9B /r"/"RVM"
{
ND_INS_VPSHAQ, ND_CAT_XOP, ND_SET_XOP, 1362,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2260 Instruction:"VPSHAW Vdq,Wdq,Hdq" Encoding:"xop m:9 w:0 0x99 /r"/"RMV"
{
ND_INS_VPSHAW, ND_CAT_XOP, ND_SET_XOP, 1363,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2261 Instruction:"VPSHAW Vdq,Hdq,Wdq" Encoding:"xop m:9 w:1 0x99 /r"/"RVM"
{
ND_INS_VPSHAW, ND_CAT_XOP, ND_SET_XOP, 1363,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2262 Instruction:"VPSHLB Vdq,Wdq,Hdq" Encoding:"xop m:9 w:0 0x94 /r"/"RMV"
{
ND_INS_VPSHLB, ND_CAT_XOP, ND_SET_XOP, 1364,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2263 Instruction:"VPSHLB Vdq,Hdq,Wdq" Encoding:"xop m:9 w:1 0x94 /r"/"RVM"
{
ND_INS_VPSHLB, ND_CAT_XOP, ND_SET_XOP, 1364,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2264 Instruction:"VPSHLB Vdq,Wdq,Hdq" Encoding:"xop m:9 w:0 0x95 /r"/"RMV"
{
ND_INS_VPSHLB, ND_CAT_XOP, ND_SET_XOP, 1364,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2265 Instruction:"VPSHLB Vdq,Hdq,Wdq" Encoding:"xop m:9 w:1 0x95 /r"/"RVM"
{
ND_INS_VPSHLB, ND_CAT_XOP, ND_SET_XOP, 1364,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2266 Instruction:"VPSHLB Vdq,Wdq,Hdq" Encoding:"xop m:9 w:0 0x96 /r"/"RMV"
{
ND_INS_VPSHLB, ND_CAT_XOP, ND_SET_XOP, 1364,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2267 Instruction:"VPSHLB Vdq,Hdq,Wdq" Encoding:"xop m:9 w:1 0x96 /r"/"RVM"
{
ND_INS_VPSHLB, ND_CAT_XOP, ND_SET_XOP, 1364,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2268 Instruction:"VPSHLDD Vn{K}{z},aKq,Hn,Wn|B32,Ib" Encoding:"evex m:3 p:1 l:x w:0 0x71 /r ib"/"RAVMI"
{
ND_INS_VPSHLDD, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI2, 1365,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2269 Instruction:"VPSHLDQ Vn{K}{z},aKq,Hn,Wn|B64,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x71 /r ib"/"RAVMI"
{
ND_INS_VPSHLDQ, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI2, 1366,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2270 Instruction:"VPSHLDVD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x71 /r"/"RAVM"
{
ND_INS_VPSHLDVD, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI2, 1367,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2271 Instruction:"VPSHLDVQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x71 /r"/"RAVM"
{
ND_INS_VPSHLDVQ, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI2, 1368,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2272 Instruction:"VPSHLDVW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:1 0x70 /r"/"RAVM"
{
ND_INS_VPSHLDVW, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI2, 1369,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2273 Instruction:"VPSHLDW Vn{K}{z},aKq,Hn,Wn,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x70 /r ib"/"RAVMI"
{
ND_INS_VPSHLDW, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI2, 1370,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(5, 0), ND_TUPLE_FVM, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2274 Instruction:"VPSHLQ Vdq,Wdq,Hdq" Encoding:"xop m:9 w:0 0x97 /r"/"RMV"
{
ND_INS_VPSHLQ, ND_CAT_XOP, ND_SET_XOP, 1371,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2275 Instruction:"VPSHLQ Vdq,Hdq,Wdq" Encoding:"xop m:9 w:1 0x97 /r"/"RVM"
{
ND_INS_VPSHLQ, ND_CAT_XOP, ND_SET_XOP, 1371,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_XOP,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2276 Instruction:"VPSHRDD Vn{K}{z},aKq,Hn,Wn|B32,Ib" Encoding:"evex m:3 p:1 l:x w:0 0x73 /r ib"/"RAVMI"
{
ND_INS_VPSHRDD, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI2, 1372,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2277 Instruction:"VPSHRDQ Vn{K}{z},aKq,Hn,Wn|B64,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x73 /r ib"/"RAVMI"
{
ND_INS_VPSHRDQ, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI2, 1373,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2278 Instruction:"VPSHRDVD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x73 /r"/"RAVM"
{
ND_INS_VPSHRDVD, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI2, 1374,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2279 Instruction:"VPSHRDVQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x73 /r"/"RAVM"
{
ND_INS_VPSHRDVQ, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI2, 1375,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2280 Instruction:"VPSHRDVW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:1 0x72 /r"/"RAVM"
{
ND_INS_VPSHRDVW, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI2, 1376,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2281 Instruction:"VPSHRDW Vn{K}{z},aKq,Hn,Wn,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x72 /r ib"/"RAVMI"
{
ND_INS_VPSHRDW, ND_CAT_AVX512VBMI, ND_SET_AVX512VBMI2, 1377,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(5, 0), ND_TUPLE_FVM, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512VBMI2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2282 Instruction:"VPSHUFB Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:i 0x00 /r"/"RAVM"
{
ND_INS_VPSHUFB, ND_CAT_AVX512, ND_SET_AVX512BW, 1378,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2283 Instruction:"VPSHUFB Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x00 /r"/"RVM"
{
ND_INS_VPSHUFB, ND_CAT_AVX, ND_SET_AVX, 1378,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2284 Instruction:"VPSHUFBITQMB rK{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:0 0x8F /r"/"RAVM"
{
ND_INS_VPSHUFBITQMB, ND_CAT_AVX512VBMI, ND_SET_AVX512BITALG, 1379,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BITALG,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2285 Instruction:"VPSHUFD Vn{K}{z},aKq,Wn|B32,Ib" Encoding:"evex m:1 p:1 l:x w:0 0x70 /r ib"/"RAMI"
{
ND_INS_VPSHUFD, ND_CAT_AVX512, ND_SET_AVX512F, 1380,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2286 Instruction:"VPSHUFD Vx,Wx,Ib" Encoding:"vex m:1 p:1 l:x w:i 0x70 /r ib"/"RMI"
{
ND_INS_VPSHUFD, ND_CAT_AVX, ND_SET_AVX, 1380,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2287 Instruction:"VPSHUFHW Vn{K}{z},aKq,Wn,Ib" Encoding:"evex m:1 p:2 l:x w:i 0x70 /r ib"/"RAMI"
{
ND_INS_VPSHUFHW, ND_CAT_AVX512, ND_SET_AVX512BW, 1381,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2288 Instruction:"VPSHUFHW Vx,Wx,Ib" Encoding:"vex m:1 p:2 l:x w:i 0x70 /r ib"/"RMI"
{
ND_INS_VPSHUFHW, ND_CAT_AVX, ND_SET_AVX, 1381,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2289 Instruction:"VPSHUFLW Vn{K}{z},aKq,Wn,Ib" Encoding:"evex m:1 p:3 l:x w:i 0x70 /r ib"/"RAMI"
{
ND_INS_VPSHUFLW, ND_CAT_AVX512, ND_SET_AVX512BW, 1382,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2290 Instruction:"VPSHUFLW Vx,Wx,Ib" Encoding:"vex m:1 p:3 l:x w:i 0x70 /r ib"/"RMI"
{
ND_INS_VPSHUFLW, ND_CAT_AVX, ND_SET_AVX, 1382,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2291 Instruction:"VPSIGNB Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x08 /r"/"RVM"
{
ND_INS_VPSIGNB, ND_CAT_AVX, ND_SET_AVX, 1383,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2292 Instruction:"VPSIGND Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x0A /r"/"RVM"
{
ND_INS_VPSIGND, ND_CAT_AVX, ND_SET_AVX, 1384,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2293 Instruction:"VPSIGNW Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x09 /r"/"RVM"
{
ND_INS_VPSIGNW, ND_CAT_AVX, ND_SET_AVX, 1385,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2294 Instruction:"VPSLLD Hn{K}{z},aKq,Wn|B32,Ib" Encoding:"evex m:1 p:1 l:x w:0 0x72 /6 ib"/"VAMI"
{
ND_INS_VPSLLD, ND_CAT_AVX512, ND_SET_AVX512F, 1386,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2295 Instruction:"VPSLLD Vn{K}{z},aKq,Hn,Wdq" Encoding:"evex m:1 p:1 l:x w:0 0xF2 /r"/"RAVM"
{
ND_INS_VPSLLD, ND_CAT_AVX512, ND_SET_AVX512F, 1386,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_M128, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2296 Instruction:"VPSLLD Hx,Ux,Ib" Encoding:"vex m:1 p:1 l:x w:i 0x72 /6:reg ib"/"VMI"
{
ND_INS_VPSLLD, ND_CAT_AVX, ND_SET_AVX, 1386,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2297 Instruction:"VPSLLD Vx,Hx,Wdq" Encoding:"vex m:1 p:1 l:x w:i 0xF2 /r"/"RVM"
{
ND_INS_VPSLLD, ND_CAT_AVX, ND_SET_AVX, 1386,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2298 Instruction:"VPSLLDQ Hn,Wn,Ib" Encoding:"evex m:1 p:1 l:x w:i 0x73 /7 ib"/"VMI"
{
ND_INS_VPSLLDQ, ND_CAT_AVX512, ND_SET_AVX512BW, 1387,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_n, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2299 Instruction:"VPSLLDQ Hx,Ux,Ib" Encoding:"vex m:1 p:1 l:x w:i 0x73 /7:reg ib"/"VMI"
{
ND_INS_VPSLLDQ, ND_CAT_AVX, ND_SET_AVX, 1387,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2300 Instruction:"VPSLLQ Hn{K}{z},aKq,Wn|B64,Ib" Encoding:"evex m:1 p:1 l:x w:1 0x73 /6 ib"/"VAMI"
{
ND_INS_VPSLLQ, ND_CAT_AVX512, ND_SET_AVX512F, 1388,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2301 Instruction:"VPSLLQ Vn{K}{z},aKq,Hn,Wdq" Encoding:"evex m:1 p:1 l:x w:1 0xF3 /r"/"RAVM"
{
ND_INS_VPSLLQ, ND_CAT_AVX512, ND_SET_AVX512F, 1388,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_M128, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2302 Instruction:"VPSLLQ Hx,Ux,Ib" Encoding:"vex m:1 p:1 l:x w:i 0x73 /6:reg ib"/"VMI"
{
ND_INS_VPSLLQ, ND_CAT_AVX, ND_SET_AVX, 1388,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2303 Instruction:"VPSLLQ Vx,Hx,Wdq" Encoding:"vex m:1 p:1 l:x w:i 0xF3 /r"/"RVM"
{
ND_INS_VPSLLQ, ND_CAT_AVX, ND_SET_AVX, 1388,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2304 Instruction:"VPSLLVD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x47 /r"/"RAVM"
{
ND_INS_VPSLLVD, ND_CAT_AVX512, ND_SET_AVX512F, 1389,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2305 Instruction:"VPSLLVD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0x47 /r"/"RVM"
{
ND_INS_VPSLLVD, ND_CAT_AVX2, ND_SET_AVX2, 1389,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2306 Instruction:"VPSLLVQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x47 /r"/"RAVM"
{
ND_INS_VPSLLVQ, ND_CAT_AVX512, ND_SET_AVX512F, 1390,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2307 Instruction:"VPSLLVQ Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0x47 /r"/"RVM"
{
ND_INS_VPSLLVQ, ND_CAT_AVX2, ND_SET_AVX2, 1390,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2308 Instruction:"VPSLLVW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:1 0x12 /r"/"RAVM"
{
ND_INS_VPSLLVW, ND_CAT_AVX512, ND_SET_AVX512BW, 1391,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2309 Instruction:"VPSLLW Hn{K}{z},aKq,Wn,Ib" Encoding:"evex m:1 p:1 l:x w:i 0x71 /6 ib"/"VAMI"
{
ND_INS_VPSLLW, ND_CAT_AVX512, ND_SET_AVX512BW, 1392,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_M128, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2310 Instruction:"VPSLLW Vn{K}{z},aKq,Hn,Wdq" Encoding:"evex m:1 p:1 l:x w:i 0xF1 /r"/"RAVM"
{
ND_INS_VPSLLW, ND_CAT_AVX512, ND_SET_AVX512BW, 1392,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_M128, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2311 Instruction:"VPSLLW Hx,Ux,Ib" Encoding:"vex m:1 p:1 l:x w:i 0x71 /6:reg ib"/"VMI"
{
ND_INS_VPSLLW, ND_CAT_AVX, ND_SET_AVX, 1392,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2312 Instruction:"VPSLLW Vx,Hx,Wdq" Encoding:"vex m:1 p:1 l:x w:i 0xF1 /r"/"RVM"
{
ND_INS_VPSLLW, ND_CAT_AVX, ND_SET_AVX, 1392,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2313 Instruction:"VPSRAD Hn{K}{z},aKq,Wn|B32,Ib" Encoding:"evex m:1 p:1 l:x w:0 0x72 /4 ib"/"VAMI"
{
ND_INS_VPSRAD, ND_CAT_AVX512, ND_SET_AVX512F, 1393,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2314 Instruction:"VPSRAD Vn{K}{z},aKq,Hn,Wdq" Encoding:"evex m:1 p:1 l:x w:0 0xE2 /r"/"RAVM"
{
ND_INS_VPSRAD, ND_CAT_AVX512, ND_SET_AVX512F, 1393,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_M128, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2315 Instruction:"VPSRAD Hx,Ux,Ib" Encoding:"vex m:1 p:1 l:x w:i 0x72 /4:reg ib"/"VMI"
{
ND_INS_VPSRAD, ND_CAT_AVX, ND_SET_AVX, 1393,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2316 Instruction:"VPSRAD Vx,Hx,Wdq" Encoding:"vex m:1 p:1 l:x w:i 0xE2 /r"/"RVM"
{
ND_INS_VPSRAD, ND_CAT_AVX, ND_SET_AVX, 1393,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2317 Instruction:"VPSRAQ Hn{K}{z},aKq,Wn|B64,Ib" Encoding:"evex m:1 p:1 l:x w:1 0x72 /4 ib"/"VAMI"
{
ND_INS_VPSRAQ, ND_CAT_AVX512, ND_SET_AVX512F, 1394,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2318 Instruction:"VPSRAQ Vn{K}{z},aKq,Hn,Wdq" Encoding:"evex m:1 p:1 l:x w:1 0xE2 /r"/"RAVM"
{
ND_INS_VPSRAQ, ND_CAT_AVX512, ND_SET_AVX512F, 1394,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_M128, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2319 Instruction:"VPSRAVD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x46 /r"/"RAVM"
{
ND_INS_VPSRAVD, ND_CAT_AVX512, ND_SET_AVX512F, 1395,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2320 Instruction:"VPSRAVD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0x46 /r"/"RVM"
{
ND_INS_VPSRAVD, ND_CAT_AVX2, ND_SET_AVX2, 1395,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2321 Instruction:"VPSRAVQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x46 /r"/"RAVM"
{
ND_INS_VPSRAVQ, ND_CAT_AVX512, ND_SET_AVX512F, 1396,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2322 Instruction:"VPSRAVW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:1 0x11 /r"/"RAVM"
{
ND_INS_VPSRAVW, ND_CAT_AVX512, ND_SET_AVX512BW, 1397,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2323 Instruction:"VPSRAW Hn{K}{z},aKq,Wn,Ib" Encoding:"evex m:1 p:1 l:x w:i 0x71 /4 ib"/"VAMI"
{
ND_INS_VPSRAW, ND_CAT_AVX512, ND_SET_AVX512BW, 1398,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_M128, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2324 Instruction:"VPSRAW Vn{K}{z},aKq,Hn,Wdq" Encoding:"evex m:1 p:1 l:x w:i 0xE1 /r"/"RAVM"
{
ND_INS_VPSRAW, ND_CAT_AVX512, ND_SET_AVX512BW, 1398,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_M128, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2325 Instruction:"VPSRAW Hx,Ux,Ib" Encoding:"vex m:1 p:1 l:x w:i 0x71 /4:reg ib"/"VMI"
{
ND_INS_VPSRAW, ND_CAT_AVX, ND_SET_AVX, 1398,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2326 Instruction:"VPSRAW Vx,Hx,Wdq" Encoding:"vex m:1 p:1 l:x w:i 0xE1 /r"/"RVM"
{
ND_INS_VPSRAW, ND_CAT_AVX, ND_SET_AVX, 1398,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2327 Instruction:"VPSRLD Hn{K}{z},aKq,Wn|B32,Ib" Encoding:"evex m:1 p:1 l:x w:0 0x72 /2 ib"/"VAMI"
{
ND_INS_VPSRLD, ND_CAT_AVX512, ND_SET_AVX512F, 1399,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2328 Instruction:"VPSRLD Vn{K}{z},aKq,Hn,Wdq" Encoding:"evex m:1 p:1 l:x w:0 0xD2 /r"/"RAVM"
{
ND_INS_VPSRLD, ND_CAT_AVX512, ND_SET_AVX512F, 1399,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_M128, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2329 Instruction:"VPSRLD Hx,Ux,Ib" Encoding:"vex m:1 p:1 l:x w:i 0x72 /2:reg ib"/"VMI"
{
ND_INS_VPSRLD, ND_CAT_AVX, ND_SET_AVX, 1399,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2330 Instruction:"VPSRLD Vx,Hx,Wdq" Encoding:"vex m:1 p:1 l:x w:i 0xD2 /r"/"RVM"
{
ND_INS_VPSRLD, ND_CAT_AVX, ND_SET_AVX, 1399,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2331 Instruction:"VPSRLDQ Hn,Wn,Ib" Encoding:"evex m:1 p:1 l:x w:i 0x73 /3 ib"/"VMI"
{
ND_INS_VPSRLDQ, ND_CAT_AVX512, ND_SET_AVX512BW, 1400,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_n, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2332 Instruction:"VPSRLDQ Hx,Ux,Ib" Encoding:"vex m:1 p:1 l:x w:i 0x73 /3:reg ib"/"VMI"
{
ND_INS_VPSRLDQ, ND_CAT_AVX, ND_SET_AVX, 1400,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2333 Instruction:"VPSRLQ Hn{K}{z},aKq,Wn|B64,Ib" Encoding:"evex m:1 p:1 l:x w:1 0x73 /2 ib"/"VAMI"
{
ND_INS_VPSRLQ, ND_CAT_AVX512, ND_SET_AVX512F, 1401,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2334 Instruction:"VPSRLQ Vn{K}{z},aKq,Hn,Wdq" Encoding:"evex m:1 p:1 l:x w:1 0xD3 /r"/"RAVM"
{
ND_INS_VPSRLQ, ND_CAT_AVX512, ND_SET_AVX512F, 1401,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_M128, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2335 Instruction:"VPSRLQ Hx,Ux,Ib" Encoding:"vex m:1 p:1 l:x w:i 0x73 /2:reg ib"/"VMI"
{
ND_INS_VPSRLQ, ND_CAT_AVX, ND_SET_AVX, 1401,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2336 Instruction:"VPSRLQ Vx,Hx,Wdq" Encoding:"vex m:1 p:1 l:x w:i 0xD3 /r"/"RVM"
{
ND_INS_VPSRLQ, ND_CAT_AVX, ND_SET_AVX, 1401,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2337 Instruction:"VPSRLVD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x45 /r"/"RAVM"
{
ND_INS_VPSRLVD, ND_CAT_AVX512, ND_SET_AVX512F, 1402,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2338 Instruction:"VPSRLVD Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0x45 /r"/"RVM"
{
ND_INS_VPSRLVD, ND_CAT_AVX2, ND_SET_AVX2, 1402,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2339 Instruction:"VPSRLVQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x45 /r"/"RAVM"
{
ND_INS_VPSRLVQ, ND_CAT_AVX512, ND_SET_AVX512F, 1403,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2340 Instruction:"VPSRLVQ Vx,Hx,Wx" Encoding:"vex m:2 p:1 l:x w:1 0x45 /r"/"RVM"
{
ND_INS_VPSRLVQ, ND_CAT_AVX2, ND_SET_AVX2, 1403,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2341 Instruction:"VPSRLVW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:1 0x10 /r"/"RAVM"
{
ND_INS_VPSRLVW, ND_CAT_AVX512, ND_SET_AVX512BW, 1404,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2342 Instruction:"VPSRLW Hn{K}{z},aKq,Wn,Ib" Encoding:"evex m:1 p:1 l:x w:i 0x71 /2 ib"/"VAMI"
{
ND_INS_VPSRLW, ND_CAT_AVX512, ND_SET_AVX512BW, 1405,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_M128, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2343 Instruction:"VPSRLW Vn{K}{z},aKq,Hn,Wdq" Encoding:"evex m:1 p:1 l:x w:i 0xD1 /r"/"RAVM"
{
ND_INS_VPSRLW, ND_CAT_AVX512, ND_SET_AVX512BW, 1405,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_M128, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2344 Instruction:"VPSRLW Hx,Ux,Ib" Encoding:"vex m:1 p:1 l:x w:i 0x71 /2:reg ib"/"VMI"
{
ND_INS_VPSRLW, ND_CAT_AVX, ND_SET_AVX, 1405,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_7, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_H, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_U, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2345 Instruction:"VPSRLW Vx,Hx,Wdq" Encoding:"vex m:1 p:1 l:x w:i 0xD1 /r"/"RVM"
{
ND_INS_VPSRLW, ND_CAT_AVX, ND_SET_AVX, 1405,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_dq, ND_OPF_R, 0, 0),
},
// Pos:2346 Instruction:"VPSUBB Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xF8 /r"/"RAVM"
{
ND_INS_VPSUBB, ND_CAT_AVX512, ND_SET_AVX512BW, 1406,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2347 Instruction:"VPSUBB Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xF8 /r"/"RVM"
{
ND_INS_VPSUBB, ND_CAT_AVX, ND_SET_AVX, 1406,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2348 Instruction:"VPSUBD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:1 p:1 l:x w:0 0xFA /r"/"RAVM"
{
ND_INS_VPSUBD, ND_CAT_AVX512, ND_SET_AVX512F, 1407,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2349 Instruction:"VPSUBD Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xFA /r"/"RVM"
{
ND_INS_VPSUBD, ND_CAT_AVX, ND_SET_AVX, 1407,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2350 Instruction:"VPSUBQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:1 p:1 l:x w:1 0xFB /r"/"RAVM"
{
ND_INS_VPSUBQ, ND_CAT_AVX512, ND_SET_AVX512F, 1408,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2351 Instruction:"VPSUBQ Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xFB /r"/"RVM"
{
ND_INS_VPSUBQ, ND_CAT_AVX, ND_SET_AVX, 1408,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2352 Instruction:"VPSUBSB Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xE8 /r"/"RAVM"
{
ND_INS_VPSUBSB, ND_CAT_AVX512, ND_SET_AVX512BW, 1409,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2353 Instruction:"VPSUBSB Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xE8 /r"/"RVM"
{
ND_INS_VPSUBSB, ND_CAT_AVX, ND_SET_AVX, 1409,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2354 Instruction:"VPSUBSW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xE9 /r"/"RAVM"
{
ND_INS_VPSUBSW, ND_CAT_AVX512, ND_SET_AVX512BW, 1410,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2355 Instruction:"VPSUBSW Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xE9 /r"/"RVM"
{
ND_INS_VPSUBSW, ND_CAT_AVX, ND_SET_AVX, 1410,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2356 Instruction:"VPSUBUSB Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xD8 /r"/"RAVM"
{
ND_INS_VPSUBUSB, ND_CAT_AVX512, ND_SET_AVX512BW, 1411,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2357 Instruction:"VPSUBUSB Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xD8 /r"/"RVM"
{
ND_INS_VPSUBUSB, ND_CAT_AVX, ND_SET_AVX, 1411,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2358 Instruction:"VPSUBUSW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xD9 /r"/"RAVM"
{
ND_INS_VPSUBUSW, ND_CAT_AVX512, ND_SET_AVX512BW, 1412,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2359 Instruction:"VPSUBUSW Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xD9 /r"/"RVM"
{
ND_INS_VPSUBUSW, ND_CAT_AVX, ND_SET_AVX, 1412,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2360 Instruction:"VPSUBW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0xF9 /r"/"RAVM"
{
ND_INS_VPSUBW, ND_CAT_AVX512, ND_SET_AVX512BW, 1413,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2361 Instruction:"VPSUBW Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xF9 /r"/"RVM"
{
ND_INS_VPSUBW, ND_CAT_AVX, ND_SET_AVX, 1413,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2362 Instruction:"VPTERNLOGD Vn{K}{z},aKq,Hn,Wn|B32,Ib" Encoding:"evex m:3 p:1 l:x w:0 0x25 /r ib"/"RAVMI"
{
ND_INS_VPTERNLOGD, ND_CAT_LOGICAL, ND_SET_AVX512F, 1414,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2363 Instruction:"VPTERNLOGQ Vn{K}{z},aKq,Hn,Wn|B64,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x25 /r ib"/"RAVMI"
{
ND_INS_VPTERNLOGQ, ND_CAT_LOGICAL, ND_SET_AVX512F, 1415,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2364 Instruction:"VPTEST Vx,Wx" Encoding:"vex m:2 p:1 l:x w:i 0x17 /r"/"RM"
{
ND_INS_VPTEST, ND_CAT_LOGICAL, ND_SET_AVX, 1416,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2365 Instruction:"VPTESTMB rKq{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:0 0x26 /r"/"RAVM"
{
ND_INS_VPTESTMB, ND_CAT_LOGICAL, ND_SET_AVX512BW, 1417,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2366 Instruction:"VPTESTMD rKq{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x27 /r"/"RAVM"
{
ND_INS_VPTESTMD, ND_CAT_LOGICAL, ND_SET_AVX512F, 1418,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2367 Instruction:"VPTESTMQ rKq{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x27 /r"/"RAVM"
{
ND_INS_VPTESTMQ, ND_CAT_LOGICAL, ND_SET_AVX512F, 1419,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2368 Instruction:"VPTESTMW rKq{K}{z},aKq,Hn,Wn" Encoding:"evex m:2 p:1 l:x w:1 0x26 /r"/"RAVM"
{
ND_INS_VPTESTMW, ND_CAT_LOGICAL, ND_SET_AVX512BW, 1420,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2369 Instruction:"VPTESTNMB rKq{K},aKq,Hn,Wn" Encoding:"evex m:2 p:2 l:x w:0 0x26 /r"/"RAVM"
{
ND_INS_VPTESTNMB, ND_CAT_LOGICAL, ND_SET_AVX512BW, 1421,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2370 Instruction:"VPTESTNMD rKq{K},aKq,Hn,Wn|B32" Encoding:"evex m:2 p:2 l:x w:0 0x27 /r"/"RAVM"
{
ND_INS_VPTESTNMD, ND_CAT_LOGICAL, ND_SET_AVX512F, 1422,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2371 Instruction:"VPTESTNMQ rKq{K},aKq,Hn,Wn|B64" Encoding:"evex m:2 p:2 l:x w:1 0x27 /r"/"RAVM"
{
ND_INS_VPTESTNMQ, ND_CAT_LOGICAL, ND_SET_AVX512F, 1423,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2372 Instruction:"VPTESTNMW rKq{K},aKq,Hn,Wn" Encoding:"evex m:2 p:2 l:x w:1 0x26 /r"/"RAVM"
{
ND_INS_VPTESTNMW, ND_CAT_LOGICAL, ND_SET_AVX512BW, 1424,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4nb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_rK, ND_OPS_q, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2373 Instruction:"VPUNPCKHBW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0x68 /r"/"RAVM"
{
ND_INS_VPUNPCKHBW, ND_CAT_AVX512, ND_SET_AVX512BW, 1425,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2374 Instruction:"VPUNPCKHBW Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x68 /r"/"RVM"
{
ND_INS_VPUNPCKHBW, ND_CAT_AVX, ND_SET_AVX, 1425,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2375 Instruction:"VPUNPCKHDQ Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:1 p:1 l:x w:0 0x6A /r"/"RAVM"
{
ND_INS_VPUNPCKHDQ, ND_CAT_AVX512, ND_SET_AVX512F, 1426,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2376 Instruction:"VPUNPCKHDQ Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x6A /r"/"RVM"
{
ND_INS_VPUNPCKHDQ, ND_CAT_AVX, ND_SET_AVX, 1426,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2377 Instruction:"VPUNPCKHQDQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:1 p:1 l:x w:1 0x6D /r"/"RAVM"
{
ND_INS_VPUNPCKHQDQ, ND_CAT_AVX512, ND_SET_AVX512F, 1427,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2378 Instruction:"VPUNPCKHQDQ Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x6D /r"/"RVM"
{
ND_INS_VPUNPCKHQDQ, ND_CAT_AVX, ND_SET_AVX, 1427,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2379 Instruction:"VPUNPCKHWD Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:i 0x69 /r"/"RAVM"
{
ND_INS_VPUNPCKHWD, ND_CAT_AVX512, ND_SET_AVX512BW, 1428,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2380 Instruction:"VPUNPCKHWD Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x69 /r"/"RVM"
{
ND_INS_VPUNPCKHWD, ND_CAT_AVX, ND_SET_AVX, 1428,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2381 Instruction:"VPUNPCKLBW Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:x 0x60 /r"/"RAVM"
{
ND_INS_VPUNPCKLBW, ND_CAT_AVX512, ND_SET_AVX512BW, 1429,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2382 Instruction:"VPUNPCKLBW Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x60 /r"/"RVM"
{
ND_INS_VPUNPCKLBW, ND_CAT_AVX, ND_SET_AVX, 1429,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2383 Instruction:"VPUNPCKLDQ Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:1 p:1 l:x w:0 0x62 /r"/"RAVM"
{
ND_INS_VPUNPCKLDQ, ND_CAT_AVX512, ND_SET_AVX512F, 1430,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2384 Instruction:"VPUNPCKLDQ Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x62 /r"/"RVM"
{
ND_INS_VPUNPCKLDQ, ND_CAT_AVX, ND_SET_AVX, 1430,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2385 Instruction:"VPUNPCKLQDQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:1 p:1 l:x w:1 0x6C /r"/"RAVM"
{
ND_INS_VPUNPCKLQDQ, ND_CAT_AVX512, ND_SET_AVX512F, 1431,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2386 Instruction:"VPUNPCKLQDQ Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x6C /r"/"RVM"
{
ND_INS_VPUNPCKLQDQ, ND_CAT_AVX, ND_SET_AVX, 1431,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2387 Instruction:"VPUNPCKLWD Vn{K}{z},aKq,Hn,Wn" Encoding:"evex m:1 p:1 l:x w:x 0x61 /r"/"RAVM"
{
ND_INS_VPUNPCKLWD, ND_CAT_AVX512, ND_SET_AVX512BW, 1432,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_FVM, ND_EXT_E4NFnb, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512BW,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, 0, 0),
},
// Pos:2388 Instruction:"VPUNPCKLWD Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x61 /r"/"RVM"
{
ND_INS_VPUNPCKLWD, ND_CAT_AVX, ND_SET_AVX, 1432,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2389 Instruction:"VPXOR Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0xEF /r"/"RVM"
{
ND_INS_VPXOR, ND_CAT_LOGICAL, ND_SET_AVX, 1433,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2390 Instruction:"VPXORD Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:1 p:1 l:x w:0 0xEF /r"/"RAVM"
{
ND_INS_VPXORD, ND_CAT_LOGICAL, ND_SET_AVX512F, 1434,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2391 Instruction:"VPXORQ Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:1 p:1 l:x w:1 0xEF /r"/"RAVM"
{
ND_INS_VPXORQ, ND_CAT_LOGICAL, ND_SET_AVX512F, 1435,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2392 Instruction:"VRANGEPD Vn{K}{z},aKq,Hn,Wn|B64{sae},Ib" Encoding:"evex m:3 p:1 l:x w:1 0x50 /r ib"/"RAVMI"
{
ND_INS_VRANGEPD, ND_CAT_AVX512, ND_SET_AVX512DQ, 1436,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2393 Instruction:"VRANGEPS Vn{K}{z},aKq,Hn,Wn|B32{sae},Ib" Encoding:"evex m:3 p:1 l:x w:0 0x50 /r ib"/"RAVMI"
{
ND_INS_VRANGEPS, ND_CAT_AVX512, ND_SET_AVX512DQ, 1437,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2394 Instruction:"VRANGESD Vdq{K}{z},aKq,Hdq,Wsd{sae},Ib" Encoding:"evex m:3 p:1 l:i w:1 0x51 /r ib"/"RAVMI"
{
ND_INS_VRANGESD, ND_CAT_AVX512, ND_SET_AVX512DQ, 1438,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(5, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_SAE, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2395 Instruction:"VRANGESS Vdq{K}{z},aKq,Hdq,Wss{sae},Ib" Encoding:"evex m:3 p:1 l:i w:0 0x51 /r ib"/"RAVMI"
{
ND_INS_VRANGESS, ND_CAT_AVX512, ND_SET_AVX512DQ, 1439,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(5, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_SAE, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2396 Instruction:"VRCP14PD Vn{K}{z},aKq,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x4C /r"/"RAM"
{
ND_INS_VRCP14PD, ND_CAT_AVX512, ND_SET_AVX512F, 1440,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2397 Instruction:"VRCP14PS Vn{K}{z},aKq,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x4C /r"/"RAM"
{
ND_INS_VRCP14PS, ND_CAT_AVX512, ND_SET_AVX512F, 1441,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2398 Instruction:"VRCP14SD Vdq{K}{z},aKq,Hdq,Wsd" Encoding:"evex m:2 p:1 l:x w:1 0x4D /r"/"RAVM"
{
ND_INS_VRCP14SD, ND_CAT_AVX512, ND_SET_AVX512F, 1442,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E10, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:2399 Instruction:"VRCP14SS Vdq{K}{z},aKq,Hdq,Wss" Encoding:"evex m:2 p:1 l:x w:0 0x4D /r"/"RAVM"
{
ND_INS_VRCP14SS, ND_CAT_AVX512, ND_SET_AVX512F, 1443,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E10, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:2400 Instruction:"VRCP28PD Voq{K}{z},aKq,Woq|B64{sae}" Encoding:"evex m:2 p:1 l:2 w:1 0xCA /r"/"RAM"
{
ND_INS_VRCP28PD, ND_CAT_KNL, ND_SET_AVX512ER, 1444,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512ER,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_oq, ND_OPF_R, ND_OPD_SAE|ND_OPD_B64, 0),
},
// Pos:2401 Instruction:"VRCP28PS Voq{K}{z},aKq,Woq|B32{sae}" Encoding:"evex m:2 p:1 l:2 w:0 0xCA /r"/"RAM"
{
ND_INS_VRCP28PS, ND_CAT_KNL, ND_SET_AVX512ER, 1445,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512ER,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_oq, ND_OPF_R, ND_OPD_SAE|ND_OPD_B32, 0),
},
// Pos:2402 Instruction:"VRCP28SD Vdq{K}{z},aKq,Hdq,Wsd{sae}" Encoding:"evex m:2 p:1 l:i w:1 0xCB /r"/"RAVM"
{
ND_INS_VRCP28SD, ND_CAT_KNL, ND_SET_AVX512ER, 1446,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512ER,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_SAE, 0),
},
// Pos:2403 Instruction:"VRCP28SS Vdq{K}{z},aKq,Hdq,Wss{sae}" Encoding:"evex m:2 p:1 l:i w:0 0xCB /r"/"RAVM"
{
ND_INS_VRCP28SS, ND_CAT_KNL, ND_SET_AVX512ER, 1447,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512ER,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_SAE, 0),
},
// Pos:2404 Instruction:"VRCPPS Vps,Wps" Encoding:"vex m:1 p:0 l:x w:i 0x53 /r"/"RM"
{
ND_INS_VRCPPS, ND_CAT_AVX, ND_SET_AVX, 1448,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:2405 Instruction:"VRCPSS Vss,Hss,Wss" Encoding:"vex m:1 p:2 l:i w:i 0x53 /r"/"RVM"
{
ND_INS_VRCPSS, ND_CAT_AVX, ND_SET_AVX, 1449,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:2406 Instruction:"VREDUCEPD Vn{K}{z},aKq,Wn|B64{sae},Ib" Encoding:"evex m:3 p:1 l:x w:1 0x56 /r ib"/"RAMI"
{
ND_INS_VREDUCEPD, ND_CAT_AVX512, ND_SET_AVX512DQ, 1450,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2407 Instruction:"VREDUCEPS Vn{K}{z},aKq,Wn|B32{sae},Ib" Encoding:"evex m:3 p:1 l:x w:0 0x56 /r ib"/"RAMI"
{
ND_INS_VREDUCEPS, ND_CAT_AVX512, ND_SET_AVX512DQ, 1451,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2408 Instruction:"VREDUCESD Vdq{K}{z},aKq,Hdq,Wsd{sae},Ib" Encoding:"evex m:3 p:1 l:i w:1 0x57 /r ib"/"RAVMI"
{
ND_INS_VREDUCESD, ND_CAT_AVX512, ND_SET_AVX512DQ, 1452,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(5, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_SAE, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2409 Instruction:"VREDUCESS Vdq{K}{z},aKq,Hdq,Wss{sae},Ib" Encoding:"evex m:3 p:1 l:i w:0 0x57 /r ib"/"RAVMI"
{
ND_INS_VREDUCESS, ND_CAT_AVX512, ND_SET_AVX512DQ, 1453,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(5, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_SAE, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2410 Instruction:"VRNDSCALEPD Vn{K}{z},aKq,Wn|B64{sae},Ib" Encoding:"evex m:3 p:1 l:x w:1 0x09 /r ib"/"RAMI"
{
ND_INS_VRNDSCALEPD, ND_CAT_AVX512, ND_SET_AVX512F, 1454,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2411 Instruction:"VRNDSCALEPS Vn{K}{z},aKq,Wn|B32{sae},Ib" Encoding:"evex m:3 p:1 l:x w:0 0x08 /r ib"/"RAMI"
{
ND_INS_VRNDSCALEPS, ND_CAT_AVX512, ND_SET_AVX512F, 1455,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_SAE|ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2412 Instruction:"VRNDSCALESD Vdq{K}{z},aKq,Hdq,Wsd{sae},Ib" Encoding:"evex m:3 p:1 l:i w:1 0x0B /r ib"/"RAVMI"
{
ND_INS_VRNDSCALESD, ND_CAT_AVX512, ND_SET_AVX512F, 1456,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(5, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_SAE, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2413 Instruction:"VRNDSCALESS Vdq{K}{z},aKq,Hdq,Wss{sae},Ib" Encoding:"evex m:3 p:1 l:i w:0 0x0A /r ib"/"RAVMI"
{
ND_INS_VRNDSCALESS, ND_CAT_AVX512, ND_SET_AVX512F, 1457,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(5, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_SAE, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2414 Instruction:"VROUNDPD Vx,Wx,Ib" Encoding:"vex m:3 p:1 l:x w:i 0x09 /r ib"/"RMI"
{
ND_INS_VROUNDPD, ND_CAT_AVX, ND_SET_AVX, 1458,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2415 Instruction:"VROUNDPS Vx,Wx,Ib" Encoding:"vex m:3 p:1 l:x w:i 0x08 /r ib"/"RMI"
{
ND_INS_VROUNDPS, ND_CAT_AVX, ND_SET_AVX, 1459,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2416 Instruction:"VROUNDSD Vsd,Hsd,Wsd,Ib" Encoding:"vex m:3 p:1 l:i w:i 0x0B /r ib"/"RVMI"
{
ND_INS_VROUNDSD, ND_CAT_AVX, ND_SET_AVX, 1460,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2417 Instruction:"VROUNDSS Vss,Hss,Wss,Ib" Encoding:"vex m:3 p:1 l:i w:i 0x0A /r ib"/"RVMI"
{
ND_INS_VROUNDSS, ND_CAT_AVX, ND_SET_AVX, 1461,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2418 Instruction:"VRSQRT14PD Vn{K}{z},aKq,Wn|B64" Encoding:"evex m:2 p:1 l:x w:1 0x4E /r"/"RAM"
{
ND_INS_VRSQRT14PD, ND_CAT_AVX512, ND_SET_AVX512F, 1462,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2419 Instruction:"VRSQRT14PS Vn{K}{z},aKq,Wn|B32" Encoding:"evex m:2 p:1 l:x w:0 0x4E /r"/"RAM"
{
ND_INS_VRSQRT14PS, ND_CAT_AVX512, ND_SET_AVX512F, 1463,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2420 Instruction:"VRSQRT14SD Vdq{K}{z},aKq,Hdq,Wsd" Encoding:"evex m:2 p:1 l:x w:1 0x4F /r"/"RAVM"
{
ND_INS_VRSQRT14SD, ND_CAT_AVX512, ND_SET_AVX512F, 1464,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E10, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:2421 Instruction:"VRSQRT14SS Vdq{K}{z},aKq,Hdq,Wss" Encoding:"evex m:2 p:1 l:x w:0 0x4F /r"/"RAVM"
{
ND_INS_VRSQRT14SS, ND_CAT_AVX512, ND_SET_AVX512F, 1465,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E10, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:2422 Instruction:"VRSQRT28PD Voq{K}{z},aKq,Woq|B64{sae}" Encoding:"evex m:2 p:1 l:2 w:1 0xCC /r"/"RAM"
{
ND_INS_VRSQRT28PD, ND_CAT_KNL, ND_SET_AVX512ER, 1466,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512ER,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_oq, ND_OPF_R, ND_OPD_SAE|ND_OPD_B64, 0),
},
// Pos:2423 Instruction:"VRSQRT28PS Voq{K}{z},aKq,Woq|B32{sae}" Encoding:"evex m:2 p:1 l:2 w:0 0xCC /r"/"RAM"
{
ND_INS_VRSQRT28PS, ND_CAT_KNL, ND_SET_AVX512ER, 1467,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512ER,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_oq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_oq, ND_OPF_R, ND_OPD_SAE|ND_OPD_B32, 0),
},
// Pos:2424 Instruction:"VRSQRT28SD Vdq{K}{z},aKq,Hdq,Wsd{sae}" Encoding:"evex m:2 p:1 l:i w:1 0xCD /r"/"RAVM"
{
ND_INS_VRSQRT28SD, ND_CAT_KNL, ND_SET_AVX512ER, 1468,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512ER,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_SAE, 0),
},
// Pos:2425 Instruction:"VRSQRT28SS Vdq{K}{z},aKq,Hdq,Wss{sae}" Encoding:"evex m:2 p:1 l:i w:0 0xCD /r"/"RAVM"
{
ND_INS_VRSQRT28SS, ND_CAT_KNL, ND_SET_AVX512ER, 1469,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_SAE, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512ER,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_SAE, 0),
},
// Pos:2426 Instruction:"VRSQRTPS Vx,Wx" Encoding:"vex m:1 p:0 l:x w:i 0x52 /r"/"RM"
{
ND_INS_VRSQRTPS, ND_CAT_AVX, ND_SET_AVX, 1470,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2427 Instruction:"VRSQRTSS Vss,Hss,Wss" Encoding:"vex m:1 p:2 l:i w:i 0x52 /r"/"RVM"
{
ND_INS_VRSQRTSS, ND_CAT_AVX, ND_SET_AVX, 1471,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:2428 Instruction:"VSCALEFPD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:2 p:1 l:x w:1 0x2C /r"/"RAVM"
{
ND_INS_VSCALEFPD, ND_CAT_AVX512, ND_SET_AVX512F, 1472,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:2429 Instruction:"VSCALEFPS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:2 p:1 l:x w:0 0x2C /r"/"RAVM"
{
ND_INS_VSCALEFPS, ND_CAT_AVX512, ND_SET_AVX512F, 1473,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:2430 Instruction:"VSCALEFSD Vsd{K}{z},aKq,Hsd,Wsd{er}" Encoding:"evex m:2 p:1 l:i w:1 0x2D /r"/"RAVM"
{
ND_INS_VSCALEFSD, ND_CAT_AVX512, ND_SET_AVX512F, 1474,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:2431 Instruction:"VSCALEFSS Vss{K}{z},aKq,Hss,Wss{er}" Encoding:"evex m:2 p:1 l:i w:0 0x2D /r"/"RAVM"
{
ND_INS_VSCALEFSS, ND_CAT_AVX512, ND_SET_AVX512F, 1475,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:2432 Instruction:"VSCATTERDPD Mvm32h{K},aKq,Vn" Encoding:"evex m:2 p:1 l:x w:1 0xA2 /r:mem vsib"/"MAR"
{
ND_INS_VSCATTERDPD, ND_CAT_SCATTER, ND_SET_AVX512F, 1476,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E12, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm32h, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, 0, 0),
},
// Pos:2433 Instruction:"VSCATTERDPS Mvm32n{K},aKq,Vn" Encoding:"evex m:2 p:1 l:x w:0 0xA2 /r:mem vsib"/"MAR"
{
ND_INS_VSCATTERDPS, ND_CAT_SCATTER, ND_SET_AVX512F, 1477,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E12, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm32n, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, 0, 0),
},
// Pos:2434 Instruction:"VSCATTERPF0DPD Mvm32h{K},aKq" Encoding:"evex m:2 p:1 l:2 w:1 0xC6 /5:mem vsib"/"MA"
{
ND_INS_VSCATTERPF0DPD, ND_CAT_SCATTER, ND_SET_AVX512PF, 1478,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E12NP, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB, ND_CFF_AVX512PF,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm32h, ND_OPF_R, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2435 Instruction:"VSCATTERPF0DPS Mvm32n{K},aKq" Encoding:"evex m:2 p:1 l:2 w:0 0xC6 /5:mem vsib"/"MA"
{
ND_INS_VSCATTERPF0DPS, ND_CAT_SCATTER, ND_SET_AVX512PF, 1479,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E12NP, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB, ND_CFF_AVX512PF,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm32n, ND_OPF_R, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2436 Instruction:"VSCATTERPF0QPD Mvm64n{K},aKq" Encoding:"evex m:2 p:1 l:2 w:1 0xC7 /5:mem vsib"/"MA"
{
ND_INS_VSCATTERPF0QPD, ND_CAT_SCATTER, ND_SET_AVX512PF, 1480,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E12NP, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB, ND_CFF_AVX512PF,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_R, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2437 Instruction:"VSCATTERPF0QPS Mvm64n{K},aKq" Encoding:"evex m:2 p:1 l:2 w:0 0xC7 /5:mem vsib"/"MA"
{
ND_INS_VSCATTERPF0QPS, ND_CAT_SCATTER, ND_SET_AVX512PF, 1481,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E12NP, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB, ND_CFF_AVX512PF,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_R, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2438 Instruction:"VSCATTERPF1DPD Mvm32h{K},aKq" Encoding:"evex m:2 p:1 l:2 w:1 0xC6 /6:mem vsib"/"MA"
{
ND_INS_VSCATTERPF1DPD, ND_CAT_SCATTER, ND_SET_AVX512PF, 1482,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E12NP, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB, ND_CFF_AVX512PF,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm32h, ND_OPF_R, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2439 Instruction:"VSCATTERPF1DPS Mvm32n{K},aKq" Encoding:"evex m:2 p:1 l:2 w:0 0xC6 /6:mem vsib"/"MA"
{
ND_INS_VSCATTERPF1DPS, ND_CAT_SCATTER, ND_SET_AVX512PF, 1483,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E12NP, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB, ND_CFF_AVX512PF,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm32n, ND_OPF_R, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2440 Instruction:"VSCATTERPF1QPD Mvm64n{K},aKq" Encoding:"evex m:2 p:1 l:2 w:1 0xC7 /6:mem vsib"/"MA"
{
ND_INS_VSCATTERPF1QPD, ND_CAT_SCATTER, ND_SET_AVX512PF, 1484,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E12NP, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB, ND_CFF_AVX512PF,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_R, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2441 Instruction:"VSCATTERPF1QPS Mvm64n{K},aKq" Encoding:"evex m:2 p:1 l:2 w:0 0xC7 /6:mem vsib"/"MA"
{
ND_INS_VSCATTERPF1QPS, ND_CAT_SCATTER, ND_SET_AVX512PF, 1485,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(2, 0), ND_TUPLE_T1S, ND_EXT_E12NP, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB, ND_CFF_AVX512PF,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_R, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
},
// Pos:2442 Instruction:"VSCATTERQPD Mvm64n{K},aKq,Vn" Encoding:"evex m:2 p:1 l:x w:1 0xA3 /r:mem vsib"/"MAR"
{
ND_INS_VSCATTERQPD, ND_CAT_SCATTER, ND_SET_AVX512F, 1486,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E12, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_n, ND_OPF_RW, 0, 0),
},
// Pos:2443 Instruction:"VSCATTERQPS Mvm64n{K},aKq,Vh" Encoding:"evex m:2 p:1 l:x w:0 0xA3 /r:mem vsib"/"MAR"
{
ND_INS_VSCATTERQPS, ND_CAT_SCATTER, ND_SET_AVX512F, 1487,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK, ND_OPS_CNT(3, 0), ND_TUPLE_T1S, ND_EXT_E12, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MMASK|ND_FLAG_MODRM|ND_FLAG_VSIB|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_vm64n, ND_OPF_W, ND_OPD_MASK, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_V, ND_OPS_h, ND_OPF_RW, 0, 0),
},
// Pos:2444 Instruction:"VSHUFF32X4 Vu{K}{z},aKq,Hu,Wu|B32,Ib" Encoding:"evex m:3 p:1 l:x w:0 0x23 /r ib"/"RAVMI"
{
ND_INS_VSHUFF32X4, ND_CAT_AVX512, ND_SET_AVX512F, 1488,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_u, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_u, ND_OPF_R, ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2445 Instruction:"VSHUFF64X2 Vu{K}{z},aKq,Hu,Wu|B64,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x23 /r ib"/"RAVMI"
{
ND_INS_VSHUFF64X2, ND_CAT_AVX512, ND_SET_AVX512F, 1489,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_u, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_u, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2446 Instruction:"VSHUFI32X4 Vu{K}{z},aKq,Hu,Wu|B32,Ib" Encoding:"evex m:3 p:1 l:x w:0 0x43 /r ib"/"RAVMI"
{
ND_INS_VSHUFI32X4, ND_CAT_AVX512, ND_SET_AVX512F, 1490,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_u, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_u, ND_OPF_R, ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2447 Instruction:"VSHUFI64X2 Vu{K}{z},aKq,Hu,Wu|B64,Ib" Encoding:"evex m:3 p:1 l:x w:1 0x43 /r ib"/"RAVMI"
{
ND_INS_VSHUFI64X2, ND_CAT_AVX512, ND_SET_AVX512F, 1491,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_NOL0|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_u, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_u, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_u, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2448 Instruction:"VSHUFPD Vn{K}{z},aKq,Hn,Wn|B64,Ib" Encoding:"evex m:1 p:1 l:x w:1 0xC6 /r ib"/"RAVMI"
{
ND_INS_VSHUFPD, ND_CAT_AVX512, ND_SET_AVX512F, 1492,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2449 Instruction:"VSHUFPD Vpd,Hpd,Wpd,Ib" Encoding:"vex m:1 p:1 l:x w:i 0xC6 /r ib"/"RVMI"
{
ND_INS_VSHUFPD, ND_CAT_AVX, ND_SET_AVX, 1492,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_pd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2450 Instruction:"VSHUFPS Vn{K}{z},aKq,Hn,Wn|B32,Ib" Encoding:"evex m:1 p:0 l:x w:0 0xC6 /r ib"/"RAVMI"
{
ND_INS_VSHUFPS, ND_CAT_AVX512, ND_SET_AVX512F, 1493,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(5, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2451 Instruction:"VSHUFPS Vps,Hps,Wps,Ib" Encoding:"vex m:1 p:0 l:x w:i 0xC6 /r ib"/"RVMI"
{
ND_INS_VSHUFPS, ND_CAT_AVX, ND_SET_AVX, 1493,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(4, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ps, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
},
// Pos:2452 Instruction:"VSQRTPD Vn{K}{z},aKq,Wn|B64{er}" Encoding:"evex m:1 p:1 l:x w:1 0x51 /r"/"RAM"
{
ND_INS_VSQRTPD, ND_CAT_AVX512, ND_SET_AVX512F, 1494,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:2453 Instruction:"VSQRTPD Vx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x51 /r"/"RM"
{
ND_INS_VSQRTPD, ND_CAT_AVX, ND_SET_AVX, 1494,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2454 Instruction:"VSQRTPS Vn{K}{z},aKq,Wn|B32{er}" Encoding:"evex m:1 p:0 l:x w:0 0x51 /r"/"RAM"
{
ND_INS_VSQRTPS, ND_CAT_AVX512, ND_SET_AVX512F, 1495,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(3, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:2455 Instruction:"VSQRTPS Vx,Wx" Encoding:"vex m:1 p:0 l:x w:i 0x51 /r"/"RM"
{
ND_INS_VSQRTPS, ND_CAT_AVX, ND_SET_AVX, 1495,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2456 Instruction:"VSQRTSD Vdq{K}{z},aKq,Hdq,Wsd{er}" Encoding:"evex m:1 p:3 l:i w:1 0x51 /r"/"RAVM"
{
ND_INS_VSQRTSD, ND_CAT_AVX512, ND_SET_AVX512F, 1496,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:2457 Instruction:"VSQRTSD Vsd,Hsd,Wsd" Encoding:"vex m:1 p:3 l:i w:i 0x51 /r"/"RVM"
{
ND_INS_VSQRTSD, ND_CAT_AVX, ND_SET_AVX, 1496,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:2458 Instruction:"VSQRTSS Vdq{K}{z},aKq,Hdq,Wss{er}" Encoding:"evex m:1 p:2 l:i w:0 0x51 /r"/"RAVM"
{
ND_INS_VSQRTSS, ND_CAT_AVX512, ND_SET_AVX512F, 1497,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:2459 Instruction:"VSQRTSS Vss,Hss,Wss" Encoding:"vex m:1 p:2 l:i w:i 0x51 /r"/"RVM"
{
ND_INS_VSQRTSS, ND_CAT_AVX, ND_SET_AVX, 1497,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:2460 Instruction:"VSTMXCSR Md" Encoding:"vex m:1 p:0 0xAE /3:mem"/"M"
{
ND_INS_VSTMXCSR, ND_CAT_AVX, ND_SET_AVX, 1498,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(1, 1), 0, ND_EXT_5, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_d, ND_OPF_W, 0, 0),
OP(ND_OPT_MXCSR, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:2461 Instruction:"VSUBPD Vn{K}{z},aKq,Hn,Wn|B64{er}" Encoding:"evex m:1 p:1 l:x w:1 0x5C /r"/"RAVM"
{
ND_INS_VSUBPD, ND_CAT_AVX512, ND_SET_AVX512F, 1499,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B64, 0),
},
// Pos:2462 Instruction:"VSUBPD Vpd,Hpd,Wpd" Encoding:"vex m:1 p:1 l:x w:i 0x5C /r"/"RVM"
{
ND_INS_VSUBPD, ND_CAT_AVX, ND_SET_AVX, 1499,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_pd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:2463 Instruction:"VSUBPS Vn{K}{z},aKq,Hn,Wn|B32{er}" Encoding:"evex m:1 p:0 l:x w:0 0x5C /r"/"RAVM"
{
ND_INS_VSUBPS, ND_CAT_AVX512, ND_SET_AVX512F, 1500,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E2, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_ER|ND_OPD_B32, 0),
},
// Pos:2464 Instruction:"VSUBPS Vps,Hps,Wps" Encoding:"vex m:1 p:0 l:x w:i 0x5C /r"/"RVM"
{
ND_INS_VSUBPS, ND_CAT_AVX, ND_SET_AVX, 1500,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ps, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:2465 Instruction:"VSUBSD Vdq{K}{z},aKq,Hdq,Wsd{er}" Encoding:"evex m:1 p:3 l:i w:1 0x5C /r"/"RAVM"
{
ND_INS_VSUBSD, ND_CAT_AVX512, ND_SET_AVX512F, 1501,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:2466 Instruction:"VSUBSD Vsd,Hsd,Wsd" Encoding:"vex m:1 p:3 l:i w:i 0x5C /r"/"RVM"
{
ND_INS_VSUBSD, ND_CAT_AVX, ND_SET_AVX, 1501,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
},
// Pos:2467 Instruction:"VSUBSS Vdq{K}{z},aKq,Hdq,Wss{er}" Encoding:"evex m:1 p:2 l:i w:0 0x5C /r"/"RAVM"
{
ND_INS_VSUBSS, ND_CAT_AVX512, ND_SET_AVX512F, 1502,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_ER, ND_OPS_CNT(4, 0), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_ER, 0),
},
// Pos:2468 Instruction:"VSUBSS Vss,Hss,Wss" Encoding:"vex m:1 p:2 l:i w:i 0x5C /r"/"RVM"
{
ND_INS_VSUBSS, ND_CAT_AVX, ND_SET_AVX, 1502,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_2, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
},
// Pos:2469 Instruction:"VTESTPD Vx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0x0F /r"/"RM"
{
ND_INS_VTESTPD, ND_CAT_LOGICAL_FP, ND_SET_AVX, 1503,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2470 Instruction:"VTESTPS Vx,Wx" Encoding:"vex m:2 p:1 l:x w:0 0x0E /r"/"RM"
{
ND_INS_VTESTPS, ND_CAT_LOGICAL_FP, ND_SET_AVX, 1504,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0|REG_RFLAG_CF|REG_RFLAG_ZF,
0,
0|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2471 Instruction:"VUCOMISD Vdq,Wsd{sae}" Encoding:"evex m:1 p:1 l:i w:1 0x2E /r"/"RM"
{
ND_INS_VUCOMISD, ND_CAT_AVX512, ND_SET_AVX512F, 1505,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_SAE, ND_OPS_CNT(2, 1), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, ND_OPD_SAE, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2472 Instruction:"VUCOMISD Vsd,Wsd" Encoding:"vex m:1 p:1 l:i w:i 0x2E /r"/"RM"
{
ND_INS_VUCOMISD, ND_CAT_AVX, ND_SET_AVX, 1505,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_V, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_sd, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2473 Instruction:"VUCOMISS Vdq,Wss{sae}" Encoding:"evex m:1 p:0 l:i w:0 0x2E /r"/"RM"
{
ND_INS_VUCOMISS, ND_CAT_AVX512, ND_SET_AVX512F, 1506,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_SAE, ND_OPS_CNT(2, 1), ND_TUPLE_T1S, ND_EXT_E3, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_V, ND_OPS_dq, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, ND_OPD_SAE, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2474 Instruction:"VUCOMISS Vss,Wss" Encoding:"vex m:1 p:0 l:i w:i 0x2E /r"/"RM"
{
ND_INS_VUCOMISS, ND_CAT_AVX, ND_SET_AVX, 1506,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(2, 1), 0, ND_EXT_3, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_LIG|ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_ZF,
0,
0,
OP(ND_OPT_V, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ss, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2475 Instruction:"VUNPCKHPD Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:1 p:1 l:x w:1 0x15 /r"/"RAVM"
{
ND_INS_VUNPCKHPD, ND_CAT_AVX512, ND_SET_AVX512F, 1507,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2476 Instruction:"VUNPCKHPD Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x15 /r"/"RVM"
{
ND_INS_VUNPCKHPD, ND_CAT_AVX, ND_SET_AVX, 1507,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2477 Instruction:"VUNPCKHPS Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:1 p:0 l:x w:0 0x15 /r"/"RAVM"
{
ND_INS_VUNPCKHPS, ND_CAT_AVX512, ND_SET_AVX512F, 1508,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2478 Instruction:"VUNPCKHPS Vx,Hx,Wx" Encoding:"vex m:1 p:0 l:x w:i 0x15 /r"/"RVM"
{
ND_INS_VUNPCKHPS, ND_CAT_AVX, ND_SET_AVX, 1508,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2479 Instruction:"VUNPCKLPD Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:1 p:1 l:x w:1 0x14 /r"/"RAVM"
{
ND_INS_VUNPCKLPD, ND_CAT_AVX512, ND_SET_AVX512F, 1509,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2480 Instruction:"VUNPCKLPD Vx,Hx,Wx" Encoding:"vex m:1 p:1 l:x w:i 0x14 /r"/"RVM"
{
ND_INS_VUNPCKLPD, ND_CAT_AVX, ND_SET_AVX, 1509,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2481 Instruction:"VUNPCKLPS Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:1 p:0 l:x w:0 0x14 /r"/"RAVM"
{
ND_INS_VUNPCKLPS, ND_CAT_AVX512, ND_SET_AVX512F, 1510,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4NF, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512F,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2482 Instruction:"VUNPCKLPS Vx,Hx,Wx" Encoding:"vex m:1 p:0 l:x w:i 0x14 /r"/"RVM"
{
ND_INS_VUNPCKLPS, ND_CAT_AVX, ND_SET_AVX, 1510,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_x, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_x, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_x, ND_OPF_R, 0, 0),
},
// Pos:2483 Instruction:"VXORPD Vn{K}{z},aKq,Hn,Wn|B64" Encoding:"evex m:1 p:1 l:x w:1 0x57 /r"/"RAVM"
{
ND_INS_VXORPD, ND_CAT_LOGICAL_FP, ND_SET_AVX512DQ, 1511,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B64, 0),
},
// Pos:2484 Instruction:"VXORPD Vpd,Hpd,Wpd" Encoding:"vex m:1 p:1 l:x w:i 0x57 /r"/"RVM"
{
ND_INS_VXORPD, ND_CAT_LOGICAL_FP, ND_SET_AVX, 1511,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_pd, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:2485 Instruction:"VXORPS Vn{K}{z},aKq,Hn,Wn|B32" Encoding:"evex m:1 p:0 l:x w:0 0x57 /r"/"RAVM"
{
ND_INS_VXORPS, ND_CAT_LOGICAL_FP, ND_SET_AVX512DQ, 1512,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, ND_DECO_MASK|ND_DECO_ZERO|ND_DECO_BROADCAST, ND_OPS_CNT(4, 0), ND_TUPLE_FV, ND_EXT_E4, ND_EXC_EVEX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX512DQ,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_n, ND_OPF_W, ND_OPD_MASK|ND_OPD_Z, 0),
OP(ND_OPT_aK, ND_OPS_q, ND_OPF_R, 0, 0),
OP(ND_OPT_H, ND_OPS_n, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_n, ND_OPF_R, ND_OPD_B32, 0),
},
// Pos:2486 Instruction:"VXORPS Vps,Hps,Wps" Encoding:"vex m:1 p:0 l:x w:i 0x57 /r"/"RVM"
{
ND_INS_VXORPS, ND_CAT_LOGICAL_FP, ND_SET_AVX, 1512,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(3, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_WIG|ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_W, 0, 0),
OP(ND_OPT_H, ND_OPS_ps, ND_OPF_R, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:2487 Instruction:"VZEROALL" Encoding:"vex m:1 p:0 l:1 0x77"/""
{
ND_INS_VZEROALL, ND_CAT_AVX, ND_SET_AVX, 1513,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(0, 1), 0, ND_EXT_8, ND_EXC_SSE_AVX, 0, 0, 0, 0, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2488 Instruction:"VZEROUPPER" Encoding:"vex m:1 p:0 l:0 0x77"/""
{
ND_INS_VZEROUPPER, ND_CAT_AVX, ND_SET_AVX, 1514,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_SMM|ND_MOD_SGX|ND_MOD_TSX|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO,
0, 0, ND_OPS_CNT(0, 1), 0, ND_EXT_8, ND_EXC_SSE_AVX, 0, 0, 0, 0, ND_CFF_AVX,
0,
0,
0,
0,
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2489 Instruction:"WAIT" Encoding:"0x9B"/""
{
ND_INS_WAIT, ND_CAT_X87_ALU, ND_SET_X87, 1515,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0xff, 0, 0, 0, 0,
0,
0,
0,
0,
},
// Pos:2490 Instruction:"WBINVD" Encoding:"NP 0x0F 0x09"/""
{
ND_INS_WBINVD, ND_CAT_SYSTEM, ND_SET_I486REAL, 1516,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL, 0,
0,
0,
0,
0,
},
// Pos:2491 Instruction:"WBNOINVD" Encoding:"0xF3 0x0F 0x09"/""
{
ND_INS_WBNOINVD, ND_CAT_WBNOINVD, ND_SET_WBNOINVD, 1517,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, 0, ND_CFF_WBNOINVD,
0,
0,
0,
0,
},
// Pos:2492 Instruction:"WRFSBASE Ry" Encoding:"o64 0xF3 0x0F 0xAE /2:reg"/"M"
{
ND_INS_WRFSBASE, ND_CAT_RDWRFSGS, ND_SET_RDWRFSGS, 1518,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_O64, ND_CFF_RDWRFSGS,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_MSR_FSBASE, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2493 Instruction:"WRGSBASE Ry" Encoding:"o64 0xF3 0x0F 0xAE /3:reg"/"M"
{
ND_INS_WRGSBASE, ND_CAT_RDWRFSGS, ND_SET_RDWRFSGS, 1519,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_O64, ND_CFF_RDWRFSGS,
0,
0,
0,
0,
OP(ND_OPT_R, ND_OPS_y, ND_OPF_R, 0, 0),
OP(ND_OPT_MSR_GSBASE, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2494 Instruction:"WRMSR" Encoding:"0x0F 0x30"/""
{
ND_INS_WRMSR, ND_CAT_SYSTEM, ND_SET_PENTIUMREAL, 1520,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_SERIAL, ND_CFF_MSR,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_MSR, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2495 Instruction:"WRPKRU" Encoding:"NP 0x0F 0x01 /0xEF"/""
{
ND_INS_WRPKRU, ND_CAT_MISC, ND_SET_PKU, 1521,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_PKU,
0,
0,
0,
0,
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_PKRU, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2496 Instruction:"WRSHR Ed" Encoding:"cyrix 0x0F 0x37 /r"/"M"
{
ND_INS_WRSHR, ND_CAT_SYSTEM, ND_SET_CYRIX, 1522,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_d, ND_OPF_W, 0, 0),
},
// Pos:2497 Instruction:"WRSSD My,Gy" Encoding:"NP 0x0F 0x38 0xF6 /r:mem"/"MR"
{
ND_INS_WRSS, ND_CAT_CET, ND_SET_CET, 1523,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_SHS|ND_FLAG_MODRM, ND_CFF_CET,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_G, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:2498 Instruction:"WRSSQ My,Gy" Encoding:"rexw NP 0x0F 0x38 0xF6 /r:mem"/"MR"
{
ND_INS_WRSS, ND_CAT_CET, ND_SET_CET, 1524,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_SHS|ND_FLAG_MODRM, ND_CFF_CET,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_G, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:2499 Instruction:"WRUSSD My,Gy" Encoding:"0x66 0x0F 0x38 0xF5 /r:mem"/"MR"
{
ND_INS_WRUSS, ND_CAT_CET, ND_SET_CET, 1525,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_SHS|ND_FLAG_MODRM, ND_CFF_CET,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_G, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:2500 Instruction:"WRUSSQ My,Gy" Encoding:"rexw 0x66 0x0F 0x38 0xF5 /r:mem"/"MR"
{
ND_INS_WRUSS, ND_CAT_CET, ND_SET_CET, 1526,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_SHS|ND_FLAG_MODRM, ND_CFF_CET,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_y, ND_OPF_W, 0, 0),
OP(ND_OPT_G, ND_OPS_y, ND_OPF_R, 0, 0),
},
// Pos:2501 Instruction:"XABORT Ib" Encoding:"0xC6 /0xF8 ib"/"I"
{
ND_INS_XABORT, ND_CAT_UNCOND_BR, ND_SET_TSX, 1527,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX,
0, 0, ND_OPS_CNT(1, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_RTM,
0,
0,
0,
0,
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_RCW, 0, 0),
},
// Pos:2502 Instruction:"XADD Eb,Gb" Encoding:"0x0F 0xC0 /r"/"MR"
{
ND_INS_XADD, ND_CAT_SEMAPHORE, ND_SET_I486REAL, 1528,
ND_MOD_ANY,
ND_PREF_LOCK|ND_PREF_HLE, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2503 Instruction:"XADD Ev,Gv" Encoding:"0x0F 0xC1 /r"/"MR"
{
ND_INS_XADD, ND_CAT_SEMAPHORE, ND_SET_I486REAL, 1528,
ND_MOD_ANY,
ND_PREF_LOCK|ND_PREF_HLE, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_ZF|REG_RFLAG_SF|REG_RFLAG_OF,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2504 Instruction:"XBEGIN Jz" Encoding:"0xC7 /0xF8 cz"/"D"
{
ND_INS_XBEGIN, ND_CAT_COND_BR, ND_SET_TSX, 1529,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 2), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_RTM,
0,
0,
0,
0,
OP(ND_OPT_J, ND_OPS_z, ND_OPF_R, 0, 0),
OP(ND_OPT_RIP, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_RW, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_CW, 0, 0),
},
// Pos:2505 Instruction:"XCHG Eb,Gb" Encoding:"0x86 /r"/"MR"
{
ND_INS_XCHG, ND_CAT_DATAXFER, ND_SET_I86, 1530,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK|ND_PREF_HLE_WO_LOCK, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_b, ND_OPF_RW, 0, 0),
},
// Pos:2506 Instruction:"XCHG Ev,Gv" Encoding:"0x87 /r"/"MR"
{
ND_INS_XCHG, ND_CAT_DATAXFER, ND_SET_I86, 1530,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK|ND_PREF_HLE_WO_LOCK, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_RW, 0, 0),
},
// Pos:2507 Instruction:"XCHG rAX,Zv" Encoding:"rex 0x90"/"O"
{
ND_INS_XCHG, ND_CAT_DATAXFER, ND_SET_I86, 1530,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
},
// Pos:2508 Instruction:"XCHG rAX,Zv" Encoding:"0x91"/"O"
{
ND_INS_XCHG, ND_CAT_DATAXFER, ND_SET_I86, 1530,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
},
// Pos:2509 Instruction:"XCHG rAX,Zv" Encoding:"0x92"/"O"
{
ND_INS_XCHG, ND_CAT_DATAXFER, ND_SET_I86, 1530,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
},
// Pos:2510 Instruction:"XCHG rAX,Zv" Encoding:"0x93"/"O"
{
ND_INS_XCHG, ND_CAT_DATAXFER, ND_SET_I86, 1530,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
},
// Pos:2511 Instruction:"XCHG rAX,Zv" Encoding:"0x94"/"O"
{
ND_INS_XCHG, ND_CAT_DATAXFER, ND_SET_I86, 1530,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
},
// Pos:2512 Instruction:"XCHG rAX,Zv" Encoding:"0x95"/"O"
{
ND_INS_XCHG, ND_CAT_DATAXFER, ND_SET_I86, 1530,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
},
// Pos:2513 Instruction:"XCHG rAX,Zv" Encoding:"0x96"/"O"
{
ND_INS_XCHG, ND_CAT_DATAXFER, ND_SET_I86, 1530,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
},
// Pos:2514 Instruction:"XCHG rAX,Zv" Encoding:"0x97"/"O"
{
ND_INS_XCHG, ND_CAT_DATAXFER, ND_SET_I86, 1530,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_Z, ND_OPS_v, ND_OPF_RW, 0, 0),
},
// Pos:2515 Instruction:"XCRYPTCBC" Encoding:"0xF3 0x0F 0xA7 /0xD0"/""
{
ND_INS_XCRYPTCBC, ND_CAT_PADLOCK, ND_SET_CYRIX, 1531,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
},
// Pos:2516 Instruction:"XCRYPTCFB" Encoding:"0xF3 0x0F 0xA7 /0xE0"/""
{
ND_INS_XCRYPTCFB, ND_CAT_PADLOCK, ND_SET_CYRIX, 1532,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
},
// Pos:2517 Instruction:"XCRYPTCTR" Encoding:"0xF3 0x0F 0xA7 /0xD8"/""
{
ND_INS_XCRYPTCTR, ND_CAT_PADLOCK, ND_SET_CYRIX, 1533,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
},
// Pos:2518 Instruction:"XCRYPTECB" Encoding:"0xF3 0x0F 0xA7 /0xC8"/""
{
ND_INS_XCRYPTECB, ND_CAT_PADLOCK, ND_SET_CYRIX, 1534,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
},
// Pos:2519 Instruction:"XCRYPTOFB" Encoding:"0xF3 0x0F 0xA7 /0xE8"/""
{
ND_INS_XCRYPTOFB, ND_CAT_PADLOCK, ND_SET_CYRIX, 1535,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
},
// Pos:2520 Instruction:"XEND" Encoding:"NP 0x0F 0x01 /0xD5"/""
{
ND_INS_XEND, ND_CAT_COND_BR, ND_SET_TSX, 1536,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_RTM,
0,
0,
0,
0,
},
// Pos:2521 Instruction:"XGETBV" Encoding:"NP 0x0F 0x01 /0xD0"/""
{
ND_INS_XGETBV, ND_CAT_XSAVE, ND_SET_XSAVE, 1537,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_XSAVE,
0,
0,
0,
0,
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_XCR, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:2522 Instruction:"XLATB" Encoding:"0xD7"/""
{
ND_INS_XLATB, ND_CAT_MISC, ND_SET_I86, 1538,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 2), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0,
0,
0,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
OP(ND_OPT_MEM_rBX_AL, ND_OPS_b, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:2523 Instruction:"XOR Eb,Gb" Encoding:"0x30 /r"/"MR"
{
ND_INS_XOR, ND_CAT_LOGIC, ND_SET_I86, 1539,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2524 Instruction:"XOR Ev,Gv" Encoding:"0x31 /r"/"MR"
{
ND_INS_XOR, ND_CAT_LOGIC, ND_SET_I86, 1539,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_G, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2525 Instruction:"XOR Gb,Eb" Encoding:"0x32 /r"/"RM"
{
ND_INS_XOR, ND_CAT_LOGIC, ND_SET_I86, 1539,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_G, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2526 Instruction:"XOR Gv,Ev" Encoding:"0x33 /r"/"RM"
{
ND_INS_XOR, ND_CAT_LOGIC, ND_SET_I86, 1539,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_G, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_E, ND_OPS_v, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2527 Instruction:"XOR AL,Ib" Encoding:"0x34 ib"/"I"
{
ND_INS_XOR, ND_CAT_LOGIC, ND_SET_I86, 1539,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_GPR_rAX, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2528 Instruction:"XOR rAX,Iz" Encoding:"0x35 iz"/"I"
{
ND_INS_XOR, ND_CAT_LOGIC, ND_SET_I86, 1539,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, 0, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_GPR_rAX, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2529 Instruction:"XOR Eb,Ib" Encoding:"0x80 /6 ib"/"MI"
{
ND_INS_XOR, ND_CAT_LOGIC, ND_SET_I86, 1539,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_b, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2530 Instruction:"XOR Ev,Iz" Encoding:"0x81 /6 iz"/"MI"
{
ND_INS_XOR, ND_CAT_LOGIC, ND_SET_I86, 1539,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2531 Instruction:"XOR Ev,Iz" Encoding:"0x82 /6 iz"/"MI"
{
ND_INS_XOR, ND_CAT_LOGIC, ND_SET_I86, 1539,
ND_MOD_R0|ND_MOD_R1|ND_MOD_R2|ND_MOD_R3|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_SGX|ND_MOD_TSX,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_I64, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_z, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2532 Instruction:"XOR Ev,Ib" Encoding:"0x83 /6 ib"/"MI"
{
ND_INS_XOR, ND_CAT_LOGIC, ND_SET_I86, 1539,
ND_MOD_ANY,
ND_PREF_HLE|ND_PREF_LOCK, 0, ND_OPS_CNT(2, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0|REG_RFLAG_PF|REG_RFLAG_ZF|REG_RFLAG_SF,
0|REG_RFLAG_AF,
0|REG_RFLAG_CF|REG_RFLAG_OF|REG_RFLAG_AF,
OP(ND_OPT_E, ND_OPS_v, ND_OPF_RW, 0, 0),
OP(ND_OPT_I, ND_OPS_b, ND_OPF_SEX_OP1|ND_OPF_R, 0, 0),
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2533 Instruction:"XORPD Vpd,Wpd" Encoding:"0x66 0x0F 0x57 /r"/"RM"
{
ND_INS_XORPD, ND_CAT_LOGICAL_FP, ND_SET_SSE2, 1540,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE2,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_pd, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_pd, ND_OPF_R, 0, 0),
},
// Pos:2534 Instruction:"XORPS Vps,Wps" Encoding:"NP 0x0F 0x57 /r"/"RM"
{
ND_INS_XORPS, ND_CAT_LOGICAL_FP, ND_SET_SSE, 1541,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(2, 0), 0, ND_EXT_4, ND_EXC_SSE_AVX, 0, 0, 0, ND_FLAG_MODRM|ND_FLAG_VECTOR, ND_CFF_SSE,
0,
0,
0,
0,
OP(ND_OPT_V, ND_OPS_ps, ND_OPF_RW, 0, 0),
OP(ND_OPT_W, ND_OPS_ps, ND_OPF_R, 0, 0),
},
// Pos:2535 Instruction:"XRESLDTRK" Encoding:"0xF2 0x0F 0x01 /0xE9"/""
{
ND_INS_XRESLDTRK, ND_CAT_MISC, ND_SET_TSXLDTRK, 1542,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TSXLDTRK,
0,
0,
0,
0,
},
// Pos:2536 Instruction:"XRSTOR M?" Encoding:"NP 0x0F 0xAE /5:mem"/"M"
{
ND_INS_XRSTOR, ND_CAT_XSAVE, ND_SET_XSAVE, 1543,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_XSAVE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_unknown, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_XCR_0, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2537 Instruction:"XRSTOR64 M?" Encoding:"rexw NP 0x0F 0xAE /5:mem"/"M"
{
ND_INS_XRSTOR, ND_CAT_XSAVE, ND_SET_XSAVE, 1544,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_XSAVE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_unknown, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_XCR_0, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2538 Instruction:"XRSTORS M?" Encoding:"NP 0x0F 0xC7 /3:mem"/"M"
{
ND_INS_XRSTORS, ND_CAT_XSAVE, ND_SET_XSAVES, 1545,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_XSAVES,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_unknown, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_XCR_0, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2539 Instruction:"XRSTORS64 M?" Encoding:"rexw NP 0x0F 0xC7 /3:mem"/"M"
{
ND_INS_XRSTORS, ND_CAT_XSAVE, ND_SET_XSAVES, 1546,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_XSAVES,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_unknown, ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_XCR_0, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2540 Instruction:"XSAVE M?" Encoding:"NP 0x0F 0xAE /4:mem"/"M"
{
ND_INS_XSAVE, ND_CAT_XSAVE, ND_SET_XSAVE, 1547,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_XSAVE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_unknown, ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_XCR_0, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:2541 Instruction:"XSAVE64 M?" Encoding:"rexw NP 0x0F 0xAE /4:mem"/"M"
{
ND_INS_XSAVE, ND_CAT_XSAVE, ND_SET_XSAVE, 1548,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_XSAVE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_unknown, ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_XCR_0, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:2542 Instruction:"XSAVEC M?" Encoding:"NP 0x0F 0xC7 /4:mem"/"M"
{
ND_INS_XSAVEC, ND_CAT_XSAVE, ND_SET_XSAVEC, 1549,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_XSAVEC,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_unknown, ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_XCR_0, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:2543 Instruction:"XSAVEC64 M?" Encoding:"rexw NP 0x0F 0xC7 /4:mem"/"M"
{
ND_INS_XSAVEC, ND_CAT_XSAVE, ND_SET_XSAVEC, 1550,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_XSAVEC,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_unknown, ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_XCR_0, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:2544 Instruction:"XSAVEOPT M?" Encoding:"NP 0x0F 0xAE /6:mem"/"M"
{
ND_INS_XSAVEOPT, ND_CAT_XSAVE, ND_SET_XSAVE, 1551,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_XSAVE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_unknown, ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_XCR_0, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:2545 Instruction:"XSAVEOPT64 M?" Encoding:"rexw NP 0x0F 0xAE /6:mem"/"M"
{
ND_INS_XSAVEOPT, ND_CAT_XSAVE, ND_SET_XSAVE, 1552,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_XSAVE,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_unknown, ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_XCR_0, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:2546 Instruction:"XSAVES M?" Encoding:"NP 0x0F 0xC7 /5:mem"/"M"
{
ND_INS_XSAVES, ND_CAT_XSAVE, ND_SET_XSAVES, 1553,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_XSAVES,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_unknown, ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_XCR_0, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:2547 Instruction:"XSAVES64 M?" Encoding:"rexw NP 0x0F 0xC7 /5:mem"/"M"
{
ND_INS_XSAVES, ND_CAT_XSAVE, ND_SET_XSAVES, 1554,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(1, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_XSAVES,
0,
0,
0,
0,
OP(ND_OPT_M, ND_OPS_unknown, ND_OPF_W, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_XCR_0, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_REG_BANK, ND_OPS_unknown, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
},
// Pos:2548 Instruction:"XSETBV" Encoding:"NP 0x0F 0x01 /0xD1"/""
{
ND_INS_XSETBV, ND_CAT_XSAVE, ND_SET_XSAVE, 1555,
ND_MOD_R0|ND_MOD_REAL|ND_MOD_SMM|ND_MOD_V8086|ND_MOD_PROT|ND_MOD_COMPAT|ND_MOD_LONG|ND_MOD_VMXR|ND_MOD_VMXN|ND_MOD_VMXO|ND_MOD_TSX,
0, 0, ND_OPS_CNT(0, 4), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_XSAVE,
0,
0,
0,
0,
OP(ND_OPT_GPR_rCX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rDX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_GPR_rAX, ND_OPS_d, ND_OPF_DEFAULT|ND_OPF_R, 0, 0),
OP(ND_OPT_XCR, ND_OPS_q, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
// Pos:2549 Instruction:"XSHA1" Encoding:"0xF3 0x0F 0xA6 /0xC8"/""
{
ND_INS_XSHA1, ND_CAT_PADLOCK, ND_SET_CYRIX, 1556,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
},
// Pos:2550 Instruction:"XSHA256" Encoding:"0xF3 0x0F 0xA6 /0xD0"/""
{
ND_INS_XSHA256, ND_CAT_PADLOCK, ND_SET_CYRIX, 1557,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
},
// Pos:2551 Instruction:"XSTORE" Encoding:"0x0F 0xA7 /0xC0"/""
{
ND_INS_XSTORE, ND_CAT_PADLOCK, ND_SET_CYRIX, 1558,
ND_MOD_ANY,
ND_PREF_REP, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, 0,
0,
0,
0,
0,
},
// Pos:2552 Instruction:"XSUSLDTRK" Encoding:"0xF2 0x0F 0x01 /0xE8"/""
{
ND_INS_XSUSLDTRK, ND_CAT_MISC, ND_SET_TSXLDTRK, 1559,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 0), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_TSXLDTRK,
0,
0,
0,
0,
},
// Pos:2553 Instruction:"XTEST" Encoding:"NP 0x0F 0x01 /0xD6"/""
{
ND_INS_XTEST, ND_CAT_LOGIC, ND_SET_TSX, 1560,
ND_MOD_ANY,
0, 0, ND_OPS_CNT(0, 1), 0, 0, 0, 0, 0, 0, ND_FLAG_MODRM, ND_CFF_RTM,
0,
0|REG_RFLAG_ZF,
0,
0|REG_RFLAG_CF|REG_RFLAG_PF|REG_RFLAG_AF|REG_RFLAG_SF|REG_RFLAG_OF,
OP(ND_OPT_F, ND_OPS_v, ND_OPF_DEFAULT|ND_OPF_W, 0, 0),
},
};
#endif
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