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cpuid.dat
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Added support for new Intel ISA, per Intel® Architecture Instruction Set Extensions and Future Features document #319433-049 (June 2023): AVX-NNI-INT16, SHA512, SM3, SM4, TSE.
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2023-07-21 09:38:49 +03:00 |
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flags.dat
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Switched from nil to n/a naming for absent operands, as it is more obvious.
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2023-02-08 17:44:45 +02:00 |
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modes.dat
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Switched from nil to n/a naming for absent operands, as it is more obvious.
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2023-02-08 17:44:45 +02:00 |
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table_0F_3A.dat
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Switched to a more parsing-friendly format for the instructions database, where individual components are sepparated by a semicolon.
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2023-02-09 10:54:45 +02:00 |
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table_0F_38.dat
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Switched to a more parsing-friendly format for the instructions database, where individual components are sepparated by a semicolon.
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2023-02-09 10:54:45 +02:00 |
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table_0F.dat
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Added support for new Intel ISA, per Intel® Architecture Instruction Set Extensions and Future Features document #319433-049 (June 2023): AVX-NNI-INT16, SHA512, SM3, SM4, TSE.
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2023-07-21 09:38:49 +03:00 |
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table_3dnow.dat
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Switched to a more parsing-friendly format for the instructions database, where individual components are sepparated by a semicolon.
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2023-02-09 10:54:45 +02:00 |
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table_base.dat
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Switched to a more parsing-friendly format for the instructions database, where individual components are sepparated by a semicolon.
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2023-02-09 10:54:45 +02:00 |
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table_evex1.dat
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Switched to a more parsing-friendly format for the instructions database, where individual components are sepparated by a semicolon.
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2023-02-09 10:54:45 +02:00 |
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table_evex2.dat
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Switched to a more parsing-friendly format for the instructions database, where individual components are sepparated by a semicolon.
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2023-02-09 10:54:45 +02:00 |
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table_evex3.dat
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Switched to a more parsing-friendly format for the instructions database, where individual components are sepparated by a semicolon.
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2023-02-09 10:54:45 +02:00 |
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table_evex5.dat
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Switched to a more parsing-friendly format for the instructions database, where individual components are sepparated by a semicolon.
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2023-02-09 10:54:45 +02:00 |
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table_evex6.dat
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Switched to a more parsing-friendly format for the instructions database, where individual components are sepparated by a semicolon.
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2023-02-09 10:54:45 +02:00 |
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table_fpu.dat
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Switched to a more parsing-friendly format for the instructions database, where individual components are sepparated by a semicolon.
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2023-02-09 10:54:45 +02:00 |
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table_vex1.dat
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Switched to a more parsing-friendly format for the instructions database, where individual components are sepparated by a semicolon.
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2023-02-09 10:54:45 +02:00 |
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table_vex2.dat
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Added support for new Intel ISA, per Intel® Architecture Instruction Set Extensions and Future Features document #319433-049 (June 2023): AVX-NNI-INT16, SHA512, SM3, SM4, TSE.
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2023-07-21 09:38:49 +03:00 |
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table_vex3.dat
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Added support for new Intel ISA, per Intel® Architecture Instruction Set Extensions and Future Features document #319433-049 (June 2023): AVX-NNI-INT16, SHA512, SM3, SM4, TSE.
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2023-07-21 09:38:49 +03:00 |
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table_xop.dat
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Switched to a more parsing-friendly format for the instructions database, where individual components are sepparated by a semicolon.
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2023-02-09 10:54:45 +02:00 |
