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address_16
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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address_16.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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address_16.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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address_32
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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address_32.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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address_32.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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address_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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address_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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address_64.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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aes_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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aes_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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aes_64.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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basic1_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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basic1_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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basic1_64.result
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Fixed https://github.com/bitdefender/bddisasm/issues/38.
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2021-01-15 19:09:53 +02:00 |
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basic2_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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basic2_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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basic2_64.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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bmi_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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bmi_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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bmi_64.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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branch_16
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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branch_16.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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branch_16.result
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Flag the rIP operand of conditional branches as being conditionally read/write instead of plain read/write.
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2021-05-17 09:04:34 +03:00 |
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branch_32
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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branch_32.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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branch_32.result
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Flag the rIP operand of conditional branches as being conditionally read/write instead of plain read/write.
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2021-05-17 09:04:34 +03:00 |
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branch_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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branch_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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branch_64.result
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Flag the rIP operand of conditional branches as being conditionally read/write instead of plain read/write.
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2021-05-17 09:04:34 +03:00 |
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cet_64
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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cet_64.asm
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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cet_64.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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enqcmd_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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enqcmd_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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enqcmd_64.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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fpu_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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fpu_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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fpu_64.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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gfni_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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gfni_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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gfni_64.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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invlpgb_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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invlpgb_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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invlpgb_64.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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misc_16
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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misc_16.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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misc_16.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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misc_32
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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misc_32.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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misc_32.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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misc_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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misc_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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misc_64.result
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Fixed some static code check warnings.
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2020-09-21 12:16:45 +03:00 |
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mpx_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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mpx_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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mpx_64.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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prefixes_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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prefixes_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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prefixes_64.result
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Flag the rIP operand of conditional branches as being conditionally read/write instead of plain read/write.
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2021-05-17 09:04:34 +03:00 |
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sha_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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sha_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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sha_64.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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snp_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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snp_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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snp_64.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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stack_16
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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stack_16.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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stack_16.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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stack_32
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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stack_32.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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stack_32.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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stack_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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stack_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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stack_64.result
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Added missing Default 64 flag for the ENTER instruction.
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2020-11-06 14:19:22 +02:00 |
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svm_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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svm_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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svm_64.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
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system_16
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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system_16.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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system_16.result
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Fixed some static code check warnings.
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2020-09-21 12:16:45 +03:00 |
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system_32
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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system_32.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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system_32.result
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Fixed some static code check warnings.
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2020-09-21 12:16:45 +03:00 |
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system_64
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Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020).
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2020-10-05 13:19:03 +03:00 |
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system_64.asm
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Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020).
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2020-10-05 13:19:03 +03:00 |
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system_64.result
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Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020).
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2020-10-05 13:19:03 +03:00 |
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tsx_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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tsx_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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tsx_64.result
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Flag the rIP operand of conditional branches as being conditionally read/write instead of plain read/write.
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2021-05-17 09:04:34 +03:00 |
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vmx_64
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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vmx_64.asm
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Initial commit.
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2020-07-21 11:19:18 +03:00 |
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vmx_64.result
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Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf.
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2020-09-10 11:06:20 +03:00 |
f7bf814bbc