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bddisasm/bddisasm_test/basic
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Andrei Vlad LUTAS 08096172cc Multiple improvements 
- New shemu flag - SHEMU_FLAG_SIDT, set when sheu encounters a SIDT in ring0.
- Added the CET Tracked flag to SYSCLAL, SYSENTER and INT n instructions.
- Fixed Do Not Track prefix recognition for CALL and JMP in long-mode.
- Fixed MONITOR and MONITORX implicit operands - the rAX register encodes a virtual address that will be used as the monitored range. That address is subject to a 1 byte load.
- Fixed RMPADJUST and RMPUPDATE implicit operands - the rAX register encodes a virtual address, and the rCX register encodes a virtual address of the RMP updated entry.
2021-08-31 13:37:50 +03:00
..
address_16 Initial commit. 2020-07-21 11:19:18 +03:00
address_16.asm Initial commit. 2020-07-21 11:19:18 +03:00
address_16.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
address_32 Initial commit. 2020-07-21 11:19:18 +03:00
address_32.asm Initial commit. 2020-07-21 11:19:18 +03:00
address_32.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
address_64 Initial commit. 2020-07-21 11:19:18 +03:00
address_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
address_64.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
aes_64 Initial commit. 2020-07-21 11:19:18 +03:00
aes_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
aes_64.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
basic1_64 Initial commit. 2020-07-21 11:19:18 +03:00
basic1_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
basic1_64.result Fixed https://github.com/bitdefender/bddisasm/issues/38. 2021-01-15 19:09:53 +02:00
basic2_64 Initial commit. 2020-07-21 11:19:18 +03:00
basic2_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
basic2_64.result Multiple improvements 2021-08-31 13:37:50 +03:00
bmi_64 Initial commit. 2020-07-21 11:19:18 +03:00
bmi_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
bmi_64.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
branch_16 Initial commit. 2020-07-21 11:19:18 +03:00
branch_16.asm Initial commit. 2020-07-21 11:19:18 +03:00
branch_16.result Multiple improvements 2021-08-31 13:37:50 +03:00
branch_32 Initial commit. 2020-07-21 11:19:18 +03:00
branch_32.asm Initial commit. 2020-07-21 11:19:18 +03:00
branch_32.result Multiple improvements 2021-08-31 13:37:50 +03:00
branch_64 Initial commit. 2020-07-21 11:19:18 +03:00
branch_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
branch_64.result Multiple improvements 2021-08-31 13:37:50 +03:00
cet_64 Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
cet_64.asm Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
cet_64.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
enqcmd_64 Initial commit. 2020-07-21 11:19:18 +03:00
enqcmd_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
enqcmd_64.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
fpu_64 Initial commit. 2020-07-21 11:19:18 +03:00
fpu_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
fpu_64.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
gfni_64 Initial commit. 2020-07-21 11:19:18 +03:00
gfni_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
gfni_64.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
invlpgb_64 Initial commit. 2020-07-21 11:19:18 +03:00
invlpgb_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
invlpgb_64.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
misc_16 Initial commit. 2020-07-21 11:19:18 +03:00
misc_16.asm Initial commit. 2020-07-21 11:19:18 +03:00
misc_16.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
misc_32 Initial commit. 2020-07-21 11:19:18 +03:00
misc_32.asm Initial commit. 2020-07-21 11:19:18 +03:00
misc_32.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
misc_64 Initial commit. 2020-07-21 11:19:18 +03:00
misc_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
misc_64.result Fixed some static code check warnings. 2020-09-21 12:16:45 +03:00
mpx_64 Initial commit. 2020-07-21 11:19:18 +03:00
mpx_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
mpx_64.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
prefixes_64 Initial commit. 2020-07-21 11:19:18 +03:00
prefixes_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
prefixes_64.result Flag the rIP operand of conditional branches as being conditionally read/write instead of plain read/write. 2021-05-17 09:04:34 +03:00
sha_64 Initial commit. 2020-07-21 11:19:18 +03:00
sha_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
sha_64.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
snp_64 Initial commit. 2020-07-21 11:19:18 +03:00
snp_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
snp_64.result Multiple improvements 2021-08-31 13:37:50 +03:00
stack_16 Initial commit. 2020-07-21 11:19:18 +03:00
stack_16.asm Initial commit. 2020-07-21 11:19:18 +03:00
stack_16.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
stack_32 Initial commit. 2020-07-21 11:19:18 +03:00
stack_32.asm Initial commit. 2020-07-21 11:19:18 +03:00
stack_32.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
stack_64 Initial commit. 2020-07-21 11:19:18 +03:00
stack_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
stack_64.result Added missing Default 64 flag for the ENTER instruction. 2020-11-06 14:19:22 +02:00
svm_64 Initial commit. 2020-07-21 11:19:18 +03:00
svm_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
svm_64.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00
system_16 Initial commit. 2020-07-21 11:19:18 +03:00
system_16.asm Initial commit. 2020-07-21 11:19:18 +03:00
system_16.result Fixed some static code check warnings. 2020-09-21 12:16:45 +03:00
system_32 Initial commit. 2020-07-21 11:19:18 +03:00
system_32.asm Initial commit. 2020-07-21 11:19:18 +03:00
system_32.result Fixed some static code check warnings. 2020-09-21 12:16:45 +03:00
system_64 Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020). 2020-10-05 13:19:03 +03:00
system_64.asm Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020). 2020-10-05 13:19:03 +03:00
system_64.result Added support for UINTR, HRESET and AVX-VNNI instructions, as per Intel® Architecture Instruction Set Extensions Programming Reference 41 (October 2020). 2020-10-05 13:19:03 +03:00
tsx_64 Initial commit. 2020-07-21 11:19:18 +03:00
tsx_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
tsx_64.result Flag the rIP operand of conditional branches as being conditionally read/write instead of plain read/write. 2021-05-17 09:04:34 +03:00
vmx_64 Initial commit. 2020-07-21 11:19:18 +03:00
vmx_64.asm Initial commit. 2020-07-21 11:19:18 +03:00
vmx_64.result Added support for TDX instructions, per https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-cpu-architectural-specification.pdf. 2020-09-10 11:06:20 +03:00