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bddisasm/bddisasm_test/x86/basic/aes_64.asm
BITDEFENDER\vlutas 9ba1e6a2f9 Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.
Multiple minor fixes to existing instructions.
Moved x86 decoding tests in a separate directory & improved the test script.
2022-10-04 12:22:59 +03:00

57 lines
1.6 KiB
NASM

bits 64
; legacy, reg - reg
aesimc xmm7, xmm13
aesenc xmm7, xmm13
aesenclast xmm7, xmm13
aesdec xmm7, xmm13
aesdeclast xmm7, xmm13
aeskeygenassist xmm7, xmm13, 10
; legacy, reg - mem
aesimc xmm7, [rbx]
aesenc xmm7, [rbx]
aesenclast xmm7, [rbx]
aesdec xmm7, [rbx]
aesdeclast xmm7, [rbx]
aeskeygenassist xmm7, [rbx], 10
; VEX, reg - reg - reg, 128 bit
vaesimc xmm7, xmm13
vaesenc xmm7, xmm15, xmm13
vaesenclast xmm7, xmm15, xmm13
vaesdec xmm7, xmm15, xmm13
vaesdeclast xmm7, xmm15, xmm13
vaeskeygenassist xmm7, xmm13, 10
; VEX, reg - reg - mem, 128 bit
vaesimc xmm7, [rbx]
vaesenc xmm7, xmm15, [rbx]
vaesenclast xmm7, xmm15, [rbx]
vaesdec xmm7, xmm15, [rbx]
vaesdeclast xmm7, xmm15, [rbx]
vaeskeygenassist xmm7, [rbx], 10
; VEX, reg - reg - reg, 256 bit
vaesenc ymm7, ymm15, ymm13
vaesenclast ymm7, ymm15, ymm13
vaesdec ymm7, ymm15, ymm13
vaesdeclast ymm7, ymm15, ymm13
; VEX reg - reg - mem, 256 bit
vaesenc ymm7, ymm15, [rbx]
vaesenclast ymm7, ymm15, [rbx]
vaesdec ymm7, ymm15, [rbx]
vaesdeclast ymm7, ymm15, [rbx]
; EVEX, reg - reg - reg, 512 bit
vaesenc zmm7, zmm31, zmm13
vaesenclast zmm7, zmm31, zmm13
vaesdec zmm7, zmm31, zmm13
vaesdeclast zmm7, zmm31, zmm13
; EVEX reg - reg - mem, 512 bit
vaesenc zmm7, zmm31, [rbx]
vaesenclast zmm7, zmm31, [rbx]
vaesdec zmm7, zmm31, [rbx]
vaesdeclast zmm7, zmm31, [rbx]