1
0
mirror of https://github.com/bitdefender/bddisasm.git synced 2024-11-10 01:20:31 +00:00
bddisasm/bddisasm_test/x86/basic/address_32.asm
BITDEFENDER\vlutas 9ba1e6a2f9 Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.
Multiple minor fixes to existing instructions.
Moved x86 decoding tests in a separate directory & improved the test script.
2022-10-04 12:22:59 +03:00

32 lines
773 B
NASM

bits 32
;
; 32 bit addressing
;
mov eax, dword [ecx]
mov eax, dword [ecx + edi]
mov eax, dword [ecx + edi * 4]
mov eax, dword [ecx + edi * 4 + 0x7f]
mov eax, dword [ecx + edi * 8 + 0x7fffffff]
mov eax, dword [0x7fffffff]
;
; 16 bit addressing
;
mov eax, dword [bp]
mov eax, dword [0x7FFF]
mov eax, dword [bx + 0x7F]
mov eax, dword [bx + 0x7FFF]
mov eax, dword [bp + di]
mov eax, dword [bp + si]
;
; Segment prefix.
;
mov eax, dword [fs:0x30]
mov eax, dword [fs:ecx]
mov eax, dword [fs:ecx + edi]
mov eax, dword [fs:ecx + edi * 2]
mov eax, dword [fs:ecx + edi * 2 + 0x1000]