arno/bddisasm
1
0
Fork 0
mirror of https://github.com/bitdefender/bddisasm.git synced 2024-12-22 22:18:09 +00:00
Code Issues Releases Wiki Activity
11e6a3e208
bddisasm/isagenerator/instructions/table_evex5.dat

69 lines
8.3 KiB
Plaintext
Raw Blame History

#
# Copyright (c) 2020 Bitdefender
# SPDX-License-Identifier: Apache-2.0
#
# 0x10 - 0x1F
VMOVSH ; Vdq{K}{z},Wsh ; n/a ; evex m:5 p:2 l:i w:0 0x10 /r:mem ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E5, w:W|R|R
VMOVSH ; Vdq{K}{z},Hdq,Wsh ; n/a ; evex m:5 p:2 l:i w:0 0x10 /r:reg ; s:AVX512FP16, t:AVX512FP16, e:E5, w:W|R|R|R
VMOVSH ; Wsh{K},Vdq ; n/a ; evex m:5 p:2 l:i w:0 0x11 /r:mem ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E5, w:W|R|R
VMOVSH ; Wsh{K}{z},Hdq,Vdq ; n/a ; evex m:5 p:2 l:i w:0 0x11 /r:reg ; s:AVX512FP16, t:AVX512FP16, e:E5, w:W|R|R|R
VCVTPS2PHX ; Vhv{K}{z},Wfv|B32{er} ; n/a ; evex m:5 p:1 l:x w:0 0x1D /r ; s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
VCVTSS2SH ; Vdq{K}{z},Hdq,Wss{er} ; n/a ; evex m:5 p:0 l:i w:0 0x1D /r ; s:AVX512FP16, t:AVX512FP16, l:t1s, e:E3, w:W|R|R|R
# 0x20 - 0x2F
VCVTSI2SH ; Vdq,Hdq,Ey ; n/a ; evex m:5 p:2 l:i w:x 0x2A /r ; s:AVX512FP16, t:AVX512FP16, l:t1s, e:E3NF, w:W|R|R, a:IWO64
VCVTTSH2SI ; Gy,Wsh{sae} ; n/a ; evex m:5 p:2 l:i w:x 0x2C /r ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3NF, w:W|R, a:IWO64
VCVTSH2SI ; Gy,Wsh{er} ; n/a ; evex m:5 p:2 l:i w:x 0x2D /r ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3NF, w:W|R, a:IWO64
VUCOMISH ; Vdq,Wsh{sae} ; Fv ; evex m:5 p:0 l:i w:0 0x2E /r ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3NF, w:R|R|W, f:ZF=m|PF=m|CF=m|OF=0|SF=0|AF=0
VCOMISH ; Vdq,Wsh{sae} ; Fv ; evex m:5 p:0 l:i w:0 0x2F /r ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3NF, w:R|R|W, f:ZF=m|PF=m|CF=m|OF=0|SF=0|AF=0
# 0x50 - 0x5F
VSQRTPH ; Vfv{K}{z},Wfv|B16{er} ; n/a ; evex m:5 p:0 l:x w:0 0x51 /r ; s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
VSQRTSH ; Vdq{K}{z},Hdq,Wsh{er} ; n/a ; evex m:5 p:2 l:i w:0 0x51 /r ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
VADDPH ; Vfv{K}{z},Hfv,Wfv|B16{er} ; n/a ; evex m:5 p:0 l:x w:0 0x58 /r ; s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
VADDSH ; Vdq{K}{z},Hdq,Wsh{er} ; n/a ; evex m:5 p:2 l:i w:0 0x58 /r ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
VMULPH ; Vfv{K}{z},Hfv,Wfv|B16{er} ; n/a ; evex m:5 p:0 l:x w:0 0x59 /r ; s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
VMULSH ; Vdq{K}{z},Hdq,Wsh{er} ; n/a ; evex m:5 p:2 l:i w:0 0x59 /r ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
VCVTPH2PD ; Vfv{K}{z},Wqv|B16{sae} ; n/a ; evex m:5 p:0 l:x w:0 0x5A /r ; s:AVX512FP16, t:AVX512FP16, l:qv, e:E2, w:W|R|R
VCVTPD2PH ; Vdq{K}{z},Wfv|B64{er} ; n/a ; evex m:5 p:1 l:x w:1 0x5A /r ; s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
VCVTSH2SD ; Vdq{K}{z},Hdq,Wsh{sae} ; n/a ; evex m:5 p:2 l:i w:0 0x5A /r ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
VCVTSD2SH ; Vdq{K}{z},Hdq,Wsd{er} ; n/a ; evex m:5 p:3 l:i w:1 0x5A /r ; s:AVX512FP16, t:AVX512FP16, l:t1s, e:E3, w:W|R|R|R
VCVTDQ2PH ; Vhv{K}{z},Wfv|B32{er} ; n/a ; evex m:5 p:0 l:x w:0 0x5B /r ; s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
VCVTQQ2PH ; Vdq{K}{z},Wfv|B64{er} ; n/a ; evex m:5 p:0 l:x w:1 0x5B /r ; s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
VCVTPH2DQ ; Vfv{K}{z},Whv|B16{er} ; n/a ; evex m:5 p:1 l:x w:0 0x5B /r ; s:AVX512FP16, t:AVX512FP16, l:hv, e:E2, w:W|R|R
VCVTTPH2DQ ; Vfv{K}{z},Whv|B16{sae} ; n/a ; evex m:5 p:2 l:x w:0 0x5B /r ; s:AVX512FP16, t:AVX512FP16, l:hv, e:E2, w:W|R|R
VSUBPH ; Vfv{K}{z},Hfv,Wfv|B16{sae} ; n/a ; evex m:5 p:0 l:x w:0 0x5C /r ; s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
VSUBSH ; Vdq{K}{z},Hdq,Wsh{sae} ; n/a ; evex m:5 p:2 l:i w:0 0x5C /r ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
VMINPH ; Vfv{K}{z},Hfv,Wfv|B16{sae} ; n/a ; evex m:5 p:0 l:x w:0 0x5D /r ; s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
VMINSH ; Vdq{K}{z},Hdq,Wsh{sae} ; n/a ; evex m:5 p:2 l:i w:0 0x5D /r ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
VDIVPH ; Vfv{K}{z},Hfv,Wfv|B16{er} ; n/a ; evex m:5 p:0 l:x w:0 0x5E /r ; s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
VDIVSH ; Vdq{K}{z},Hdq,Wsh{er} ; n/a ; evex m:5 p:2 l:i w:0 0x5E /r ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
VMAXPH ; Vfv{K}{z},Hfv,Wfv|B16{sae} ; n/a ; evex m:5 p:0 l:x w:0 0x5F /r ; s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
VMAXSH ; Vdq{K}{z},Hdq,Wsh{sae} ; n/a ; evex m:5 p:2 l:i w:0 0x5F /r ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
# 0x60 - 0x6F
VMOVW ; Vdq,Mw ; n/a ; evex m:5 p:1 l:0 w:i 0x6E /r:mem ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E9NF, w:W|R
VMOVW ; Vdq,Rd ; n/a ; evex m:5 p:1 l:0 w:i 0x6E /r:reg ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E9NF, w:W|R
# 0x70 - 0x7F
VCVTTPH2UDQ ; Vfv{K}{z},Whv|B16{sae} ; n/a ; evex m:5 p:0 l:x w:0 0x78 /r ; s:AVX512FP16, t:AVX512FP16, l:hv, e:E2, w:W|R|R
VCVTTPH2UQQ ; Vfv{K}{z},Wqv|B16{sae} ; n/a ; evex m:5 p:1 l:x w:0 0x78 /r ; s:AVX512FP16, t:AVX512FP16, l:qv, e:E2, w:W|R|R
VCVTTSH2USI ; Gy,Wsh{sae} ; n/a ; evex m:5 p:2 l:i w:0 0x78 /r ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3NF, w:W|R, a:IWO64
VCVTPH2UDQ ; Vfv{K}{z},Whv|B16{er} ; n/a ; evex m:5 p:0 l:x w:0 0x79 /r ; s:AVX512FP16, t:AVX512FP16, l:hv, e:E2, w:W|R|R
VCVTPH2UQQ ; Vfv{K}{z},Wqv|B16{er} ; n/a ; evex m:5 p:1 l:x w:0 0x79 /r ; s:AVX512FP16, t:AVX512FP16, l:qv, e:E2, w:W|R|R
VCVTSH2USI ; Gy,Wsh{er} ; n/a ; evex m:5 p:2 l:i w:x 0x79 /r ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3NF, w:W|R, a:IWO64
VCVTUDQ2PH ; Vhv{K}{z},Wfv|B32{er} ; n/a ; evex m:5 p:3 l:x w:0 0x7A /r ; s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
VCVTUQQ2PH ; Vqv{K}{z},Wfv|B64{er} ; n/a ; evex m:5 p:3 l:x w:1 0x7A /r ; s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
VCVTTPH2QQ ; Vfv{K}{z},Wqv|B16{sae} ; n/a ; evex m:5 p:1 l:x w:0 0x7A /r ; s:AVX512FP16, t:AVX512FP16, l:qv, e:E2, w:W|R|R
VCVTPH2QQ ; Vfv{K}{z},Wqv|B16{er} ; n/a ; evex m:5 p:1 l:x w:0 0x7B /r ; s:AVX512FP16, t:AVX512FP16, l:qv, e:E2, w:W|R|R
VCVTUSI2SH ; Vdq,Hdq,Ey{er} ; n/a ; evex m:5 p:2 l:i w:x 0x7B /r ; s:AVX512FP16, t:AVX512FP16, l:t1s, e:E3NF, w:W|R|R, a:IWO64
VCVTTPH2UW ; Vfv{K}{z},Wfv|B16{sae} ; n/a ; evex m:5 p:0 l:x w:0 0x7C /r ; s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
VCVTTPH2W ; Vfv{K}{z},Wfv|B16{sae} ; n/a ; evex m:5 p:1 l:x w:0 0x7C /r ; s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
VCVTPH2UW ; Vfv{K}{z},Wfv|B16{er} ; n/a ; evex m:5 p:0 l:x w:0 0x7D /r ; s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
VCVTPH2W ; Vfv{K}{z},Wfv|B16{er} ; n/a ; evex m:5 p:1 l:x w:0 0x7D /r ; s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
VCVTW2PH ; Vfv{K}{z},Wfv|B16{er} ; n/a ; evex m:5 p:2 l:x w:0 0x7D /r ; s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
VCVTUW2PH ; Vfv{K}{z},Wfv|B16{er} ; n/a ; evex m:5 p:3 l:x w:0 0x7D /r ; s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
VMOVW ; Mw,Vdq ; n/a ; evex m:5 p:1 l:0 w:i 0x7E /r:mem ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E9NF, w:W|R
VMOVW ; Rd,Vdq ; n/a ; evex m:5 p:1 l:0 w:i 0x7E /r:reg ; s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E9NF, w:W|R
Reference in New Issue View Git Blame Copy Permalink