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549 lines
16 KiB
549 lines
16 KiB
/*
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* Copyright (c) 2020 Bitdefender
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef BDX86_TABLEDEFS_H
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#define BDX86_TABLEDEFS_H
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#include "../inc/bddisasm_types.h"
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//
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// Types of tables.
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//
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typedef enum _ND_ILUT_TYPE
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{
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ND_ILUT_INSTRUCTION = 0,// Table contains one entry that directly points to an instruction.
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ND_ILUT_OPCODE, // Table contains 256 entries. Next entry is selected using an opcode.
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ND_ILUT_OPCODE_LAST, // Table contains 256 entries. Next entry is selected using an opcode, but the
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// opcode follows the instruction as the last byte.
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ND_ILUT_MODRM_REG, // Table contains 8 entries. Next entry is selected using modrm.reg.
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ND_ILUT_MODRM_MOD, // Table contains 2 entries. Next entry is selected using modrm.mod (0 - mem, 1 - reg)
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ND_ILUT_MODRM_RM, // Table contains 8 entries. Next entry is selected using modrm.rm.
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ND_ILUT_MAN_PREFIX, // Table contains 4 entries. Next entry is 0 (no prefix), 1 (0x66), 2 (0xF3), 3 (0xF2).
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ND_ILUT_MODE, // Table contains 4 entries. Next entry is 0 (16 bit mode), 1 (32 bit mode), 2 (64 bit mode).
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ND_ILUT_DSIZE, // Table contains 4 entries. Next entry is 0 (16 bit size), 1 (32 bit size), 2 (64 bit size).
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// This DOES NOT take into consideration forced/default sizes.
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ND_ILUT_ASIZE, // Default addressing mode is used to transition
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ND_ILUT_AUXILIARY, // Table contains 10 entries. Next entry is 0 (no prefix), 1 (rex), 2 (rex.w), etc.
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ND_ILUT_VENDOR, // Preferred vendor is used to transition. Default is entry 0. Otherwise, preferred
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// vendor selects an alternate entry.
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ND_ILUT_FEATURE, // Some instructions are mapped onto wide NOP space. They will be decoded only if the
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// associated feature is set during decoding.
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ND_ILUT_EX_M, // Table contains 32 entries. Next entry is vex/xop/evex.mmmmm
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ND_ILUT_EX_PP, // Table contains 4 entries. Next entry is vex/xop/evex.pp
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ND_ILUT_EX_L, // Table contains 4 entries. Next entry is vex/xop.l or evex.l'l
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ND_ILUT_EX_W, // Table contains 2 entries. Next entry is vex/xop/evex.w
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ND_ILUT_EX_WI, // Table contains 2 entries. Next entry is vex/xop/evex.w. If not in 64 bit, next entry is 0.
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ND_ILUT_EX_ND, // Table contains 2 entries. Next entry is evex.ND.
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ND_ILUT_EX_NF, // Table contains 2 entries. Next entry is evex.NF.
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ND_ILUT_EX_SC, // Table contains 16 entries. Next entry is evex.SC.
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} ND_ILUT_TYPE;
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// Index definitions
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#define ND_ILUT_INDEX_MOD_MEM 0
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#define ND_ILUT_INDEX_MOD_REG 1
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// Mandatory prefixes.
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#define ND_ILUT_INDEX_MAN_PREF_NP 0
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#define ND_ILUT_INDEX_MAN_PREF_66 1
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#define ND_ILUT_INDEX_MAN_PREF_F3 2
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#define ND_ILUT_INDEX_MAN_PREF_F2 3
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// Operating mode.
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#define ND_ILUT_INDEX_MODE_NONE 0
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#define ND_ILUT_INDEX_MODE_16 1
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#define ND_ILUT_INDEX_MODE_32 2
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#define ND_ILUT_INDEX_MODE_64 3
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// Operand size.
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#define ND_ILUT_INDEX_DSIZE_NONE 0
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#define ND_ILUT_INDEX_DSIZE_16 1
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#define ND_ILUT_INDEX_DSIZE_32 2
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#define ND_ILUT_INDEX_DSIZE_64 3
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#define ND_ILUT_INDEX_DSIZE_DEF64 4
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#define ND_ILUT_INDEX_DSIZE_F64 5
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// Address size.
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#define ND_ILUT_INDEX_ASIZE_NONE 0
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#define ND_ILUT_INDEX_ASIZE_16 1
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#define ND_ILUT_INDEX_ASIZE_32 2
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#define ND_ILUT_INDEX_ASIZE_64 3
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// Misc conditions.
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#define ND_ILUT_INDEX_AUX_NONE 0
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#define ND_ILUT_INDEX_AUX_REXB 1
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#define ND_ILUT_INDEX_AUX_REXW 2
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#define ND_ILUT_INDEX_AUX_MO64 3
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#define ND_ILUT_INDEX_AUX_REPZ 4
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#define ND_ILUT_INDEX_AUX_REP 5
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#define ND_ILUT_INDEX_AUX_RIPREL 6
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#define ND_ILUT_INDEX_AUX_REX2 7
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#define ND_ILUT_INDEX_AUX_REX2W 8
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// Specific features for instructions that map on the wide NOP space.
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#define ND_ILUT_FEATURE_NONE 0
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#define ND_ILUT_FEATURE_MPX 1
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#define ND_ILUT_FEATURE_CET 2
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#define ND_ILUT_FEATURE_CLDEMOTE 3
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#define ND_ILUT_FEATURE_PITI 4
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typedef struct _ND_TABLE
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{
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ND_UINT32 Type;
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const void *Table[1];
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} ND_TABLE, *PND_TABLE;
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typedef struct _ND_TABLE_INSTRUCTION
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{
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ND_UINT32 Type;
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const void *Instruction;
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} ND_TABLE_INSTRUCTION, *PND_TABLE_INSTRUCTION;
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typedef struct _ND_TABLE_OPCODE
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{
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ND_UINT32 Type;
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const void *Table[256];
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} ND_TABLE_OPCODE, *PND_TABLE_OPCODE;
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typedef struct _ND_TABLE_MODRM_MOD
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{
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ND_UINT32 Type;
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const void *Table[2];
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} ND_TABLE_MODRM_MOD, *PND_TABLE_MODRM_MOD;
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typedef struct _ND_TABLE_MODRM_REG
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{
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ND_UINT32 Type;
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const void *Table[8];
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} ND_TABLE_MODRM_REG, *PND_TABLE_MODRM_REG;
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typedef struct _ND_TABLE_MODRM_RM
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{
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ND_UINT32 Type;
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const void *Table[8];
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} ND_TABLE_MODRM_RM, *PND_TABLE_MODRM_RM;
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typedef struct _ND_TABLE_MPREFIX
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{
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ND_UINT32 Type;
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const void *Table[4];
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} ND_TABLE_MPREFIX, *PND_TABLE_MPREFIX;
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typedef struct _ND_TABLE_AUXILIARY
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{
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ND_UINT32 Type;
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const void *Table[10];
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} ND_TABLE_AUXILIARY, *PND_TABLE_AUXILIARY;
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typedef struct _ND_TABLE_VENDOR
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{
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ND_UINT32 Type;
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const void *Table[6];
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} ND_TABLE_VENDOR;
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typedef struct _ND_TABLE_FEATURE
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{
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ND_UINT32 Type;
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const void *Table[8];
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} ND_TABLE_FEATURE;
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typedef struct _ND_TABLE_DSIZE
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{
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ND_UINT32 Type;
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const void *Table[6];
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} ND_TABLE_DSIZE, *PND_TABLE_DSIZE;
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typedef struct _ND_TABLE_ASIZE
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{
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ND_UINT32 Type;
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const void *Table[4];
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} ND_TABLE_ASIZE, *PND_TABLE_ASIZE;
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typedef struct _ND_TABLE_MODE
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{
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ND_UINT32 Type;
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const void *Table[4];
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} ND_TABLE_MODE, *PND_TABLE_MODE;
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typedef struct _ND_TABLE_EX_M
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{
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ND_UINT32 Type;
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const void *Table[32];
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} ND_TABLE_EX_M, *PND_TABLE_EX_M;
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typedef struct _ND_TABLE_EX_PP
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{
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ND_UINT32 Type;
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const void *Table[4];
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} ND_TABLE_EX_PP, *PND_TABLE_EX_PP;
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typedef struct _ND_TABLE_EX_L
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{
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ND_UINT32 Type;
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const void *Table[4];
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} ND_TABLE_EX_L, *PND_TABLE_EX_L;
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typedef struct _ND_TABLE_EX_W
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{
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ND_UINT32 Type;
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const void *Table[2];
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} ND_TABLE_EX_W, *PND_TABLE_EX_W;
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typedef struct _ND_TABLE_EX_ND
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{
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ND_UINT32 Type;
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const void *Table[2];
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} ND_TABLE_EX_ND, *PND_TABLE_EX_ND;
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typedef struct _ND_TABLE_EX_NF
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{
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ND_UINT32 Type;
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const void *Table[2];
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} ND_TABLE_EX_NF, *PND_TABLE_EX_NF;
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typedef struct _ND_TABLE_EX_SC
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{
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ND_UINT32 Type;
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const void *Table[16];
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} ND_TABLE_EX_SC, *PND_TABLE_EX_SC;
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//
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// One instruction database entry.
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//
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typedef struct _ND_IDBE
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{
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ND_UINT16 Instruction; // Instruction identifier. Check ND_INS_CLASS definitions.
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ND_UINT8 Category; // Instruction category. Check ND_INS_TYPE.
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ND_UINT8 IsaSet; // Instruction set. Check ND_INS_SET.
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ND_UINT16 Mnemonic; // Mnemonic (index inside the global mnemonic table).
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ND_UINT16 ValidPrefixes; // Accepted prefixes.
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ND_UINT32 ValidModes; // Valid operating modes for the instruction.
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ND_UINT8 ValidDecorators;// Accepted decorators (valid for EVEX instructions).
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ND_UINT8 OpsCount; // Low 4 bits: explicit operands count; high 4 bits: implicit ops count.
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ND_UINT8 TupleType; // EVEX tuple type.
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ND_UINT8 ExcType; // SSE/VEX/EVEX/OPMASK/AMX/APX exception type.
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ND_UINT8 FpuFlags; // FPU status word C0, C1, C2 & C3 access type.
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ND_UINT8 EvexMode; // EVEX prefix extension type.
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// Per-flag access. Undefined flags will have their bit set in both the "Set" and "Cleared" mask, since a flag
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// cannot be both cleared and set.
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ND_UINT32 TestedFlags; // Tested flags.
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ND_UINT32 ModifiedFlags; // Modified flags.
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ND_UINT32 SetFlags; // Flags that are always set to 1.
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ND_UINT32 ClearedFlags; // Flags that are always cleared.
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ND_UINT64 Attributes; // Instruction attributes.
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ND_UINT64 CpuidFlag; // Required CPUID feature flag.
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// List of operands. Up to 10 implicit and explicit operands stored in DB.
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ND_UINT64 Operands[10];
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} ND_IDBE, *PND_IDBE;
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//
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// The following definitions are per-operand specific.
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//
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// Packed operand structure:
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// Byte 0: operand type
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// Byte 1: operand size
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// Byte 2: operand flags
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// Byte 3: operand access
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// Byte 4: operand decorators
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// Byte 5: operand block addressing mode - 0 if not block addressing
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//
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#define ND_OP(type, size, flags, acc, dec, block) (((ND_UINT64)((type) & 0xFF) << 0) | \
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((ND_UINT64)((size) & 0xFF) << 8) | \
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((ND_UINT64)((flags) & 0xFF) << 16) | \
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((ND_UINT64)((acc) & 0xFF) << 24) | \
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((ND_UINT64)((dec) & 0xFF) << 32) | \
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((ND_UINT64)((block) & 0xFF) << 40))
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#define OP ND_OP
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#define ND_OPS_CNT(expo, impo) ((expo) | ((impo) << 4))
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#define ND_EXP_OPS_CNT(cnt) ((cnt) & 0xF)
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#define ND_IMP_OPS_CNT(cnt) ((cnt) >> 4)
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#define ND_OP_TYPE(op) ((op) & 0xFF)
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#define ND_OP_SIZE(op) (((op) >> 8) & 0xFF)
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#define ND_OP_FLAGS(op) (((op) >> 16) & 0xFF)
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#define ND_OP_ACCESS(op) (((op) >> 24) & 0xFF)
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#define ND_OP_DECORATORS(op) (((op) >> 32) & 0xFF)
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#define ND_OP_BLOCK(op) (((op) >> 40) & 0xFF)
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//
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// Operand sizes descriptors. These are internal and stored inside the specifier. They must be interpreted
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// accordingly to extract the actual size used in the instruction. These should not be used by anyone using
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// the disassembler. Use the "Size" and "RawSize" fields inside the operand instead.
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//
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// For info on what each enum means, check out the valid_opsize field inside disasmlib.py.
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//
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typedef enum _ND_OPERAND_SIZE_SPEC
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{
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ND_OPS_none = 0,
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ND_OPS_0,
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ND_OPS_asz,
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ND_OPS_ssz,
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ND_OPS_a,
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ND_OPS_c,
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ND_OPS_b,
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ND_OPS_w,
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ND_OPS_d,
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ND_OPS_q,
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ND_OPS_dq,
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ND_OPS_qq,
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ND_OPS_oq,
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ND_OPS_v,
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ND_OPS_y,
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ND_OPS_yf,
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ND_OPS_z,
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ND_OPS_s,
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ND_OPS_p,
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ND_OPS_fa,
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ND_OPS_fw,
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ND_OPS_fd,
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ND_OPS_fq,
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ND_OPS_ft,
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ND_OPS_fe,
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ND_OPS_fs,
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ND_OPS_l,
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ND_OPS_rx,
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ND_OPS_cl,
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ND_OPS_sd,
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ND_OPS_ss,
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ND_OPS_sh,
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ND_OPS_ps,
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ND_OPS_pd,
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ND_OPS_ph,
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ND_OPS_ev,
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ND_OPS_qv,
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ND_OPS_hv,
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ND_OPS_x,
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ND_OPS_uv,
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ND_OPS_fv,
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ND_OPS_t, // Tile register size, can be up to 1K.
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ND_OPS_384, // 384 bit Key Locker handle.
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ND_OPS_512, // 512 bit Key Locker handle.
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ND_OPS_4096, // 4096 bit MSR address/value table, used by RDMSRLIST/WRMSRLIST.
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// Stack sizes - indicates number of words. Also, hybrid sizes - sizes where from a large register (say 32 bit GPR)
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// only a smaller amount of data is used (for example, 8 bit).
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ND_OPS_v2,
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ND_OPS_v3,
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ND_OPS_v4,
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ND_OPS_v5,
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ND_OPS_v8,
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// 4 + 8 bytes accessed on the shadow stack by the SAVPREVSSP instruction.
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ND_OPS_12,
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// MIB
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ND_OPS_mib,
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// VSIB sizes (for both the index and the accessed data).
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ND_OPS_vm32x,
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ND_OPS_vm32y,
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ND_OPS_vm32z,
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ND_OPS_vm32h,
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ND_OPS_vm32n,
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ND_OPS_vm64x,
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ND_OPS_vm64y,
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ND_OPS_vm64z,
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ND_OPS_vm64h,
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ND_OPS_vm64n,
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// Used for arbitrary sized buffers.
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ND_OPS_unknown,
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} ND_OPERAND_SIZE_SPEC;
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//
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// Operand types. These definitions are internal and have to be interpreted in order to find out what each
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// operand represents. These should not be used by anyone using the disassembler. Use the "Type" field inside
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// the operand structure instead.
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//
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// For more info on what each operand type means, please check out the valid_optype field inside disasmlib.py.
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//
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typedef enum _ND_OPERAND_TYPE_SPEC
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{
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ND_OPT_A,
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ND_OPT_B,
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ND_OPT_C,
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ND_OPT_D,
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ND_OPT_E,
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ND_OPT_F,
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ND_OPT_G,
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ND_OPT_H,
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ND_OPT_I,
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ND_OPT_J,
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ND_OPT_K,
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ND_OPT_L,
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ND_OPT_M,
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ND_OPT_N,
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ND_OPT_O,
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ND_OPT_P,
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ND_OPT_Q,
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ND_OPT_R,
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ND_OPT_S,
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ND_OPT_T,
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ND_OPT_U,
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ND_OPT_V,
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ND_OPT_W,
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ND_OPT_X,
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ND_OPT_Y,
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ND_OPT_Z,
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ND_OPT_rB,
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ND_OPT_mB,
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ND_OPT_rK,
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ND_OPT_vK,
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ND_OPT_mK,
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ND_OPT_aK,
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ND_OPT_rM,
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ND_OPT_mM,
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ND_OPT_rT,
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ND_OPT_mT,
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ND_OPT_vT,
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ND_OPT_dfv,
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ND_OPT_1,
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// These are implicit arguments inside instructions.
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// Special registers.
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ND_OPT_rIP,
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ND_OPT_MXCSR,
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ND_OPT_PKRU,
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ND_OPT_SSP,
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ND_OPT_UIF,
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// General Purpose REgisters.
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ND_OPT_AH,
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ND_OPT_rAX,
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ND_OPT_rCX,
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ND_OPT_rDX,
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ND_OPT_rBX,
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ND_OPT_rSP,
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ND_OPT_rBP,
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ND_OPT_rSI,
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ND_OPT_rDI,
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ND_OPT_rR8,
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ND_OPT_rR9,
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ND_OPT_rR11,
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// Segment registers.
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ND_OPT_CS,
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ND_OPT_SS,
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ND_OPT_DS,
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ND_OPT_ES,
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ND_OPT_FS,
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ND_OPT_GS,
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// FPU registers.
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ND_OPT_ST0,
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ND_OPT_STi,
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// SSE registers.
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ND_OPT_XMM0,
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ND_OPT_XMM1,
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ND_OPT_XMM2,
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ND_OPT_XMM3,
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ND_OPT_XMM4,
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ND_OPT_XMM5,
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ND_OPT_XMM6,
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ND_OPT_XMM7,
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// Implicit memory operands.
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ND_OPT_pAX, // [rAX]
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ND_OPT_pCX, // [rCX]
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ND_OPT_pBXAL, // [rBX + AL]
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ND_OPT_pDI, // [rDI]
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ND_OPT_SHS, // Shadow stack.
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ND_OPT_SHSP, // Shadow stack pointed by the SSP.
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ND_OPT_SHS0, // Shadow stack pointed by the SSP.
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ND_OPT_SMT, // Source MSR table, encoded in [RSI].
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ND_OPT_DMT, // Destination MSR table, encoded in [RDI].
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// Special immediates.
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ND_OPT_m2zI,
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// Misc CR/XCR/MSR/SYS registers.
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ND_OPT_CR0,
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ND_OPT_IDTR,
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ND_OPT_GDTR,
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ND_OPT_LDTR,
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ND_OPT_TR,
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ND_OPT_X87CONTROL,
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ND_OPT_X87TAG,
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ND_OPT_X87STATUS,
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ND_OPT_MSR,
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ND_OPT_XCR,
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ND_OPT_TSC,
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ND_OPT_TSCAUX,
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ND_OPT_SEIP,
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ND_OPT_SESP,
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ND_OPT_SCS,
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ND_OPT_STAR,
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ND_OPT_LSTAR,
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ND_OPT_FMASK,
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ND_OPT_FSBASE,
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ND_OPT_GSBASE,
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ND_OPT_KGSBASE,
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ND_OPT_XCR0,
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ND_OPT_BANK,
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} ND_OPERAND_TYPE_SPEC;
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//
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// Operand flags.
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//
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#define ND_OPF_OPDEF 0x01 // The operand is default, no need to show it in disassembly.
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#define ND_OPF_OPSIGNEXO1 0x02 // The operand is sign-extended to the first operands' size.
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#define ND_OPF_OPSIGNEXDW 0x04 // The operand is sign-extended to the default word size.
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//
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// Operand access.
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//
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#define ND_OPA_N 0x00 // The operand is not accessed.
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#define ND_OPA_R 0x01 // The operand is read.
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#define ND_OPA_W 0x02 // The operand is written.
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#define ND_OPA_CR 0x04 // The operand is read conditionally.
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#define ND_OPA_CW 0x08 // The operand is written conditionally.
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#define ND_OPA_RW 0x03 // Read-Write access.
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#define ND_OPA_RCW 0x09 // Read-Conditional Write access.
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#define ND_OPA_CRW 0X06 // Conditional Read-Write access.
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#define ND_OPA_CRCW 0x0C // Conditional Read-Conditional Write access.
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#define ND_OPA_P 0x10 // The operand is memory, and it is prefetched.
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//
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|
// Operand decorator flags.
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|
//
|
|
#define ND_OPD_MASK 0x01 // Mask accepted.
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#define ND_OPD_ZERO 0x02 // Zeroing accepted.
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#define ND_OPD_B32 0x04 // 32 bit broadcast supported.
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#define ND_OPD_B64 0x08 // 64 bit broadcast supported.
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#define ND_OPD_SAE 0x10 // Suppress all exceptions supported.
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#define ND_OPD_ER 0x20 // Embedded rounding supported.
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#define ND_OPD_B16 0x40 // 16 bit broadcast supported.
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#define ND_OPD_BCAST (ND_OPD_B16 | ND_OPD_B32 | ND_OPD_B64)
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//
|
|
// Include auto-generated stuff.
|
|
//
|
|
#include "../../inc/bdx86_constants.h"
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|
#include "bdx86_mnemonics.h"
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|
#include "bdx86_instructions.h"
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#include "bdx86_prefixes.h"
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|
#include "bdx86_table_root.h"
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|
#include "bdx86_table_xop.h"
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|
#include "bdx86_table_vex.h"
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|
#include "bdx86_table_evex.h"
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#endif // BDX86_TABLEDEFS_H
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