mirror of
https://github.com/bitdefender/bddisasm.git
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Improved comments & improved vector length specifiers.
This commit is contained in:
parent
0093439855
commit
fc6059109d
@ -1218,37 +1218,37 @@ NdParseOperand(
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break;
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break;
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case ND_OPS_b:
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case ND_OPS_b:
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// Byte, regardless of operand-size attribute.
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// 8 bits.
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size = ND_SIZE_8BIT;
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size = ND_SIZE_8BIT;
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break;
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break;
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case ND_OPS_w:
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case ND_OPS_w:
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// Word, regardless of operand-size attribute.
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// 16 bits.
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size = ND_SIZE_16BIT;
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size = ND_SIZE_16BIT;
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break;
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break;
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case ND_OPS_d:
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case ND_OPS_d:
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// Dword, regardless of operand-size attribute.
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// 32 bits.
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size = ND_SIZE_32BIT;
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size = ND_SIZE_32BIT;
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break;
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break;
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case ND_OPS_q:
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case ND_OPS_q:
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// Qword, regardless of operand-size attribute.
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// 64 bits.
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size = ND_SIZE_64BIT;
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size = ND_SIZE_64BIT;
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break;
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break;
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case ND_OPS_dq:
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case ND_OPS_dq:
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// Double-Qword, regardless of operand-size attribute.
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// 128 bits.
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size = ND_SIZE_128BIT;
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size = ND_SIZE_128BIT;
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break;
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break;
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case ND_OPS_qq:
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case ND_OPS_qq:
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// Quad-Quadword (256-bits), regardless of operand-size attribute.
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// 256 bits.
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size = ND_SIZE_256BIT;
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size = ND_SIZE_256BIT;
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break;
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break;
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case ND_OPS_oq:
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case ND_OPS_oq:
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// Octo-Quadword (512-bits), regardless of operand-size attribute.
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// 512 bits.
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size = ND_SIZE_512BIT;
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size = ND_SIZE_512BIT;
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break;
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break;
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@ -1263,17 +1263,17 @@ NdParseOperand(
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break;
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break;
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case ND_OPS_fd:
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case ND_OPS_fd:
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// 32 bit real number.
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// 32 bits real number.
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size = ND_SIZE_32BIT;
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size = ND_SIZE_32BIT;
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break;
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break;
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case ND_OPS_fq:
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case ND_OPS_fq:
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// 64 bit real number.
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// 64 bits real number.
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size = ND_SIZE_64BIT;
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size = ND_SIZE_64BIT;
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break;
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break;
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case ND_OPS_ft:
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case ND_OPS_ft:
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// 80 bit real number.
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// 80 bits real number.
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size = ND_SIZE_80BIT;
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size = ND_SIZE_80BIT;
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break;
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break;
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@ -1298,7 +1298,7 @@ NdParseOperand(
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break;
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break;
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case ND_OPS_v:
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case ND_OPS_v:
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// Word, doubleword or quadword (in 64-bit mode), depending on operand-size attribute.
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// 16, 32 or 64 bits.
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{
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{
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static const ND_UINT8 szLut[3] = { ND_SIZE_16BIT, ND_SIZE_32BIT, ND_SIZE_64BIT };
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static const ND_UINT8 szLut[3] = { ND_SIZE_16BIT, ND_SIZE_32BIT, ND_SIZE_64BIT };
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@ -1307,7 +1307,7 @@ NdParseOperand(
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break;
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break;
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case ND_OPS_y:
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case ND_OPS_y:
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// Doubleword or quadword (in 64-bit mode), depending on operand-size attribute.
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// 64 bits (64-bit opsize), 32 bits othwerwise.
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{
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{
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static const ND_UINT8 szLut[3] = { ND_SIZE_32BIT, ND_SIZE_32BIT, ND_SIZE_64BIT };
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static const ND_UINT8 szLut[3] = { ND_SIZE_32BIT, ND_SIZE_32BIT, ND_SIZE_64BIT };
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@ -1316,7 +1316,7 @@ NdParseOperand(
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break;
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break;
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case ND_OPS_yf:
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case ND_OPS_yf:
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// Always ND_UINT64 in 64 bit mode and ND_UINT32 in 16/32 bit mode.
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// 64 bits (64-bit mode), 32 bits (16, 32-bit opsize).
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{
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{
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static const ND_UINT8 szLut[3] = { ND_SIZE_32BIT, ND_SIZE_32BIT, ND_SIZE_64BIT };
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static const ND_UINT8 szLut[3] = { ND_SIZE_32BIT, ND_SIZE_32BIT, ND_SIZE_64BIT };
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@ -1325,7 +1325,7 @@ NdParseOperand(
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break;
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break;
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case ND_OPS_z:
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case ND_OPS_z:
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// Word for 16-bit operand-size or double word for 32 or 64-bit operand-size.
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// 16 bits (16-bit opsize) or 32 bits (32 or 64-bit opsize).
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{
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{
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static const ND_UINT8 szLut[3] = { ND_SIZE_16BIT, ND_SIZE_32BIT, ND_SIZE_32BIT };
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static const ND_UINT8 szLut[3] = { ND_SIZE_16BIT, ND_SIZE_32BIT, ND_SIZE_32BIT };
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@ -1334,8 +1334,7 @@ NdParseOperand(
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break;
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break;
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case ND_OPS_a:
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case ND_OPS_a:
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// Two one-word operands in memory or two double-word operands in memory,
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// 2 x 16 bits (16-bit opsize) or 2 x 32 bits (32-bit opsize).
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// depending on operand-size attribute (used only by the BOUND instruction).
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{
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{
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static const ND_UINT8 szLut[3] = { ND_SIZE_16BIT * 2, ND_SIZE_32BIT * 2, 0 };
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static const ND_UINT8 szLut[3] = { ND_SIZE_16BIT * 2, ND_SIZE_32BIT * 2, 0 };
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@ -1349,7 +1348,7 @@ NdParseOperand(
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break;
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break;
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case ND_OPS_c:
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case ND_OPS_c:
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// Byte or word, depending on operand-size attribute.
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// 8 bits (16-bit opsize) or 16 bits (32-bit opsize).
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switch (Instrux->DefCode)
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switch (Instrux->DefCode)
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{
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{
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case ND_CODE_16:
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case ND_CODE_16:
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@ -1367,7 +1366,7 @@ NdParseOperand(
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break;
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break;
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case ND_OPS_p:
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case ND_OPS_p:
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// 32-bit, 48-bit, or 80-bit pointer, depending on operand-size attribute.
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// 32, 48 or 80 bits pointer.
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{
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{
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static const ND_UINT8 szLut[3] = { ND_SIZE_32BIT, ND_SIZE_48BIT, ND_SIZE_80BIT };
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static const ND_UINT8 szLut[3] = { ND_SIZE_32BIT, ND_SIZE_48BIT, ND_SIZE_80BIT };
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@ -1376,7 +1375,7 @@ NdParseOperand(
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break;
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break;
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case ND_OPS_s:
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case ND_OPS_s:
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// 6-byte or 10-byte pseudo-descriptor.
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// 48 or 80 bits descriptor.
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{
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{
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static const ND_UINT8 szLut[3] = { ND_SIZE_48BIT, ND_SIZE_48BIT, ND_SIZE_80BIT };
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static const ND_UINT8 szLut[3] = { ND_SIZE_48BIT, ND_SIZE_48BIT, ND_SIZE_80BIT };
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@ -1385,7 +1384,7 @@ NdParseOperand(
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break;
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break;
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case ND_OPS_l:
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case ND_OPS_l:
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// 64 bit in 16 or 32 bit mode, 128 bit in long mode. Used by BNDMOV instruction.
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// 64 (16 or 32-bit opsize) or 128 bits (64-bit opsize).
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{
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{
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static const ND_UINT8 szLut[3] = { ND_SIZE_64BIT, ND_SIZE_64BIT, ND_SIZE_128BIT };
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static const ND_UINT8 szLut[3] = { ND_SIZE_64BIT, ND_SIZE_64BIT, ND_SIZE_128BIT };
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@ -1394,7 +1393,7 @@ NdParseOperand(
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break;
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break;
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case ND_OPS_x:
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case ND_OPS_x:
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// dq, qq or oq based on the operand-size attribute.
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// lower vector = 128 (128-bit vlen) or 256 bits (256-bit vlen).
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{
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{
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static const ND_UINT8 szLut[3] = { ND_SIZE_128BIT, ND_SIZE_256BIT, ND_SIZE_512BIT };
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static const ND_UINT8 szLut[3] = { ND_SIZE_128BIT, ND_SIZE_256BIT, ND_SIZE_512BIT };
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@ -1402,8 +1401,8 @@ NdParseOperand(
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}
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}
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break;
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break;
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case ND_OPS_n:
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case ND_OPS_fv:
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// 128, 256 or 512 bit, depending on vector length.
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// full vector = 128, 256 or 512 bits.
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{
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{
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static const ND_UINT8 szLut[3] = { ND_SIZE_128BIT, ND_SIZE_256BIT, ND_SIZE_512BIT };
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static const ND_UINT8 szLut[3] = { ND_SIZE_128BIT, ND_SIZE_256BIT, ND_SIZE_512BIT };
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@ -1411,8 +1410,8 @@ NdParseOperand(
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}
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}
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break;
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break;
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case ND_OPS_u:
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case ND_OPS_uv:
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// 256 or 512 bit, depending on vector length.
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// upper vector = 256 bits (256-bit vlen) or 512 bits (512-bit vlen)
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{
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{
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static const ND_UINT8 szLut[3] = { 0, ND_SIZE_256BIT, ND_SIZE_512BIT };
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static const ND_UINT8 szLut[3] = { 0, ND_SIZE_256BIT, ND_SIZE_512BIT };
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@ -1425,8 +1424,8 @@ NdParseOperand(
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}
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}
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break;
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break;
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case ND_OPS_e:
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case ND_OPS_ev:
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// eighth = word or dword or qword
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// eighth vector = 16, 32 or 64 bits.
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{
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{
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static const ND_UINT8 szLut[3] = { ND_SIZE_16BIT, ND_SIZE_32BIT, ND_SIZE_64BIT };
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static const ND_UINT8 szLut[3] = { ND_SIZE_16BIT, ND_SIZE_32BIT, ND_SIZE_64BIT };
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@ -1434,8 +1433,8 @@ NdParseOperand(
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}
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}
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break;
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break;
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case ND_OPS_f:
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case ND_OPS_qv:
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// fourth = dword or qword or oword
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// quarter vector = 32, 64 or 128 bits.
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{
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{
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static const ND_UINT8 szLut[3] = { ND_SIZE_32BIT, ND_SIZE_64BIT, ND_SIZE_128BIT };
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static const ND_UINT8 szLut[3] = { ND_SIZE_32BIT, ND_SIZE_64BIT, ND_SIZE_128BIT };
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@ -1443,8 +1442,8 @@ NdParseOperand(
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}
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}
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break;
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break;
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case ND_OPS_h:
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case ND_OPS_hv:
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// half = qword or oword or yword
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// half vector = 64, 128 or 256 bits.
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{
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{
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static const ND_UINT8 szLut[3] = { ND_SIZE_64BIT, ND_SIZE_128BIT, ND_SIZE_256BIT };
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static const ND_UINT8 szLut[3] = { ND_SIZE_64BIT, ND_SIZE_128BIT, ND_SIZE_256BIT };
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@ -1455,7 +1454,7 @@ NdParseOperand(
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case ND_OPS_pd:
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case ND_OPS_pd:
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case ND_OPS_ps:
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case ND_OPS_ps:
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case ND_OPS_ph:
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case ND_OPS_ph:
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// packed double or packed single or packed FP16 values.
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// 128 or 256 bits.
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{
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{
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static const ND_UINT8 szLut[3] = { ND_SIZE_128BIT, ND_SIZE_256BIT, ND_SIZE_512BIT };
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static const ND_UINT8 szLut[3] = { ND_SIZE_128BIT, ND_SIZE_256BIT, ND_SIZE_512BIT };
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@ -1464,22 +1463,22 @@ NdParseOperand(
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break;
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break;
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case ND_OPS_sd:
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case ND_OPS_sd:
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// Scalar double.
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// 128 bits scalar element (double precision).
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size = ND_SIZE_64BIT;
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size = ND_SIZE_64BIT;
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break;
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break;
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case ND_OPS_ss:
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case ND_OPS_ss:
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// Scalar single.
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// 128 bits scalar element (single precision).
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size = ND_SIZE_32BIT;
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size = ND_SIZE_32BIT;
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break;
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break;
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case ND_OPS_sh:
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case ND_OPS_sh:
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// Scalar FP16.
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// FP16 Scalar element.
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size = ND_SIZE_16BIT;
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size = ND_SIZE_16BIT;
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break;
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break;
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case ND_OPS_mib:
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case ND_OPS_mib:
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// MIB addressing, used by MPX instructions.
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// MIB addressing, the base & the index are used to form a pointer.
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size = 0;
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size = 0;
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break;
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break;
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File diff suppressed because it is too large
Load Diff
@ -318,12 +318,12 @@ typedef enum _ND_OPERAND_SIZE_SPEC
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ND_OPS_ps,
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ND_OPS_ps,
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ND_OPS_pd,
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ND_OPS_pd,
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ND_OPS_ph,
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ND_OPS_ph,
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ND_OPS_e,
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ND_OPS_ev,
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ND_OPS_f,
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ND_OPS_qv,
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ND_OPS_h,
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ND_OPS_hv,
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ND_OPS_x,
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ND_OPS_x,
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ND_OPS_n,
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ND_OPS_uv,
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ND_OPS_u,
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ND_OPS_fv,
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ND_OPS_t, // Tile register size, can be up to 1K.
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ND_OPS_t, // Tile register size, can be up to 1K.
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ND_OPS_384, // 384 bit Key Locker handle.
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ND_OPS_384, // 384 bit Key Locker handle.
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ND_OPS_512, // 512 bit Key Locker handle.
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ND_OPS_512, // 512 bit Key Locker handle.
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2023 Bitdefender
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* Copyright (c) 2020 Bitdefender
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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#ifndef DISASMTOOL_H
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#ifndef DISASMTOOL_H
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@ -52,104 +52,103 @@ valid_attributes = {
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# Explicit operands types.
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# Explicit operands types.
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#
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#
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valid_optype = [
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valid_optype = [
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'A', # Direct address: the instruction has no ModR/M byte; the address of the
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'A', # Direct addressing. Used by far branches.
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# operand is encoded in the instruction. No base register, index register,
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'B', # The vvvv field inside VEX/EVEX encodes a general purpose registr.
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# or scaling factor can be applied (for example, far JMP (EA)).
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'C', # The reg field inside Mod R/M encodes a control register.
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'B', # The VEX.vvvv field of the VEX prefix selects a general purpose register.
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'D', # The reg field inside Mod R/M encodes a debug register.
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'C', # The reg field of the ModR/M byte selects a control register (for example,
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'E', # The rm field inside Mod R/M encodes a general purpose register or memory.
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# MOV (0F20, 0F22)).
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'F', # Implicit flags register.
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'D', # The reg field of the ModR/M byte selects a debug register (for example,
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'G', # The reg field inside Mod R/M encodes a general purpose register.
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# MOV (0F21,0F23)).
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'H', # The vvvv field inside VEX/EVEX encodes a SIMD register.
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'E', # A ModR/M byte follows the opcode and specifies the operand. The operand
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'I', # Immediate encoded in instruction bytes.
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# is either a general-purpose register or a memory address. If it is a
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'J', # Relative offset encoded in instruction bytes.
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# memory address, the address is computed from a segment register and any
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# of the following values: a base register, an index register, a scaling
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# factor, a displacement.
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'F', # EFLAGS/RFLAGS Register.
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'G', # The reg field of the ModR/M byte selects a general register (for example,
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# AX (000)).
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'H', # The VEX.vvvv field of the VEX prefix selects a 128-bit XMM register or a
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# 256-bit YMM register, determined by operand type. For legacy SSE
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# encodings this operand does not exist, changing the instruction to
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# destructive form. Addition: 512 bit ZMM register may also be selected in
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# EVEX encodings.
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'I', # Immediate data: the operand value is encoded in subsequent bytes of the
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# instruction.
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'J', # The instruction contains a relative offset to be added to the instruction
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# pointer register (for example, JMP (0E9), LOOP).
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'K', # The operand is the stack.
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'K', # The operand is the stack.
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'L', # The upper 4 bits of the 8-bit immediate selects a 128-bit XMM register
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'L', # The upper 4-bit of an immediate encode a SIMD register.
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# or a 256-bit YMM register, determined by operand type. (the MSB is
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'M', # The rm field inside Mod R/M encodes memory.
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# ignored in 32-bit mode). Addition: a 512 bit ZMM register may also be
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'N', # The rm field inside Mod R/M encodes a MMX register.
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# selected using EVEX encoding.
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'O', # Moffset addressing.
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'M', # The ModR/M byte may refer only to memory (for example, BOUND, LES, LDS,
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'P', # The reg field inside Mod R/M encodes a MMX register.
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# LSS, LFS, LGS, CMPXCHG8B).
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'Q', # The rm field inside Mod R/M encodes a MMX register or memory.
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'N', # The R/M field of the ModR/M byte selects a packed-quadword, MMX
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'R', # The rm field inside Mod R/M encodes a general purpose register.
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# technology register.
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'S', # The reg field inside Mod R/M emcodes a segment register.
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'O', # The instruction has no ModR/M byte. The offset of the operand is coded
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'T', # The reg field inside Mod R/M encodes a test register.
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# as a word or double word (depending on address size attribute) in the
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'U', # The rm field inside Mod R/M encodes a SIMD register.
|
||||||
# instruction. No base register, index register, or scaling factor can be
|
'V', # The reg field inside Mod R/M encodes a SIMD register.
|
||||||
# applied (for example, MOV (A0-A3)).
|
'W', # The rm field inside Mod R/M enocdes a SIMD register or memory.
|
||||||
'P', # The reg field of the ModR/M byte selects a packed quadword MMX technology
|
'X', # DS:rSI addressing.
|
||||||
# register.
|
'Y', # ES:rDI addressing.
|
||||||
'Q', # A ModR/M byte follows the opcode and specifies the operand. The operand
|
'Z', # The low 3 bits inside the opcode encode a general purpose register.
|
||||||
# is either an MMX technology register or a memory address. If it is a
|
'rB', # The reg field inside Mod R/M enocdes a bound register.
|
||||||
# memory address, the address is computed from a segment register and any
|
'mB', # The rm field inside Mod R/M enocdes a bound register or memory.
|
||||||
# of the following values: a base register, an index register, a scaling
|
'rK', # The reg field inside Mod R/M enocdes a mask register.
|
||||||
# factor, and a displacement.
|
'vK', # The vvvv field inside VEX/EVEX encodes a mask register.
|
||||||
'R', # The R/M field of the ModR/M byte may refer only to a general register
|
'mK', # The rm field inside Mod R/M encodes a mask register.
|
||||||
# (for example, MOV (0F20-0F23)).
|
'aK', # The aaa field inside EVEX encodes a mask register.
|
||||||
'S', # The reg field of the ModR/M byte selects a segment register (for example, MOV (8C,8E)).
|
'rM', # The reg field inside Mod R/M encodes the base address of a memory operand.
|
||||||
'T', # The reg field of the ModR/M byte selects a test register (for example, MOV (0F24, 0F26)).
|
# Default segment is ES.
|
||||||
'U', # The R/M field of the ModR/M byte selects a 128-bit XMM register or a 256-bit YMM register,
|
'mM', # The rm field inside Mod R/M encodes the base address of a memory operand.
|
||||||
# determined by operand type. Addition: a 512-bit ZMM register may also be selected using EVEX
|
# Default segment is DS.
|
||||||
# encodings.
|
'rT', # The reg field inside Mod R/M encodes a tile register (AMX extension).
|
||||||
'V', # The reg field of the ModR/M byte selects a 128-bit XMM register or a 256-bit YMM register,
|
'mT', # The rm field inside Mod R/M encodes a tile register (AMX extension).
|
||||||
# determined by operand type. Addition: a 512-bit ZMM register may also be selected using
|
'vT', # The vvvv field inside VEX/EVEX encodes a tile register (AMX extension).
|
||||||
# EVEX encodings.
|
'm2zI', # Bits [1,0] of the immediate byte which encodes the fourth register.
|
||||||
'W', # A ModR/M byte follows the opcode and specifies the operand. The operand is either a 128-bit
|
|
||||||
# XMM register, a 256-bit YMM register (determined by operand type), or a memory address. If it is
|
|
||||||
# a memory address, the address is computed from a segment register and any of the following values:
|
|
||||||
# a base register, an index register, a scaling factor, and a displacement. Addition:a 512-bit ZMM
|
|
||||||
# register may also be selected # using EVEX encodings.
|
|
||||||
'X', # Memory addressed by the DS:rSI register pair (for example, MOVS, CMPS, OUTS, or LODS).
|
|
||||||
'Y', # Memory addressed by the ES:rDI register pair (for example, MOVS, CMPS, INS, STOS, or SCAS).
|
|
||||||
'Z', # The low 3 bits inside the opcode select a general purpose register. R field inside REX may
|
|
||||||
# extend it.
|
|
||||||
'rB', # The reg field selects a BND register.
|
|
||||||
'mB', # The rm field selects A BND register or a memory location.
|
|
||||||
'rK', # The reg field selects a mask register.
|
|
||||||
'vK', # The vvvv field of the VEX prefix selects a mask register.
|
|
||||||
'mK', # The rm field selects e mask register.
|
|
||||||
'aK', # The aaa field inside evex selects a mask register which is used for masking of a destination
|
|
||||||
# operand.
|
|
||||||
'rM', # The reg field inside modrm encodes the base address of a memory operand. Default segment is ES.
|
|
||||||
'mM', # The rm field inside modrm encodes the base address of a memory operand, iregardless of the mod
|
|
||||||
# fields. Default segment is DS.
|
|
||||||
'rT', # The reg field inside modrm encodes a TMM register (AMX extension).
|
|
||||||
'mT', # The rm field inside modrm encodes a TMM register (AMX extension).
|
|
||||||
'vT', # The v field inside vex encodes a TMM register (AMX extension).
|
|
||||||
'm2zI', # Bits [1,0] of the immediate byte which selects the fourth register.
|
|
||||||
]
|
]
|
||||||
|
|
||||||
# Operand sizes.
|
# Operand sizes.
|
||||||
|
# Unless otherwise stated, where multiple sizes are given, the correct size is selected by the
|
||||||
|
# operand size or vector length as follows:
|
||||||
|
# - the first size if operand size is 16-bit or vector length is 128-bit
|
||||||
|
# - the second size if operand size is 32-bit or vector length is 256-bit
|
||||||
|
# - the third size of the operand size is 64-bit or vector length is 512-bit.
|
||||||
|
# If only two sizes are given, only 16-bit and 32-bit operand sizes are considered, unles otherwise
|
||||||
|
# indicated.
|
||||||
|
# If only a size is given, that is available in all modes and with all operand sizes.
|
||||||
valid_opsize = [
|
valid_opsize = [
|
||||||
'a', # Two one-word operands in memory or two double-word operands in memory,
|
'a', # 2 x 16 bits (16-bit opsize) or 2 x 32 bits (32-bit opsize).
|
||||||
# depending on operand-size attribute (used only by the BOUND instruction).
|
|
||||||
'b', # Byte, regardless of operand-size attribute.
|
|
||||||
'c', # Byte or word, depending on operand-size attribute.
|
|
||||||
'd', # Doubleword, regardless of operand-size attribute.
|
|
||||||
|
|
||||||
'dq', # Double-quadword, regardless of operand-size attribute (XMM register or
|
|
||||||
# 128 bit memory location). A smaller quantity from the 128 bit register may be accessed.
|
|
||||||
|
|
||||||
'e', # eighth = word or dword or qword.
|
# Fixed integer sizes.
|
||||||
'f', # fourth = dword or qword or oword.
|
'b', # 8 bits.
|
||||||
'h', # half = qword or oword or yword.
|
'w', # 16 bits.
|
||||||
'n', # normal = 128, 256 or 512 bits, depending on vector length.
|
'd', # 32 bits.
|
||||||
'u', # 256 or 512 bit, depending on vector length.
|
'q', # 64 bits.
|
||||||
|
|
||||||
# VSIB addressing
|
# Variable integer sizes.
|
||||||
|
'z', # 16 bits (16-bit opsize) or 32 bits (32 or 64-bit opsize).
|
||||||
|
'v', # 16, 32 or 64 bits.
|
||||||
|
'y', # 64 bits (64-bit opsize), 32 bits othwerwise.
|
||||||
|
'yf', # 64 bits (64-bit mode), 32 bits (16, 32-bit opsize).
|
||||||
|
's', # 48 or 80 bits descriptor.
|
||||||
|
'p', # 32, 48 or 80 bits pointer.
|
||||||
|
'l', # 64 (16 or 32-bit opsize) or 128 bits (64-bit opsize).
|
||||||
|
|
||||||
|
# FPU sizes.
|
||||||
|
'fa', # 80 bits packed BCD.
|
||||||
|
'fw', # 16 bits real number.
|
||||||
|
'fd', # 32 bits real number.
|
||||||
|
'fq', # 64 bits real number.
|
||||||
|
'ft', # 80 bits real number.
|
||||||
|
'fe', # 14 bytes or 28 bytes FPU environment.
|
||||||
|
'fs', # 94 bytes or 108 bytes FPU state.
|
||||||
|
|
||||||
|
# SIMD sizes.
|
||||||
|
'dq', # 128 bits.
|
||||||
|
'qq', # 256 bits.
|
||||||
|
'oq', # 512 bits.
|
||||||
|
'ev', # 1/8 of vlen: 16, 32 or 64 bits.
|
||||||
|
'qv', # 1/4 of vlen: 32, 64 or 128 bits.
|
||||||
|
'hv', # 1/2 of vlen: 64, 128 or 256 bits.
|
||||||
|
'x', # 128 bits (128-bit vlen) or 256 bits (256-bit vlen).
|
||||||
|
'uv', # 256 bits (256-bit vlen) or 512 bits (512-bit vlen).
|
||||||
|
'fv', # 128, 256 or 512 bits.
|
||||||
|
|
||||||
|
'pd', # 128 or 256 bits.
|
||||||
|
'ps', # 128 or 256 bits.
|
||||||
|
'ph', # Packed FP16 values.
|
||||||
|
'sd', # 128 bits scalar element (double precision).
|
||||||
|
'ss', # 128 bits scalar element (single precision).
|
||||||
|
'sh', # FP16 Scalar element.
|
||||||
|
|
||||||
|
# VSIB addressing.
|
||||||
'vm32x', # VSIB addressing, using DWORD indices in XMM register, select 32/64 bit.
|
'vm32x', # VSIB addressing, using DWORD indices in XMM register, select 32/64 bit.
|
||||||
'vm32y', # VSIB addressing, using DWORD indices in YMM register, select 32/64 bit.
|
'vm32y', # VSIB addressing, using DWORD indices in YMM register, select 32/64 bit.
|
||||||
'vm32z', # VSIB addressing, using DWORD indices in ZMM register, select 32/64 bit.
|
'vm32z', # VSIB addressing, using DWORD indices in ZMM register, select 32/64 bit.
|
||||||
@ -161,52 +160,25 @@ valid_opsize = [
|
|||||||
'vm64h', # VSIB addressing, using QWORD indices in half register, select 32/64 bit.
|
'vm64h', # VSIB addressing, using QWORD indices in half register, select 32/64 bit.
|
||||||
'vm64n', # VSIB addressing, using QWORD indices in normal register, select 32/64 bit.
|
'vm64n', # VSIB addressing, using QWORD indices in normal register, select 32/64 bit.
|
||||||
|
|
||||||
# MIB addressing
|
# MIB addressing.
|
||||||
'mib', # MIB addressing, the base & the index are used to form a pointer.
|
'mib', # MIB addressing, the base & the index are used to form a pointer.
|
||||||
|
|
||||||
# Stack sizes and partial access
|
# Stack sizes and partial access.
|
||||||
'v2', # Two stack words.
|
'v2', # Two stack words.
|
||||||
'v3', # Three stack words.
|
'v3', # Three stack words.
|
||||||
'v4', # Four stack words.
|
'v4', # Four stack words.
|
||||||
'v5', # Five stack words.
|
'v5', # Five stack words.
|
||||||
'v8', # Eight stack words.
|
'v8', # Eight stack words.
|
||||||
|
|
||||||
# These are aliased over 'dq.*' encodings.
|
# Misc and special sizes.
|
||||||
'o', # Always 128 bits/2 QWORDs. Same as 'dq'.
|
|
||||||
'oq', # 512 bit regardless the operand size/vector length.
|
|
||||||
'p', # 32, 48 or 80 bits pointer, depending on operand size.
|
|
||||||
'pd', # 128 bit or 256 bit double-precision fp data.
|
|
||||||
'ps', # 128 bit or 256 bit single-precision fp data.
|
|
||||||
'ph', # Packed FP16 values.
|
|
||||||
'q', # Always 1 QWORD.
|
|
||||||
'qq', # Always 4 QWORDs.
|
|
||||||
's', # 6-byte or 10-byte pseudo-descriptor.
|
|
||||||
'sd', # Scalar element of 128 bit double-precision fp data.
|
|
||||||
'ss', # Scalar element of 128 bit single-precision fp data.
|
|
||||||
'sh', # Scalar element of FP16.
|
|
||||||
'v', # WORD, DWORD or QWORD, depending on operand size.
|
|
||||||
'w', # Always WORD.
|
|
||||||
'x', # 128 bit, 256 bit, depending on operand size.
|
|
||||||
'y', # DWORD or QWORD, depending on operand size.
|
|
||||||
'yf', # Always QWORD in 64 bit mode and DWORD in 16/32 bit mode.
|
|
||||||
'z', # WORD for 16 bit op size, DWORD for 32 & 64 bit operand size.
|
|
||||||
'?', # Unknown operand size. Depends on many factors (for example, XSAVE).
|
'?', # Unknown operand size. Depends on many factors (for example, XSAVE).
|
||||||
'0', # Used for instructions that do not actually access any memory.
|
'0', # Used for instructions that do not actually access any memory.
|
||||||
'asz', # The size of the operand is given by the current addressing mode.
|
'asz', # The size of the operand is given by the current addressing mode.
|
||||||
'ssz', # The size of the operand is given by the current stack mode.
|
'ssz', # The size of the operand is given by the current stack mode.
|
||||||
'fa', # FPU integer binary coded decimal.
|
|
||||||
'fw', # FPU real word.
|
|
||||||
'fd', # FPU real dword.
|
|
||||||
'fq', # FPU real qword.
|
|
||||||
'ft', # FPU real extended.
|
|
||||||
'fe', # FPU environment.
|
|
||||||
'fs', # FPU state.
|
|
||||||
'l', # Either a 64 bit or a 128 bit operand size (used by BNDMOV).
|
|
||||||
'rx', # 512 bytes extended state.
|
'rx', # 512 bytes extended state.
|
||||||
'cl', # 32/64/128 bytes - the size of one cache line.
|
'cl', # 32/64/128 bytes - the size of one cache line.
|
||||||
'12', # 4 bytes (0) + 8 bytes (old SSP), used by SAVEPREVSSP.
|
'12', # 4 bytes (0) + 8 bytes (old SSP), used by SAVEPREVSSP.
|
||||||
't', # A tile register. The size varies dependning on execution environment, but can be as high as 1K.
|
't', # A tile register. The size varies depending on execution environment, but can be as high as 1K.
|
||||||
|
|
||||||
'384', # 384 bits representing a Key Locker handle.
|
'384', # 384 bits representing a Key Locker handle.
|
||||||
'512', # 512 bits representing a Key Locker handle.
|
'512', # 512 bits representing a Key Locker handle.
|
||||||
'4096', # 4096 bits representing an MSR address/value table.
|
'4096', # 4096 bits representing an MSR address/value table.
|
||||||
|
@ -205,11 +205,11 @@ opsize = {
|
|||||||
'c' : 'ND_OPS_c',
|
'c' : 'ND_OPS_c',
|
||||||
'd' : 'ND_OPS_d',
|
'd' : 'ND_OPS_d',
|
||||||
'dq' : 'ND_OPS_dq',
|
'dq' : 'ND_OPS_dq',
|
||||||
'e' : 'ND_OPS_e',
|
'ev' : 'ND_OPS_ev',
|
||||||
'f' : 'ND_OPS_f',
|
'qv' : 'ND_OPS_qv',
|
||||||
'h' : 'ND_OPS_h',
|
'hv' : 'ND_OPS_hv',
|
||||||
'n' : 'ND_OPS_n',
|
'fv' : 'ND_OPS_fv',
|
||||||
'u' : 'ND_OPS_u',
|
'uv' : 'ND_OPS_uv',
|
||||||
'vm32x' : 'ND_OPS_vm32x',
|
'vm32x' : 'ND_OPS_vm32x',
|
||||||
'vm32y' : 'ND_OPS_vm32y',
|
'vm32y' : 'ND_OPS_vm32y',
|
||||||
'vm32z' : 'ND_OPS_vm32z',
|
'vm32z' : 'ND_OPS_vm32z',
|
||||||
|
@ -1,14 +1,14 @@
|
|||||||
# Mnemonic Explicit Operands Implicit Encoding Flags, Prefixes, Set, Category, Class, RW map, Additional ops
|
# Mnemonic Explicit Operands Implicit Encoding Flags, Prefixes, Set, Category, Class, RW map, Additional ops
|
||||||
#------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
|
#------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
|
||||||
# 0x10 - 0x1F
|
# 0x10 - 0x1F
|
||||||
VMOVUPS Vn{K}{z},Wn nil [evex m:1 p:0 l:x w:0 0x10 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
VMOVUPS Vfv{K}{z},Wfv nil [evex m:1 p:0 l:x w:0 0x10 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
||||||
VMOVUPD Vn{K}{z},Wn nil [evex m:1 p:1 l:x w:1 0x10 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
VMOVUPD Vfv{K}{z},Wfv nil [evex m:1 p:1 l:x w:1 0x10 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
||||||
VMOVSS Vdq{K}{z},Mss nil [evex m:1 p:2 l:i w:0 0x10 /r:mem] s:AVX512F, t:DATAXFER, l:t1s, e:E10, w:W|R|R
|
VMOVSS Vdq{K}{z},Mss nil [evex m:1 p:2 l:i w:0 0x10 /r:mem] s:AVX512F, t:DATAXFER, l:t1s, e:E10, w:W|R|R
|
||||||
VMOVSS Vdq{K}{z},Hdq,Udq nil [evex m:1 p:2 l:i w:0 0x10 /r:reg] s:AVX512F, t:DATAXFER, l:t1s, e:E10, w:W|R|R|R
|
VMOVSS Vdq{K}{z},Hdq,Udq nil [evex m:1 p:2 l:i w:0 0x10 /r:reg] s:AVX512F, t:DATAXFER, l:t1s, e:E10, w:W|R|R|R
|
||||||
VMOVSD Vdq{K}{z},Msd nil [evex m:1 p:3 l:i w:1 0x10 /r:mem] s:AVX512F, t:DATAXFER, l:t1s, e:E10, w:W|R|R
|
VMOVSD Vdq{K}{z},Msd nil [evex m:1 p:3 l:i w:1 0x10 /r:mem] s:AVX512F, t:DATAXFER, l:t1s, e:E10, w:W|R|R
|
||||||
VMOVSD Vdq{K}{z},Hdq,Udq nil [evex m:1 p:3 l:i w:1 0x10 /r:reg] s:AVX512F, t:DATAXFER, l:t1s, e:E10, w:W|R|R|R
|
VMOVSD Vdq{K}{z},Hdq,Udq nil [evex m:1 p:3 l:i w:1 0x10 /r:reg] s:AVX512F, t:DATAXFER, l:t1s, e:E10, w:W|R|R|R
|
||||||
VMOVUPS Wn{K}{z},Vn nil [evex m:1 p:0 l:x w:0 0x11 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
VMOVUPS Wfv{K}{z},Vfv nil [evex m:1 p:0 l:x w:0 0x11 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
||||||
VMOVUPD Wn{K}{z},Vn nil [evex m:1 p:1 l:x w:1 0x11 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
VMOVUPD Wfv{K}{z},Vfv nil [evex m:1 p:1 l:x w:1 0x11 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
||||||
VMOVSS Mss{K},Vdq nil [evex m:1 p:2 l:i w:0 0x11 /r:mem] s:AVX512F, t:DATAXFER, l:t1s, e:E10, w:W|R|R
|
VMOVSS Mss{K},Vdq nil [evex m:1 p:2 l:i w:0 0x11 /r:mem] s:AVX512F, t:DATAXFER, l:t1s, e:E10, w:W|R|R
|
||||||
VMOVSS Udq{K}{z},Hdq,Vdq nil [evex m:1 p:2 l:i w:0 0x11 /r:reg] s:AVX512F, t:DATAXFER, l:t1s, e:E10, w:W|R|R|R
|
VMOVSS Udq{K}{z},Hdq,Vdq nil [evex m:1 p:2 l:i w:0 0x11 /r:reg] s:AVX512F, t:DATAXFER, l:t1s, e:E10, w:W|R|R|R
|
||||||
VMOVSD Msd{K},Vdq nil [evex m:1 p:3 l:i w:1 0x11 /r:mem] s:AVX512F, t:DATAXFER, l:t1s, e:E10, w:W|R|R
|
VMOVSD Msd{K},Vdq nil [evex m:1 p:3 l:i w:1 0x11 /r:mem] s:AVX512F, t:DATAXFER, l:t1s, e:E10, w:W|R|R
|
||||||
@ -16,33 +16,33 @@ VMOVSD Udq{K}{z},Hdq,Vdq nil [evex m:1 p:3 l:i w:
|
|||||||
VMOVLPS Vdq,Hdq,Mq nil [evex m:1 p:0 l:0 w:0 0x12 /r:mem] s:AVX512F, t:DATAXFER, l:t2, e:E9NF, w:W|R|R
|
VMOVLPS Vdq,Hdq,Mq nil [evex m:1 p:0 l:0 w:0 0x12 /r:mem] s:AVX512F, t:DATAXFER, l:t2, e:E9NF, w:W|R|R
|
||||||
VMOVHLPS Vdq,Hdq,Udq nil [evex m:1 p:0 l:0 w:0 0x12 /r:reg] s:AVX512F, t:DATAXFER, e:E7NM, w:W|R|R
|
VMOVHLPS Vdq,Hdq,Udq nil [evex m:1 p:0 l:0 w:0 0x12 /r:reg] s:AVX512F, t:DATAXFER, e:E7NM, w:W|R|R
|
||||||
VMOVLPD Vdq,Hdq,Mq nil [evex m:1 p:1 l:0 w:1 0x12 /r:mem] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R|R
|
VMOVLPD Vdq,Hdq,Mq nil [evex m:1 p:1 l:0 w:1 0x12 /r:mem] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R|R
|
||||||
VMOVSLDUP Vn{K}{z},Wn nil [evex m:1 p:2 l:x w:0 0x12 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4NFnb, w:W|R|R
|
VMOVSLDUP Vfv{K}{z},Wfv nil [evex m:1 p:2 l:x w:0 0x12 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4NFnb, w:W|R|R
|
||||||
VMOVDDUP Vdq{K}{z},Wq nil [evex m:1 p:3 l:0 w:1 0x12 /r] s:AVX512F, t:DATAXFER, l:dup, e:E5NF, w:W|R|R
|
VMOVDDUP Vdq{K}{z},Wq nil [evex m:1 p:3 l:0 w:1 0x12 /r] s:AVX512F, t:DATAXFER, l:dup, e:E5NF, w:W|R|R
|
||||||
VMOVDDUP Vqq{K}{z},Wqq nil [evex m:1 p:3 l:1 w:1 0x12 /r] s:AVX512F, t:DATAXFER, l:dup, e:E5NF, w:W|R|R
|
VMOVDDUP Vqq{K}{z},Wqq nil [evex m:1 p:3 l:1 w:1 0x12 /r] s:AVX512F, t:DATAXFER, l:dup, e:E5NF, w:W|R|R
|
||||||
VMOVDDUP Voq{K}{z},Woq nil [evex m:1 p:3 l:2 w:1 0x12 /r] s:AVX512F, t:DATAXFER, l:dup, e:E5NF, w:W|R|R
|
VMOVDDUP Voq{K}{z},Woq nil [evex m:1 p:3 l:2 w:1 0x12 /r] s:AVX512F, t:DATAXFER, l:dup, e:E5NF, w:W|R|R
|
||||||
VMOVLPS Mq,Vdq nil [evex m:1 p:0 l:0 w:0 0x13 /r:mem] s:AVX512F, t:DATAXFER, l:t2, e:E9NF, w:W|R
|
VMOVLPS Mq,Vdq nil [evex m:1 p:0 l:0 w:0 0x13 /r:mem] s:AVX512F, t:DATAXFER, l:t2, e:E9NF, w:W|R
|
||||||
VMOVLPD Mq,Vdq nil [evex m:1 p:1 l:0 w:1 0x13 /r:mem] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R
|
VMOVLPD Mq,Vdq nil [evex m:1 p:1 l:0 w:1 0x13 /r:mem] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R
|
||||||
VUNPCKLPS Vn{K}{z},Hn,Wn|B32 nil [evex m:1 p:0 l:x w:0 0x14 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
VUNPCKLPS Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:1 p:0 l:x w:0 0x14 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VUNPCKLPD Vn{K}{z},Hn,Wn|B64 nil [evex m:1 p:1 l:x w:1 0x14 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
VUNPCKLPD Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:1 p:1 l:x w:1 0x14 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VUNPCKHPS Vn{K}{z},Hn,Wn|B32 nil [evex m:1 p:0 l:x w:0 0x15 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
VUNPCKHPS Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:1 p:0 l:x w:0 0x15 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VUNPCKHPD Vn{K}{z},Hn,Wn|B64 nil [evex m:1 p:1 l:x w:1 0x15 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
VUNPCKHPD Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:1 p:1 l:x w:1 0x15 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VMOVHPS Vdq,Hdq,Mq nil [evex m:1 p:0 l:0 w:0 0x16 /r:mem] s:AVX512F, t:DATAXFER, l:t2, e:E9NF, w:W|R|R
|
VMOVHPS Vdq,Hdq,Mq nil [evex m:1 p:0 l:0 w:0 0x16 /r:mem] s:AVX512F, t:DATAXFER, l:t2, e:E9NF, w:W|R|R
|
||||||
VMOVLHPS Vdq,Hdq,Udq nil [evex m:1 p:0 l:0 w:0 0x16 /r:reg] s:AVX512F, t:DATAXFER, e:E7NM, w:W|R|R
|
VMOVLHPS Vdq,Hdq,Udq nil [evex m:1 p:0 l:0 w:0 0x16 /r:reg] s:AVX512F, t:DATAXFER, e:E7NM, w:W|R|R
|
||||||
VMOVHPD Vdq,Hdq,Mq nil [evex m:1 p:1 l:0 w:1 0x16 /r:mem] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R|R
|
VMOVHPD Vdq,Hdq,Mq nil [evex m:1 p:1 l:0 w:1 0x16 /r:mem] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R|R
|
||||||
VMOVSHDUP Vn{K}{z},Wn nil [evex m:1 p:2 l:x w:0 0x16 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4NFnb, w:W|R|R
|
VMOVSHDUP Vfv{K}{z},Wfv nil [evex m:1 p:2 l:x w:0 0x16 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4NFnb, w:W|R|R
|
||||||
VMOVHPS Mq,Vdq nil [evex m:1 p:0 l:0 w:0 0x17 /r:mem] s:AVX512F, t:DATAXFER, l:t2, e:E9NF, w:W|R
|
VMOVHPS Mq,Vdq nil [evex m:1 p:0 l:0 w:0 0x17 /r:mem] s:AVX512F, t:DATAXFER, l:t2, e:E9NF, w:W|R
|
||||||
VMOVHPD Mq,Vdq nil [evex m:1 p:1 l:0 w:1 0x17 /r:mem] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R
|
VMOVHPD Mq,Vdq nil [evex m:1 p:1 l:0 w:1 0x17 /r:mem] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R
|
||||||
|
|
||||||
# 0x20 - 0x2F
|
# 0x20 - 0x2F
|
||||||
VMOVAPS Vn{K}{z},Wn nil [evex m:1 p:0 l:x w:0 0x28 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E1, w:W|R|R
|
VMOVAPS Vfv{K}{z},Wfv nil [evex m:1 p:0 l:x w:0 0x28 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E1, w:W|R|R
|
||||||
VMOVAPD Vn{K}{z},Wn nil [evex m:1 p:1 l:x w:1 0x28 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E1, w:W|R|R
|
VMOVAPD Vfv{K}{z},Wfv nil [evex m:1 p:1 l:x w:1 0x28 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E1, w:W|R|R
|
||||||
VMOVAPS Wn{K}{z},Vn nil [evex m:1 p:0 l:x w:0 0x29 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E1, w:W|R|R
|
VMOVAPS Wfv{K}{z},Vfv nil [evex m:1 p:0 l:x w:0 0x29 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E1, w:W|R|R
|
||||||
VMOVAPD Wn{K}{z},Vn nil [evex m:1 p:1 l:x w:1 0x29 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E1, w:W|R|R
|
VMOVAPD Wfv{K}{z},Vfv nil [evex m:1 p:1 l:x w:1 0x29 /r] s:AVX512F, t:DATAXFER, l:fvm, e:E1, w:W|R|R
|
||||||
VCVTSI2SS Vdq,Hdq{er},Ey nil [evex m:1 p:2 l:i w:x 0x2A /r] s:AVX512F, t:CONVERT, l:t1s, e:E3, w:W|R|R, a:IWO64
|
VCVTSI2SS Vdq,Hdq{er},Ey nil [evex m:1 p:2 l:i w:x 0x2A /r] s:AVX512F, t:CONVERT, l:t1s, e:E3, w:W|R|R, a:IWO64
|
||||||
VCVTSI2SD Vdq,Hdq,Ey nil [evex m:1 p:3 l:i w:0 0x2A /r] s:AVX512F, t:CONVERT, l:t1s, e:E10NF, w:W|R|R, a:IER|IWO64
|
VCVTSI2SD Vdq,Hdq,Ey nil [evex m:1 p:3 l:i w:0 0x2A /r] s:AVX512F, t:CONVERT, l:t1s, e:E10NF, w:W|R|R, a:IER|IWO64
|
||||||
VCVTSI2SD Vdq,Hdq{er},Ey nil [evex m:1 p:3 l:i w:1 0x2A /r] s:AVX512F, t:CONVERT, l:t1s, e:E3, w:W|R|R, a:IWO64
|
VCVTSI2SD Vdq,Hdq{er},Ey nil [evex m:1 p:3 l:i w:1 0x2A /r] s:AVX512F, t:CONVERT, l:t1s, e:E3, w:W|R|R, a:IWO64
|
||||||
VMOVNTPS Mn,Vn nil [evex m:1 p:0 l:x w:0 0x2B /r:mem] s:AVX512F, t:DATAXFER, l:fvm, e:E1NF, w:W|R
|
VMOVNTPS Mfv,Vfv nil [evex m:1 p:0 l:x w:0 0x2B /r:mem] s:AVX512F, t:DATAXFER, l:fvm, e:E1NF, w:W|R
|
||||||
VMOVNTPD Mn,Vn nil [evex m:1 p:1 l:x w:1 0x2B /r:mem] s:AVX512F, t:DATAXFER, l:fvm, e:E1NF, w:W|R
|
VMOVNTPD Mfv,Vfv nil [evex m:1 p:1 l:x w:1 0x2B /r:mem] s:AVX512F, t:DATAXFER, l:fvm, e:E1NF, w:W|R
|
||||||
VCVTTSS2SI Gy,Wss{sae} nil [evex m:1 p:2 l:i w:x 0x2C /r] s:AVX512F, t:CONVERT, l:t1f, e:E3, w:W|R, a:IWO64
|
VCVTTSS2SI Gy,Wss{sae} nil [evex m:1 p:2 l:i w:x 0x2C /r] s:AVX512F, t:CONVERT, l:t1f, e:E3, w:W|R, a:IWO64
|
||||||
VCVTTSD2SI Gy,Wsd{sae} nil [evex m:1 p:3 l:i w:x 0x2C /r] s:AVX512F, t:CONVERT, l:t1f, e:E3, w:W|R, a:IWO64
|
VCVTTSD2SI Gy,Wsd{sae} nil [evex m:1 p:3 l:i w:x 0x2C /r] s:AVX512F, t:CONVERT, l:t1f, e:E3, w:W|R, a:IWO64
|
||||||
VCVTSS2SI Gy,Wss{er} nil [evex m:1 p:2 l:i w:x 0x2D /r] s:AVX512F, t:CONVERT, l:t1f, e:E3, w:W|R, a:IWO64
|
VCVTSS2SI Gy,Wss{er} nil [evex m:1 p:2 l:i w:x 0x2D /r] s:AVX512F, t:CONVERT, l:t1f, e:E3, w:W|R, a:IWO64
|
||||||
@ -53,129 +53,129 @@ VCOMISS Vdq,Wss{sae} Fv [evex m:1 p:0 l:i w:
|
|||||||
VCOMISD Vdq,Wsd{sae} Fv [evex m:1 p:1 l:i w:1 0x2F /r] s:AVX512F, t:AVX512, l:t1s, w:R|R|W, e:E3, f:COMIS
|
VCOMISD Vdq,Wsd{sae} Fv [evex m:1 p:1 l:i w:1 0x2F /r] s:AVX512F, t:AVX512, l:t1s, w:R|R|W, e:E3, f:COMIS
|
||||||
|
|
||||||
# 0x50 - 0x5F
|
# 0x50 - 0x5F
|
||||||
VSQRTPS Vn{K}{z},Wn|B32{er} nil [evex m:1 p:0 l:x w:0 0x51 /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R
|
VSQRTPS Vfv{K}{z},Wfv|B32{er} nil [evex m:1 p:0 l:x w:0 0x51 /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R
|
||||||
VSQRTPD Vn{K}{z},Wn|B64{er} nil [evex m:1 p:1 l:x w:1 0x51 /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R
|
VSQRTPD Vfv{K}{z},Wfv|B64{er} nil [evex m:1 p:1 l:x w:1 0x51 /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R
|
||||||
VSQRTSS Vdq{K}{z},Hdq,Wss{er} nil [evex m:1 p:2 l:i w:0 0x51 /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
VSQRTSS Vdq{K}{z},Hdq,Wss{er} nil [evex m:1 p:2 l:i w:0 0x51 /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
||||||
VSQRTSD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:1 p:3 l:i w:1 0x51 /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
VSQRTSD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:1 p:3 l:i w:1 0x51 /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
||||||
VANDPS Vn{K}{z},Hn,Wn|B32 nil [evex m:1 p:0 l:x w:0 0x54 /r] s:AVX512DQ, t:LOGICAL_FP, l:fv, e:E4, w:W|R|R|R
|
VANDPS Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:1 p:0 l:x w:0 0x54 /r] s:AVX512DQ, t:LOGICAL_FP, l:fv, e:E4, w:W|R|R|R
|
||||||
VANDPD Vn{K}{z},Hn,Wn|B64 nil [evex m:1 p:1 l:x w:1 0x54 /r] s:AVX512DQ, t:LOGICAL_FP, l:fv, e:E4, w:W|R|R|R
|
VANDPD Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:1 p:1 l:x w:1 0x54 /r] s:AVX512DQ, t:LOGICAL_FP, l:fv, e:E4, w:W|R|R|R
|
||||||
VANDNPS Vn{K}{z},Hn,Wn|B32 nil [evex m:1 p:0 l:x w:0 0x55 /r] s:AVX512DQ, t:LOGICAL_FP, l:fv, e:E4, w:W|R|R|R
|
VANDNPS Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:1 p:0 l:x w:0 0x55 /r] s:AVX512DQ, t:LOGICAL_FP, l:fv, e:E4, w:W|R|R|R
|
||||||
VANDNPD Vn{K}{z},Hn,Wn|B64 nil [evex m:1 p:1 l:x w:1 0x55 /r] s:AVX512DQ, t:LOGICAL_FP, l:fv, e:E4, w:W|R|R|R
|
VANDNPD Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:1 p:1 l:x w:1 0x55 /r] s:AVX512DQ, t:LOGICAL_FP, l:fv, e:E4, w:W|R|R|R
|
||||||
VORPS Vn{K}{z},Hn,Wn|B32 nil [evex m:1 p:0 l:x w:0 0x56 /r] s:AVX512DQ, t:LOGICAL_FP, l:fv, e:E4, w:W|R|R|R
|
VORPS Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:1 p:0 l:x w:0 0x56 /r] s:AVX512DQ, t:LOGICAL_FP, l:fv, e:E4, w:W|R|R|R
|
||||||
VORPD Vn{K}{z},Hn,Wn|B64 nil [evex m:1 p:1 l:x w:1 0x56 /r] s:AVX512DQ, t:LOGICAL_FP, l:fv, e:E4, w:W|R|R|R
|
VORPD Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:1 p:1 l:x w:1 0x56 /r] s:AVX512DQ, t:LOGICAL_FP, l:fv, e:E4, w:W|R|R|R
|
||||||
VXORPS Vn{K}{z},Hn,Wn|B32 nil [evex m:1 p:0 l:x w:0 0x57 /r] s:AVX512DQ, t:LOGICAL_FP, l:fv, e:E4, w:W|R|R|R
|
VXORPS Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:1 p:0 l:x w:0 0x57 /r] s:AVX512DQ, t:LOGICAL_FP, l:fv, e:E4, w:W|R|R|R
|
||||||
VXORPD Vn{K}{z},Hn,Wn|B64 nil [evex m:1 p:1 l:x w:1 0x57 /r] s:AVX512DQ, t:LOGICAL_FP, l:fv, e:E4, w:W|R|R|R
|
VXORPD Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:1 p:1 l:x w:1 0x57 /r] s:AVX512DQ, t:LOGICAL_FP, l:fv, e:E4, w:W|R|R|R
|
||||||
VADDPS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:1 p:0 l:x w:0 0x58 /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VADDPS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:1 p:0 l:x w:0 0x58 /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VADDPD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:1 p:1 l:x w:1 0x58 /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VADDPD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:1 p:1 l:x w:1 0x58 /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VADDSS Vdq{K}{z},Hdq,Wss{er} nil [evex m:1 p:2 l:i w:0 0x58 /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
VADDSS Vdq{K}{z},Hdq,Wss{er} nil [evex m:1 p:2 l:i w:0 0x58 /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
||||||
VADDSD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:1 p:3 l:i w:1 0x58 /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
VADDSD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:1 p:3 l:i w:1 0x58 /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
||||||
VMULPS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:1 p:0 l:x w:0 0x59 /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VMULPS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:1 p:0 l:x w:0 0x59 /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VMULPD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:1 p:1 l:x w:1 0x59 /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VMULPD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:1 p:1 l:x w:1 0x59 /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VMULSS Vdq{K}{z},Hdq,Wss{er} nil [evex m:1 p:2 l:i w:0 0x59 /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
VMULSS Vdq{K}{z},Hdq,Wss{er} nil [evex m:1 p:2 l:i w:0 0x59 /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
||||||
VMULSD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:1 p:3 l:i w:1 0x59 /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
VMULSD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:1 p:3 l:i w:1 0x59 /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
||||||
VCVTPS2PD Vn{K}{z},Wh|B32{sae} nil [evex m:1 p:0 l:x w:0 0x5A /r] s:AVX512F, t:CONVERT, l:hv, e:E3, w:W|R|R
|
VCVTPS2PD Vfv{K}{z},Whv|B32{sae} nil [evex m:1 p:0 l:x w:0 0x5A /r] s:AVX512F, t:CONVERT, l:hv, e:E3, w:W|R|R
|
||||||
VCVTPD2PS Vh{K}{z},Wn|B64{er} nil [evex m:1 p:1 l:x w:1 0x5A /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
VCVTPD2PS Vhv{K}{z},Wfv|B64{er} nil [evex m:1 p:1 l:x w:1 0x5A /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||||
VCVTSS2SD Vdq{K}{z},Hdq,Wss{sae} nil [evex m:1 p:2 l:i w:0 0x5A /r] s:AVX512F, t:CONVERT, l:t1s, e:E3, w:W|R|R|R
|
VCVTSS2SD Vdq{K}{z},Hdq,Wss{sae} nil [evex m:1 p:2 l:i w:0 0x5A /r] s:AVX512F, t:CONVERT, l:t1s, e:E3, w:W|R|R|R
|
||||||
VCVTSD2SS Vdq{K}{z},Hdq,Wsd{er} nil [evex m:1 p:3 l:i w:1 0x5A /r] s:AVX512F, t:CONVERT, l:t1s, e:E3, w:W|R|R|R
|
VCVTSD2SS Vdq{K}{z},Hdq,Wsd{er} nil [evex m:1 p:3 l:i w:1 0x5A /r] s:AVX512F, t:CONVERT, l:t1s, e:E3, w:W|R|R|R
|
||||||
VCVTDQ2PS Vn{K}{z},Wn|B32{er} nil [evex m:1 p:0 l:x w:0 0x5B /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
VCVTDQ2PS Vfv{K}{z},Wfv|B32{er} nil [evex m:1 p:0 l:x w:0 0x5B /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||||
VCVTQQ2PS Vh{K}{z},Wn|B64{er} nil [evex m:1 p:0 l:x w:1 0x5B /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
VCVTQQ2PS Vhv{K}{z},Wfv|B64{er} nil [evex m:1 p:0 l:x w:1 0x5B /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||||
VCVTPS2DQ Vn{K}{z},Wn|B32{er} nil [evex m:1 p:1 l:x w:0 0x5B /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
VCVTPS2DQ Vfv{K}{z},Wfv|B32{er} nil [evex m:1 p:1 l:x w:0 0x5B /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||||
VCVTTPS2DQ Vn{K}{z},Wn|B32{sae} nil [evex m:1 p:2 l:x w:0 0x5B /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
VCVTTPS2DQ Vfv{K}{z},Wfv|B32{sae} nil [evex m:1 p:2 l:x w:0 0x5B /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||||
VSUBPS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:1 p:0 l:x w:0 0x5C /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VSUBPS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:1 p:0 l:x w:0 0x5C /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VSUBPD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:1 p:1 l:x w:1 0x5C /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VSUBPD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:1 p:1 l:x w:1 0x5C /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VSUBSS Vdq{K}{z},Hdq,Wss{er} nil [evex m:1 p:2 l:i w:0 0x5C /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
VSUBSS Vdq{K}{z},Hdq,Wss{er} nil [evex m:1 p:2 l:i w:0 0x5C /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
||||||
VSUBSD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:1 p:3 l:i w:1 0x5C /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
VSUBSD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:1 p:3 l:i w:1 0x5C /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
||||||
VMINPS Vn{K}{z},Hn,Wn|B32{sae} nil [evex m:1 p:0 l:x w:0 0x5D /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VMINPS Vfv{K}{z},Hfv,Wfv|B32{sae} nil [evex m:1 p:0 l:x w:0 0x5D /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VMINPD Vn{K}{z},Hn,Wn|B64{sae} nil [evex m:1 p:1 l:x w:1 0x5D /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VMINPD Vfv{K}{z},Hfv,Wfv|B64{sae} nil [evex m:1 p:1 l:x w:1 0x5D /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VMINSS Vdq{K}{z},Hdq,Wss{sae} nil [evex m:1 p:2 l:i w:0 0x5D /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
VMINSS Vdq{K}{z},Hdq,Wss{sae} nil [evex m:1 p:2 l:i w:0 0x5D /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
||||||
VMINSD Vdq{K}{z},Hdq,Wsd{sae} nil [evex m:1 p:3 l:i w:1 0x5D /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
VMINSD Vdq{K}{z},Hdq,Wsd{sae} nil [evex m:1 p:3 l:i w:1 0x5D /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
||||||
VDIVPS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:1 p:0 l:x w:0 0x5E /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VDIVPS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:1 p:0 l:x w:0 0x5E /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VDIVPD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:1 p:1 l:x w:1 0x5E /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VDIVPD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:1 p:1 l:x w:1 0x5E /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VDIVSS Vdq{K}{z},Hdq,Wss{er} nil [evex m:1 p:2 l:i w:0 0x5E /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
VDIVSS Vdq{K}{z},Hdq,Wss{er} nil [evex m:1 p:2 l:i w:0 0x5E /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
||||||
VDIVSD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:1 p:3 l:i w:1 0x5E /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
VDIVSD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:1 p:3 l:i w:1 0x5E /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
||||||
VMAXPS Vn{K}{z},Hn,Wn|B32{sae} nil [evex m:1 p:0 l:x w:0 0x5F /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VMAXPS Vfv{K}{z},Hfv,Wfv|B32{sae} nil [evex m:1 p:0 l:x w:0 0x5F /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VMAXPD Vn{K}{z},Hn,Wn|B64{sae} nil [evex m:1 p:1 l:x w:1 0x5F /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VMAXPD Vfv{K}{z},Hfv,Wfv|B64{sae} nil [evex m:1 p:1 l:x w:1 0x5F /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VMAXSS Vdq{K}{z},Hdq,Wss{sae} nil [evex m:1 p:2 l:i w:0 0x5F /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
VMAXSS Vdq{K}{z},Hdq,Wss{sae} nil [evex m:1 p:2 l:i w:0 0x5F /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
||||||
VMAXSD Vdq{K}{z},Hdq,Wsd{sae} nil [evex m:1 p:3 l:i w:1 0x5F /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
VMAXSD Vdq{K}{z},Hdq,Wsd{sae} nil [evex m:1 p:3 l:i w:1 0x5F /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
||||||
|
|
||||||
# 0x60 - 0x6F
|
# 0x60 - 0x6F
|
||||||
VPUNPCKLBW Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:x 0x60 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
VPUNPCKLBW Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:x 0x60 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
||||||
VPUNPCKLWD Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:x 0x61 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
VPUNPCKLWD Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:x 0x61 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
||||||
VPUNPCKLDQ Vn{K}{z},Hn,Wn|B32 nil [evex m:1 p:1 l:x w:0 0x62 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
VPUNPCKLDQ Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:1 p:1 l:x w:0 0x62 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VPACKSSWB Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0x63 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
VPACKSSWB Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0x63 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
||||||
VPCMPGTB rKq{K},Hn,Wn nil [evex m:1 p:1 l:x w:i 0x64 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPCMPGTB rKq{K},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0x64 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPCMPGTW rKq{K},Hn,Wn nil [evex m:1 p:1 l:x w:i 0x65 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPCMPGTW rKq{K},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0x65 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPCMPGTD rKq{K},Hn,Wn|B32 nil [evex m:1 p:1 l:x w:0 0x66 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPCMPGTD rKq{K},Hfv,Wfv|B32 nil [evex m:1 p:1 l:x w:0 0x66 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPACKUSWB Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0x67 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
VPACKUSWB Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0x67 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
||||||
VPUNPCKHBW Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0x68 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
VPUNPCKHBW Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0x68 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
||||||
VPUNPCKHWD Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0x69 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
VPUNPCKHWD Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0x69 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
||||||
VPUNPCKHDQ Vn{K}{z},Hn,Wn|B32 nil [evex m:1 p:1 l:x w:0 0x6A /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
VPUNPCKHDQ Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:1 p:1 l:x w:0 0x6A /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VPACKSSDW Vn{K}{z},Hn,Wn|B32 nil [evex m:1 p:1 l:x w:0 0x6B /r] s:AVX512BW, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
VPACKSSDW Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:1 p:1 l:x w:0 0x6B /r] s:AVX512BW, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VPUNPCKLQDQ Vn{K}{z},Hn,Wn|B64 nil [evex m:1 p:1 l:x w:1 0x6C /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
VPUNPCKLQDQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:1 p:1 l:x w:1 0x6C /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VPUNPCKHQDQ Vn{K}{z},Hn,Wn|B64 nil [evex m:1 p:1 l:x w:1 0x6D /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
VPUNPCKHQDQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:1 p:1 l:x w:1 0x6D /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VMOVD Vdq,Ed nil [evex m:1 p:1 l:0 w:0 0x6E /r] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R, a:IWO64
|
VMOVD Vdq,Ed nil [evex m:1 p:1 l:0 w:0 0x6E /r] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R, a:IWO64
|
||||||
VMOVQ Vdq,Eq nil [evex m:1 p:1 l:0 w:1 0x6E /r] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R, a:IWO64
|
VMOVQ Vdq,Eq nil [evex m:1 p:1 l:0 w:1 0x6E /r] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R, a:IWO64
|
||||||
VMOVDQA32 Vn{K}{z},Wn nil [evex m:1 p:1 l:x w:0 0x6F /r] s:AVX512F, t:DATAXFER, l:fvm, e:E1, w:W|R|R
|
VMOVDQA32 Vfv{K}{z},Wfv nil [evex m:1 p:1 l:x w:0 0x6F /r] s:AVX512F, t:DATAXFER, l:fvm, e:E1, w:W|R|R
|
||||||
VMOVDQA64 Vn{K}{z},Wn nil [evex m:1 p:1 l:x w:1 0x6F /r] s:AVX512F, t:DATAXFER, l:fvm, e:E1, w:W|R|R
|
VMOVDQA64 Vfv{K}{z},Wfv nil [evex m:1 p:1 l:x w:1 0x6F /r] s:AVX512F, t:DATAXFER, l:fvm, e:E1, w:W|R|R
|
||||||
VMOVDQU32 Vn{K}{z},Wn nil [evex m:1 p:2 l:x w:0 0x6F /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
VMOVDQU32 Vfv{K}{z},Wfv nil [evex m:1 p:2 l:x w:0 0x6F /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
||||||
VMOVDQU64 Vn{K}{z},Wn nil [evex m:1 p:2 l:x w:1 0x6F /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
VMOVDQU64 Vfv{K}{z},Wfv nil [evex m:1 p:2 l:x w:1 0x6F /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
||||||
VMOVDQU8 Vn{K}{z},Wn nil [evex m:1 p:3 l:x w:0 0x6F /r] s:AVX512BW, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
VMOVDQU8 Vfv{K}{z},Wfv nil [evex m:1 p:3 l:x w:0 0x6F /r] s:AVX512BW, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
||||||
VMOVDQU16 Vn{K}{z},Wn nil [evex m:1 p:3 l:x w:1 0x6F /r] s:AVX512BW, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
VMOVDQU16 Vfv{K}{z},Wfv nil [evex m:1 p:3 l:x w:1 0x6F /r] s:AVX512BW, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
||||||
|
|
||||||
# 0x70 - 0x7F
|
# 0x70 - 0x7F
|
||||||
VPSHUFD Vn{K}{z},Wn|B32,Ib nil [evex m:1 p:1 l:x w:0 0x70 /r ib] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
VPSHUFD Vfv{K}{z},Wfv|B32,Ib nil [evex m:1 p:1 l:x w:0 0x70 /r ib] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VPSHUFHW Vn{K}{z},Wn,Ib nil [evex m:1 p:2 l:x w:i 0x70 /r ib] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
VPSHUFHW Vfv{K}{z},Wfv,Ib nil [evex m:1 p:2 l:x w:i 0x70 /r ib] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
||||||
VPSHUFLW Vn{K}{z},Wn,Ib nil [evex m:1 p:3 l:x w:i 0x70 /r ib] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
VPSHUFLW Vfv{K}{z},Wfv,Ib nil [evex m:1 p:3 l:x w:i 0x70 /r ib] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
||||||
VPSRLW Hn{K}{z},Wn,Ib nil [evex m:1 p:1 l:x w:i 0x71 /2 ib] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPSRLW Hfv{K}{z},Wfv,Ib nil [evex m:1 p:1 l:x w:i 0x71 /2 ib] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPSRAW Hn{K}{z},Wn,Ib nil [evex m:1 p:1 l:x w:i 0x71 /4 ib] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPSRAW Hfv{K}{z},Wfv,Ib nil [evex m:1 p:1 l:x w:i 0x71 /4 ib] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPSLLW Hn{K}{z},Wn,Ib nil [evex m:1 p:1 l:x w:i 0x71 /6 ib] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPSLLW Hfv{K}{z},Wfv,Ib nil [evex m:1 p:1 l:x w:i 0x71 /6 ib] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPRORD Hn{K}{z},Wn|B32,Ib nil [evex m:1 p:1 l:x w:0 0x72 /0 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPRORD Hfv{K}{z},Wfv|B32,Ib nil [evex m:1 p:1 l:x w:0 0x72 /0 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPRORQ Hn{K}{z},Wn|B64,Ib nil [evex m:1 p:1 l:x w:1 0x72 /0 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPRORQ Hfv{K}{z},Wfv|B64,Ib nil [evex m:1 p:1 l:x w:1 0x72 /0 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPROLD Hn{K}{z},Wn|B32,Ib nil [evex m:1 p:1 l:x w:0 0x72 /1 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPROLD Hfv{K}{z},Wfv|B32,Ib nil [evex m:1 p:1 l:x w:0 0x72 /1 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPROLQ Hn{K}{z},Wn|B64,Ib nil [evex m:1 p:1 l:x w:1 0x72 /1 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPROLQ Hfv{K}{z},Wfv|B64,Ib nil [evex m:1 p:1 l:x w:1 0x72 /1 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPSRLD Hn{K}{z},Wn|B32,Ib nil [evex m:1 p:1 l:x w:0 0x72 /2 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPSRLD Hfv{K}{z},Wfv|B32,Ib nil [evex m:1 p:1 l:x w:0 0x72 /2 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPSRAD Hn{K}{z},Wn|B32,Ib nil [evex m:1 p:1 l:x w:0 0x72 /4 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPSRAD Hfv{K}{z},Wfv|B32,Ib nil [evex m:1 p:1 l:x w:0 0x72 /4 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPSRAQ Hn{K}{z},Wn|B64,Ib nil [evex m:1 p:1 l:x w:1 0x72 /4 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPSRAQ Hfv{K}{z},Wfv|B64,Ib nil [evex m:1 p:1 l:x w:1 0x72 /4 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPSLLD Hn{K}{z},Wn|B32,Ib nil [evex m:1 p:1 l:x w:0 0x72 /6 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPSLLD Hfv{K}{z},Wfv|B32,Ib nil [evex m:1 p:1 l:x w:0 0x72 /6 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPSRLQ Hn{K}{z},Wn|B64,Ib nil [evex m:1 p:1 l:x w:1 0x73 /2 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPSRLQ Hfv{K}{z},Wfv|B64,Ib nil [evex m:1 p:1 l:x w:1 0x73 /2 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPSRLDQ Hn,Wn,Ib nil [evex m:1 p:1 l:x w:i 0x73 /3 ib] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R
|
VPSRLDQ Hfv,Wfv,Ib nil [evex m:1 p:1 l:x w:i 0x73 /3 ib] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R
|
||||||
VPSLLQ Hn{K}{z},Wn|B64,Ib nil [evex m:1 p:1 l:x w:1 0x73 /6 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPSLLQ Hfv{K}{z},Wfv|B64,Ib nil [evex m:1 p:1 l:x w:1 0x73 /6 ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPSLLDQ Hn,Wn,Ib nil [evex m:1 p:1 l:x w:i 0x73 /7 ib] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R
|
VPSLLDQ Hfv,Wfv,Ib nil [evex m:1 p:1 l:x w:i 0x73 /7 ib] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R
|
||||||
VPCMPEQB rKq{K},Hn,Wn nil [evex m:1 p:1 l:x w:i 0x74 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPCMPEQB rKq{K},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0x74 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPCMPEQW rKq{K},Hn,Wn nil [evex m:1 p:1 l:x w:i 0x75 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPCMPEQW rKq{K},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0x75 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPCMPEQD rKq{K},Hn,Wn|B32 nil [evex m:1 p:1 l:x w:i 0x76 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPCMPEQD rKq{K},Hfv,Wfv|B32 nil [evex m:1 p:1 l:x w:i 0x76 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VCVTTPS2UDQ Vn{K}{z},Wn|B32{sae} nil [evex m:1 p:0 l:x w:0 0x78 /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
VCVTTPS2UDQ Vfv{K}{z},Wfv|B32{sae} nil [evex m:1 p:0 l:x w:0 0x78 /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||||
VCVTTPD2UDQ Vh{K}{z},Wn|B64{sae} nil [evex m:1 p:0 l:x w:1 0x78 /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
VCVTTPD2UDQ Vhv{K}{z},Wfv|B64{sae} nil [evex m:1 p:0 l:x w:1 0x78 /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||||
VCVTTPS2UQQ Vn{K}{z},Wh|B32{sae} nil [evex m:1 p:1 l:x w:0 0x78 /r] s:AVX512DQ, t:CONVERT, l:hv, e:E3, w:W|R|R
|
VCVTTPS2UQQ Vfv{K}{z},Whv|B32{sae} nil [evex m:1 p:1 l:x w:0 0x78 /r] s:AVX512DQ, t:CONVERT, l:hv, e:E3, w:W|R|R
|
||||||
VCVTTPD2UQQ Vn{K}{z},Wn|B64{sae} nil [evex m:1 p:1 l:x w:1 0x78 /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
VCVTTPD2UQQ Vfv{K}{z},Wfv|B64{sae} nil [evex m:1 p:1 l:x w:1 0x78 /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||||
VCVTTSS2USI Gy,Wss{sae} nil [evex m:1 p:2 l:i w:x 0x78 /r] s:AVX512F, t:CONVERT, l:t1f, e:E3, w:W|R, a:IWO64
|
VCVTTSS2USI Gy,Wss{sae} nil [evex m:1 p:2 l:i w:x 0x78 /r] s:AVX512F, t:CONVERT, l:t1f, e:E3, w:W|R, a:IWO64
|
||||||
VCVTTSD2USI Gy,Wsd{sae} nil [evex m:1 p:3 l:i w:x 0x78 /r] s:AVX512F, t:CONVERT, l:t1f, e:E3, w:W|R, a:IWO64
|
VCVTTSD2USI Gy,Wsd{sae} nil [evex m:1 p:3 l:i w:x 0x78 /r] s:AVX512F, t:CONVERT, l:t1f, e:E3, w:W|R, a:IWO64
|
||||||
VCVTPS2UDQ Vn{K}{z},Wn|B32{er} nil [evex m:1 p:0 l:x w:0 0x79 /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
VCVTPS2UDQ Vfv{K}{z},Wfv|B32{er} nil [evex m:1 p:0 l:x w:0 0x79 /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||||
VCVTPD2UDQ Vh{K}{z},Wn|B64{er} nil [evex m:1 p:0 l:x w:1 0x79 /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
VCVTPD2UDQ Vhv{K}{z},Wfv|B64{er} nil [evex m:1 p:0 l:x w:1 0x79 /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||||
VCVTPS2UQQ Vn{K}{z},Wh|B32{er} nil [evex m:1 p:1 l:x w:0 0x79 /r] s:AVX512DQ, t:CONVERT, l:hv, e:E3, w:W|R|R
|
VCVTPS2UQQ Vfv{K}{z},Whv|B32{er} nil [evex m:1 p:1 l:x w:0 0x79 /r] s:AVX512DQ, t:CONVERT, l:hv, e:E3, w:W|R|R
|
||||||
VCVTPD2UQQ Vn{K}{z},Wn|B64{er} nil [evex m:1 p:1 l:x w:1 0x79 /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
VCVTPD2UQQ Vfv{K}{z},Wfv|B64{er} nil [evex m:1 p:1 l:x w:1 0x79 /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||||
VCVTSS2USI Gy,Wss{er} nil [evex m:1 p:2 l:i w:x 0x79 /r] s:AVX512F, t:CONVERT, l:t1f, e:E3, w:W|R, a:IWO64
|
VCVTSS2USI Gy,Wss{er} nil [evex m:1 p:2 l:i w:x 0x79 /r] s:AVX512F, t:CONVERT, l:t1f, e:E3, w:W|R, a:IWO64
|
||||||
VCVTSD2USI Gy,Wsd{er} nil [evex m:1 p:3 l:i w:x 0x79 /r] s:AVX512F, t:CONVERT, l:t1f, e:E3, w:W|R, a:IWO64
|
VCVTSD2USI Gy,Wsd{er} nil [evex m:1 p:3 l:i w:x 0x79 /r] s:AVX512F, t:CONVERT, l:t1f, e:E3, w:W|R, a:IWO64
|
||||||
VCVTTPS2QQ Vn{K}{z},Wh|B32{sae} nil [evex m:1 p:1 l:x w:0 0x7A /r] s:AVX512DQ, t:CONVERT, l:hv, e:E3, w:W|R|R
|
VCVTTPS2QQ Vfv{K}{z},Whv|B32{sae} nil [evex m:1 p:1 l:x w:0 0x7A /r] s:AVX512DQ, t:CONVERT, l:hv, e:E3, w:W|R|R
|
||||||
VCVTTPD2QQ Vn{K}{z},Wn|B64{sae} nil [evex m:1 p:1 l:x w:1 0x7A /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
VCVTTPD2QQ Vfv{K}{z},Wfv|B64{sae} nil [evex m:1 p:1 l:x w:1 0x7A /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||||
VCVTUDQ2PD Vn{K}{z},Wh|B32 nil [evex m:1 p:2 l:x w:0 0x7A /r] s:AVX512F, t:CONVERT, l:hv, e:E5, w:W|R|R, a:IER
|
VCVTUDQ2PD Vfv{K}{z},Whv|B32 nil [evex m:1 p:2 l:x w:0 0x7A /r] s:AVX512F, t:CONVERT, l:hv, e:E5, w:W|R|R, a:IER
|
||||||
VCVTUQQ2PD Vn{K}{z},Wn|B64{er} nil [evex m:1 p:2 l:x w:1 0x7A /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
VCVTUQQ2PD Vfv{K}{z},Wfv|B64{er} nil [evex m:1 p:2 l:x w:1 0x7A /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||||
VCVTUDQ2PS Vn{K}{z},Wn|B32{er} nil [evex m:1 p:3 l:x w:0 0x7A /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
VCVTUDQ2PS Vfv{K}{z},Wfv|B32{er} nil [evex m:1 p:3 l:x w:0 0x7A /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||||
VCVTUQQ2PS Vh{K}{z},Wn|B64{er} nil [evex m:1 p:3 l:x w:1 0x7A /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
VCVTUQQ2PS Vhv{K}{z},Wfv|B64{er} nil [evex m:1 p:3 l:x w:1 0x7A /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||||
VCVTPS2QQ Vn{K}{z},Wh|B32{er} nil [evex m:1 p:1 l:x w:0 0x7B /r] s:AVX512DQ, t:CONVERT, l:hv, e:E3, w:W|R|R
|
VCVTPS2QQ Vfv{K}{z},Whv|B32{er} nil [evex m:1 p:1 l:x w:0 0x7B /r] s:AVX512DQ, t:CONVERT, l:hv, e:E3, w:W|R|R
|
||||||
VCVTPD2QQ Vn{K}{z},Wn|B64{er} nil [evex m:1 p:1 l:x w:1 0x7B /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
VCVTPD2QQ Vfv{K}{z},Wfv|B64{er} nil [evex m:1 p:1 l:x w:1 0x7B /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||||
VCVTUSI2SS Vss,Hss{er},Ey nil [evex m:1 p:2 l:i w:x 0x7B /r] s:AVX512F, t:CONVERT, l:t1s, e:E3, w:W|R|R, a:IWO64
|
VCVTUSI2SS Vss,Hss{er},Ey nil [evex m:1 p:2 l:i w:x 0x7B /r] s:AVX512F, t:CONVERT, l:t1s, e:E3, w:W|R|R, a:IWO64
|
||||||
VCVTUSI2SD Vdq,Hdq,Ey nil [evex m:1 p:3 l:i w:0 0x7B /r] s:AVX512F, t:CONVERT, l:t1s, e:E10NF, w:W|R|R, a:IER|IWO64
|
VCVTUSI2SD Vdq,Hdq,Ey nil [evex m:1 p:3 l:i w:0 0x7B /r] s:AVX512F, t:CONVERT, l:t1s, e:E10NF, w:W|R|R, a:IER|IWO64
|
||||||
VCVTUSI2SD Vdq,Hdq{er},Ey nil [evex m:1 p:3 l:i w:1 0x7B /r] s:AVX512F, t:CONVERT, l:t1s, e:E3, w:W|R|R, a:IWO64
|
VCVTUSI2SD Vdq,Hdq{er},Ey nil [evex m:1 p:3 l:i w:1 0x7B /r] s:AVX512F, t:CONVERT, l:t1s, e:E3, w:W|R|R, a:IWO64
|
||||||
VMOVD Ey,Vdq nil [evex m:1 p:1 l:0 w:0 0x7E /r] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R, a:IWO64
|
VMOVD Ey,Vdq nil [evex m:1 p:1 l:0 w:0 0x7E /r] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R, a:IWO64
|
||||||
VMOVQ Ey,Vdq nil [evex m:1 p:1 l:0 w:1 0x7E /r] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R, a:IWO64
|
VMOVQ Ey,Vdq nil [evex m:1 p:1 l:0 w:1 0x7E /r] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R, a:IWO64
|
||||||
VMOVQ Vdq,Wq nil [evex m:1 p:2 l:0 w:1 0x7E /r] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R
|
VMOVQ Vdq,Wq nil [evex m:1 p:2 l:0 w:1 0x7E /r] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R
|
||||||
VMOVDQA32 Wn{K}{z},Vn nil [evex m:1 p:1 l:x w:0 0x7F /r] s:AVX512F, t:DATAXFER, l:fvm, e:E1, w:W|R|R
|
VMOVDQA32 Wfv{K}{z},Vfv nil [evex m:1 p:1 l:x w:0 0x7F /r] s:AVX512F, t:DATAXFER, l:fvm, e:E1, w:W|R|R
|
||||||
VMOVDQA64 Wn{K}{z},Vn nil [evex m:1 p:1 l:x w:1 0x7F /r] s:AVX512F, t:DATAXFER, l:fvm, e:E1, w:W|R|R
|
VMOVDQA64 Wfv{K}{z},Vfv nil [evex m:1 p:1 l:x w:1 0x7F /r] s:AVX512F, t:DATAXFER, l:fvm, e:E1, w:W|R|R
|
||||||
VMOVDQU32 Wn{K}{z},Vn nil [evex m:1 p:2 l:x w:0 0x7F /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
VMOVDQU32 Wfv{K}{z},Vfv nil [evex m:1 p:2 l:x w:0 0x7F /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
||||||
VMOVDQU64 Wn{K}{z},Vn nil [evex m:1 p:2 l:x w:1 0x7F /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
VMOVDQU64 Wfv{K}{z},Vfv nil [evex m:1 p:2 l:x w:1 0x7F /r] s:AVX512F, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
||||||
VMOVDQU8 Wn{K}{z},Vn nil [evex m:1 p:3 l:x w:0 0x7F /r] s:AVX512BW, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
VMOVDQU8 Wfv{K}{z},Vfv nil [evex m:1 p:3 l:x w:0 0x7F /r] s:AVX512BW, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
||||||
VMOVDQU16 Wn{K}{z},Vn nil [evex m:1 p:3 l:x w:1 0x7F /r] s:AVX512BW, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
VMOVDQU16 Wfv{K}{z},Vfv nil [evex m:1 p:3 l:x w:1 0x7F /r] s:AVX512BW, t:DATAXFER, l:fvm, e:E4nb, w:W|R|R
|
||||||
|
|
||||||
# 0x80 - 0x8F
|
# 0x80 - 0x8F
|
||||||
|
|
||||||
@ -186,69 +186,69 @@ VMOVDQU16 Wn{K}{z},Vn nil [evex m:1 p:3 l:x w:
|
|||||||
# 0xB0 - 0xBF
|
# 0xB0 - 0xBF
|
||||||
|
|
||||||
# 0xC0 - 0xCF
|
# 0xC0 - 0xCF
|
||||||
VCMPPS rKq{K},Hn,Wn|B32{sae},Ib nil [evex m:1 p:0 l:x w:0 0xC2 /r ib] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R|R
|
VCMPPS rKq{K},Hfv,Wfv|B32{sae},Ib nil [evex m:1 p:0 l:x w:0 0xC2 /r ib] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R|R
|
||||||
VCMPPD rKq{K},Hn,Wn|B64{sae},Ib nil [evex m:1 p:1 l:x w:1 0xC2 /r ib] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R|R
|
VCMPPD rKq{K},Hfv,Wfv|B64{sae},Ib nil [evex m:1 p:1 l:x w:1 0xC2 /r ib] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R|R
|
||||||
VCMPSS rKq{K},Hdq,Wss{sae},Ib nil [evex m:1 p:2 l:x w:0 0xC2 /r ib] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R|R
|
VCMPSS rKq{K},Hdq,Wss{sae},Ib nil [evex m:1 p:2 l:x w:0 0xC2 /r ib] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R|R
|
||||||
VCMPSD rKq{K},Hdq,Wsd{sae},Ib nil [evex m:1 p:3 l:x w:1 0xC2 /r ib] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R|R
|
VCMPSD rKq{K},Hdq,Wsd{sae},Ib nil [evex m:1 p:3 l:x w:1 0xC2 /r ib] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R|R
|
||||||
VPINSRW Vdq,Hdq,Mw,Ib nil [evex m:1 p:1 l:0 w:i 0xC4 /r:mem ib] s:AVX512BW, t:AVX512, l:t1s16, e:E9NF, w:W|R|R|R
|
VPINSRW Vdq,Hdq,Mw,Ib nil [evex m:1 p:1 l:0 w:i 0xC4 /r:mem ib] s:AVX512BW, t:AVX512, l:t1s16, e:E9NF, w:W|R|R|R
|
||||||
VPINSRW Vdq,Hdq,Rv,Ib nil [evex m:1 p:1 l:0 w:i 0xC4 /r:reg ib] s:AVX512BW, t:AVX512, l:t1s16, e:E9NF, w:W|R|R|R
|
VPINSRW Vdq,Hdq,Rv,Ib nil [evex m:1 p:1 l:0 w:i 0xC4 /r:reg ib] s:AVX512BW, t:AVX512, l:t1s16, e:E9NF, w:W|R|R|R
|
||||||
VPEXTRW Gy,Udq,Ib nil [evex m:1 p:1 l:0 w:i 0xC5 /r:reg ib] s:AVX512BW, t:AVX512, l:t1s, e:E9NF, w:W|R|R
|
VPEXTRW Gy,Udq,Ib nil [evex m:1 p:1 l:0 w:i 0xC5 /r:reg ib] s:AVX512BW, t:AVX512, l:t1s, e:E9NF, w:W|R|R
|
||||||
VSHUFPS Vn{K}{z},Hn,Wn|B32,Ib nil [evex m:1 p:0 l:x w:0 0xC6 /r ib] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R|R
|
VSHUFPS Vfv{K}{z},Hfv,Wfv|B32,Ib nil [evex m:1 p:0 l:x w:0 0xC6 /r ib] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R|R
|
||||||
VSHUFPD Vn{K}{z},Hn,Wn|B64,Ib nil [evex m:1 p:1 l:x w:1 0xC6 /r ib] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R|R
|
VSHUFPD Vfv{K}{z},Hfv,Wfv|B64,Ib nil [evex m:1 p:1 l:x w:1 0xC6 /r ib] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R|R
|
||||||
|
|
||||||
# 0xD0 - 0xDF
|
# 0xD0 - 0xDF
|
||||||
VPSRLW Vn{K}{z},Hn,Wdq nil [evex m:1 p:1 l:x w:i 0xD1 /r] s:AVX512BW, t:AVX512, l:m128, e:E4nb, w:W|R|R|R
|
VPSRLW Vfv{K}{z},Hfv,Wdq nil [evex m:1 p:1 l:x w:i 0xD1 /r] s:AVX512BW, t:AVX512, l:m128, e:E4nb, w:W|R|R|R
|
||||||
VPSRLD Vn{K}{z},Hn,Wdq nil [evex m:1 p:1 l:x w:0 0xD2 /r] s:AVX512F, t:AVX512, l:m128, e:E4NFnb, w:W|R|R|R
|
VPSRLD Vfv{K}{z},Hfv,Wdq nil [evex m:1 p:1 l:x w:0 0xD2 /r] s:AVX512F, t:AVX512, l:m128, e:E4NFnb, w:W|R|R|R
|
||||||
VPSRLQ Vn{K}{z},Hn,Wdq nil [evex m:1 p:1 l:x w:1 0xD3 /r] s:AVX512F, t:AVX512, l:m128, e:E4NFnb, w:W|R|R|R
|
VPSRLQ Vfv{K}{z},Hfv,Wdq nil [evex m:1 p:1 l:x w:1 0xD3 /r] s:AVX512F, t:AVX512, l:m128, e:E4NFnb, w:W|R|R|R
|
||||||
VPADDQ Vn{K}{z},Hn,Wn|B64 nil [evex m:1 p:1 l:x w:1 0xD4 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPADDQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:1 p:1 l:x w:1 0xD4 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPMULLW Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xD5 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPMULLW Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xD5 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VMOVQ Wq,Vdq nil [evex m:1 p:1 l:0 w:1 0xD6 /r] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R
|
VMOVQ Wq,Vdq nil [evex m:1 p:1 l:0 w:1 0xD6 /r] s:AVX512F, t:DATAXFER, l:t1s, e:E9NF, w:W|R
|
||||||
VPSUBUSB Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xD8 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4, w:W|R|R|R
|
VPSUBUSB Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xD8 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4, w:W|R|R|R
|
||||||
VPSUBUSW Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xD9 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4, w:W|R|R|R
|
VPSUBUSW Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xD9 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4, w:W|R|R|R
|
||||||
VPMINUB Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xDA /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPMINUB Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xDA /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPANDQ Vn{K}{z},Hn,Wn|B64 nil [evex m:1 p:1 l:x w:1 0xDB /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
VPANDQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:1 p:1 l:x w:1 0xDB /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
||||||
VPANDD Vn{K}{z},Hn,Wn|B32 nil [evex m:1 p:1 l:x w:0 0xDB /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
VPANDD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:1 p:1 l:x w:0 0xDB /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
||||||
VPADDUSB Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xDC /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPADDUSB Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xDC /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPADDUSW Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xDD /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPADDUSW Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xDD /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPMAXUB Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xDE /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPMAXUB Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xDE /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPANDND Vn{K}{z},Hn,Wn|B32 nil [evex m:1 p:1 l:x w:0 0xDF /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
VPANDND Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:1 p:1 l:x w:0 0xDF /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
||||||
VPANDNQ Vn{K}{z},Hn,Wn|B64 nil [evex m:1 p:1 l:x w:1 0xDF /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
VPANDNQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:1 p:1 l:x w:1 0xDF /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
||||||
|
|
||||||
# 0xE0 - 0xEF
|
# 0xE0 - 0xEF
|
||||||
VPAVGB Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xE0 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPAVGB Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xE0 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPSRAW Vn{K}{z},Hn,Wdq nil [evex m:1 p:1 l:x w:i 0xE1 /r] s:AVX512BW, t:AVX512, l:m128, e:E4nb, w:W|R|R|R
|
VPSRAW Vfv{K}{z},Hfv,Wdq nil [evex m:1 p:1 l:x w:i 0xE1 /r] s:AVX512BW, t:AVX512, l:m128, e:E4nb, w:W|R|R|R
|
||||||
VPSRAD Vn{K}{z},Hn,Wdq nil [evex m:1 p:1 l:x w:0 0xE2 /r] s:AVX512F, t:AVX512, l:m128, e:E4NFnb, w:W|R|R|R
|
VPSRAD Vfv{K}{z},Hfv,Wdq nil [evex m:1 p:1 l:x w:0 0xE2 /r] s:AVX512F, t:AVX512, l:m128, e:E4NFnb, w:W|R|R|R
|
||||||
VPSRAQ Vn{K}{z},Hn,Wdq nil [evex m:1 p:1 l:x w:1 0xE2 /r] s:AVX512F, t:AVX512, l:m128, e:E4NFnb, w:W|R|R|R
|
VPSRAQ Vfv{K}{z},Hfv,Wdq nil [evex m:1 p:1 l:x w:1 0xE2 /r] s:AVX512F, t:AVX512, l:m128, e:E4NFnb, w:W|R|R|R
|
||||||
VPAVGW Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xE3 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPAVGW Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xE3 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPMULHUW Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xE4 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPMULHUW Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xE4 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPMULHW Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xE5 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPMULHW Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xE5 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VCVTTPD2DQ Vh{K}{z},Wn|B64{sae} nil [evex m:1 p:1 l:x w:1 0xE6 /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
VCVTTPD2DQ Vhv{K}{z},Wfv|B64{sae} nil [evex m:1 p:1 l:x w:1 0xE6 /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||||
VCVTDQ2PD Vn{K}{z},Wh|B32 nil [evex m:1 p:2 l:x w:0 0xE6 /r] s:AVX512F, t:CONVERT, l:hv, e:E5, w:W|R|R, a:IER
|
VCVTDQ2PD Vfv{K}{z},Whv|B32 nil [evex m:1 p:2 l:x w:0 0xE6 /r] s:AVX512F, t:CONVERT, l:hv, e:E5, w:W|R|R, a:IER
|
||||||
VCVTQQ2PD Vn{K}{z},Wn|B64{er} nil [evex m:1 p:2 l:x w:1 0xE6 /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
VCVTQQ2PD Vfv{K}{z},Wfv|B64{er} nil [evex m:1 p:2 l:x w:1 0xE6 /r] s:AVX512DQ, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||||
VCVTPD2DQ Vh{K}{z},Wn|B64{er} nil [evex m:1 p:3 l:x w:1 0xE6 /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
VCVTPD2DQ Vhv{K}{z},Wfv|B64{er} nil [evex m:1 p:3 l:x w:1 0xE6 /r] s:AVX512F, t:CONVERT, l:fv, e:E2, w:W|R|R
|
||||||
VMOVNTDQ Mn,Vn nil [evex m:1 p:1 l:x w:0 0xE7 /r:mem] s:AVX512F, t:DATAXFER, l:fvm, e:E1NF, w:W|R
|
VMOVNTDQ Mfv,Vfv nil [evex m:1 p:1 l:x w:0 0xE7 /r:mem] s:AVX512F, t:DATAXFER, l:fvm, e:E1NF, w:W|R
|
||||||
VPSUBSB Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xE8 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPSUBSB Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xE8 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPSUBSW Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xE9 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPSUBSW Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xE9 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPMINSW Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xEA /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPMINSW Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xEA /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPORD Vn{K}{z},Hn,Wn|B32 nil [evex m:1 p:1 l:x w:0 0xEB /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
VPORD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:1 p:1 l:x w:0 0xEB /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
||||||
VPORQ Vn{K}{z},Hn,Wn|B64 nil [evex m:1 p:1 l:x w:1 0xEB /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
VPORQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:1 p:1 l:x w:1 0xEB /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
||||||
VPADDSB Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xEC /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPADDSB Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xEC /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPADDSW Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xED /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPADDSW Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xED /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPMAXSW Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xEE /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPMAXSW Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xEE /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPXORD Vn{K}{z},Hn,Wn|B32 nil [evex m:1 p:1 l:x w:0 0xEF /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
VPXORD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:1 p:1 l:x w:0 0xEF /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
||||||
VPXORQ Vn{K}{z},Hn,Wn|B64 nil [evex m:1 p:1 l:x w:1 0xEF /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
VPXORQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:1 p:1 l:x w:1 0xEF /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
||||||
|
|
||||||
# 0xF0 - 0xFF
|
# 0xF0 - 0xFF
|
||||||
VPSLLW Vn{K}{z},Hn,Wdq nil [evex m:1 p:1 l:x w:i 0xF1 /r] s:AVX512BW, t:AVX512, l:m128, e:E4nb, w:W|R|R|R
|
VPSLLW Vfv{K}{z},Hfv,Wdq nil [evex m:1 p:1 l:x w:i 0xF1 /r] s:AVX512BW, t:AVX512, l:m128, e:E4nb, w:W|R|R|R
|
||||||
VPSLLD Vn{K}{z},Hn,Wdq nil [evex m:1 p:1 l:x w:0 0xF2 /r] s:AVX512F, t:AVX512, l:m128, e:E4NFnb, w:W|R|R|R
|
VPSLLD Vfv{K}{z},Hfv,Wdq nil [evex m:1 p:1 l:x w:0 0xF2 /r] s:AVX512F, t:AVX512, l:m128, e:E4NFnb, w:W|R|R|R
|
||||||
VPSLLQ Vn{K}{z},Hn,Wdq nil [evex m:1 p:1 l:x w:1 0xF3 /r] s:AVX512F, t:AVX512, l:m128, e:E4NFnb, w:W|R|R|R
|
VPSLLQ Vfv{K}{z},Hfv,Wdq nil [evex m:1 p:1 l:x w:1 0xF3 /r] s:AVX512F, t:AVX512, l:m128, e:E4NFnb, w:W|R|R|R
|
||||||
VPMULUDQ Vn{K}{z},Hn,Wn|B64 nil [evex m:1 p:1 l:x w:1 0xF4 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPMULUDQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:1 p:1 l:x w:1 0xF4 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPMADDWD Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xF5 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPMADDWD Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xF5 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPSADBW Vn,Hn,Wn nil [evex m:1 p:1 l:x w:i 0xF6 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R
|
VPSADBW Vfv,Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xF6 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R
|
||||||
VPSUBB Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xF8 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPSUBB Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xF8 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPSUBW Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xF9 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPSUBW Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xF9 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPSUBD Vn{K}{z},Hn,Wn|B32 nil [evex m:1 p:1 l:x w:0 0xFA /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPSUBD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:1 p:1 l:x w:0 0xFA /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPSUBQ Vn{K}{z},Hn,Wn|B64 nil [evex m:1 p:1 l:x w:1 0xFB /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPSUBQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:1 p:1 l:x w:1 0xFB /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPADDB Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xFC /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPADDB Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xFC /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPADDW Vn{K}{z},Hn,Wn nil [evex m:1 p:1 l:x w:i 0xFD /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPADDW Vfv{K}{z},Hfv,Wfv nil [evex m:1 p:1 l:x w:i 0xFD /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPADDD Vn{K}{z},Hn,Wn|B32 nil [evex m:1 p:1 l:x w:0 0xFE /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPADDD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:1 p:1 l:x w:0 0xFE /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
|
@ -1,308 +1,308 @@
|
|||||||
# Mnemonic Explicit Operands Implicit Encoding Flags, Prefixes, Set, Category, Class, RW map, Additional ops
|
# Mnemonic Explicit Operands Implicit Encoding Flags, Prefixes, Set, Category, Class, RW map, Additional ops
|
||||||
#------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
|
#------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
|
||||||
# 0x00 - 0x0F
|
# 0x00 - 0x0F
|
||||||
VPSHUFB Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:i 0x00 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
VPSHUFB Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:i 0x00 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
||||||
VPMADDUBSW Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:i 0x04 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
VPMADDUBSW Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:i 0x04 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R
|
||||||
VPMULHRSW Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:i 0x0B /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPMULHRSW Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:i 0x0B /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPERMILPS Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x0C /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
VPERMILPS Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x0C /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VPERMILPD Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x0D /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
VPERMILPD Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x0D /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||||
|
|
||||||
# 0x10 - 0x1F
|
# 0x10 - 0x1F
|
||||||
VPSRLVW Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:1 0x10 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPSRLVW Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:1 0x10 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPSRAVW Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:1 0x11 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4, w:W|R|R|R
|
VPSRAVW Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:1 0x11 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4, w:W|R|R|R
|
||||||
VPSLLVW Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:1 0x12 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPSLLVW Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:1 0x12 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VCVTPH2PS Vn{K}{z},Wh{sae} nil [evex m:2 p:1 l:x w:0 0x13 /r] s:AVX512F, t:CONVERT, l:hvm, e:E11, w:W|R|R
|
VCVTPH2PS Vfv{K}{z},Whv{sae} nil [evex m:2 p:1 l:x w:0 0x13 /r] s:AVX512F, t:CONVERT, l:hvm, e:E11, w:W|R|R
|
||||||
VPRORVD Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x14 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPRORVD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x14 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPRORVQ Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x14 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPRORVQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x14 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPROLVD Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x15 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPROLVD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x15 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPROLVQ Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x15 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPROLVQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x15 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPERMPS Vu{K}{z},Hu,Wu|B32 nil [evex m:2 p:1 l:1 w:0 0x16 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
VPERMPS Vuv{K}{z},Huv,Wuv|B32 nil [evex m:2 p:1 l:1 w:0 0x16 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VPERMPS Vu{K}{z},Hu,Wu|B32 nil [evex m:2 p:1 l:2 w:0 0x16 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
VPERMPS Vuv{K}{z},Huv,Wuv|B32 nil [evex m:2 p:1 l:2 w:0 0x16 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VPERMPD Vu{K}{z},Hu,Wu|B64 nil [evex m:2 p:1 l:1 w:1 0x16 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
VPERMPD Vuv{K}{z},Huv,Wuv|B64 nil [evex m:2 p:1 l:1 w:1 0x16 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VPERMPD Vu{K}{z},Hu,Wu|B64 nil [evex m:2 p:1 l:2 w:1 0x16 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
VPERMPD Vuv{K}{z},Huv,Wuv|B64 nil [evex m:2 p:1 l:2 w:1 0x16 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VPMOVUSWB Wh{K}{z},Vn nil [evex m:2 p:2 l:x w:0 0x10 /r] s:AVX512BW, t:DATAXFER, l:hvm, e:E6, w:W|R|R
|
VPMOVUSWB Whv{K}{z},Vfv nil [evex m:2 p:2 l:x w:0 0x10 /r] s:AVX512BW, t:DATAXFER, l:hvm, e:E6, w:W|R|R
|
||||||
VPMOVUSDB Wf{K}{z},Vn nil [evex m:2 p:2 l:x w:0 0x11 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E6, w:W|R|R
|
VPMOVUSDB Wqv{K}{z},Vfv nil [evex m:2 p:2 l:x w:0 0x11 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E6, w:W|R|R
|
||||||
VPMOVUSQB We{K}{z},Vn nil [evex m:2 p:2 l:x w:0 0x12 /r] s:AVX512F, t:DATAXFER, l:ovm, e:E6, w:W|R|R
|
VPMOVUSQB Wev{K}{z},Vfv nil [evex m:2 p:2 l:x w:0 0x12 /r] s:AVX512F, t:DATAXFER, l:ovm, e:E6, w:W|R|R
|
||||||
VPMOVUSDW Wh{K}{z},Vn nil [evex m:2 p:2 l:x w:0 0x13 /r] s:AVX512F, t:DATAXFER, l:hv, l:hvm, e:E6, w:W|R|R
|
VPMOVUSDW Whv{K}{z},Vfv nil [evex m:2 p:2 l:x w:0 0x13 /r] s:AVX512F, t:DATAXFER, l:hv, l:hvm, e:E6, w:W|R|R
|
||||||
VPMOVUSQW Wf{K}{z},Vn nil [evex m:2 p:2 l:x w:0 0x14 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E6, w:W|R|R
|
VPMOVUSQW Wqv{K}{z},Vfv nil [evex m:2 p:2 l:x w:0 0x14 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E6, w:W|R|R
|
||||||
VPMOVUSQD Wh{K}{z},Vn nil [evex m:2 p:2 l:x w:0 0x15 /r] s:AVX512F, t:DATAXFER, l:hvm, e:E6, w:W|R|R
|
VPMOVUSQD Whv{K}{z},Vfv nil [evex m:2 p:2 l:x w:0 0x15 /r] s:AVX512F, t:DATAXFER, l:hvm, e:E6, w:W|R|R
|
||||||
VBROADCASTSS Vn{K}{z},Wss nil [evex m:2 p:1 l:x w:0 0x18 /r] s:AVX512F, t:BROADCAST, l:t1s, e:E6, w:W|R|R
|
VBROADCASTSS Vfv{K}{z},Wss nil [evex m:2 p:1 l:x w:0 0x18 /r] s:AVX512F, t:BROADCAST, l:t1s, e:E6, w:W|R|R
|
||||||
VBROADCASTF32X2 Vu{K}{z},Wq nil [evex m:2 p:1 l:x w:0 0x19 /r] s:AVX512DQ, t:BROADCAST, a:NOL0, l:t2, e:E6, w:W|R|R
|
VBROADCASTF32X2 Vuv{K}{z},Wq nil [evex m:2 p:1 l:x w:0 0x19 /r] s:AVX512DQ, t:BROADCAST, a:NOL0, l:t2, e:E6, w:W|R|R
|
||||||
VBROADCASTSD Vu{K}{z},Wsd nil [evex m:2 p:1 l:x w:1 0x19 /r] s:AVX512F, t:BROADCAST, a:NOL0, l:t1s, e:E6, w:W|R|R
|
VBROADCASTSD Vuv{K}{z},Wsd nil [evex m:2 p:1 l:x w:1 0x19 /r] s:AVX512F, t:BROADCAST, a:NOL0, l:t1s, e:E6, w:W|R|R
|
||||||
VBROADCASTF32X4 Vu{K}{z},Mdq nil [evex m:2 p:1 l:x w:0 0x1A /r:mem] s:AVX512F, t:BROADCAST, a:NOL0, l:t4, e:E6, w:W|R|R
|
VBROADCASTF32X4 Vuv{K}{z},Mdq nil [evex m:2 p:1 l:x w:0 0x1A /r:mem] s:AVX512F, t:BROADCAST, a:NOL0, l:t4, e:E6, w:W|R|R
|
||||||
VBROADCASTF64X2 Vu{K}{z},Mdq nil [evex m:2 p:1 l:x w:1 0x1A /r:mem] s:AVX512DQ, t:BROADCAST, a:NOL0, l:t2, e:E6, w:W|R|R
|
VBROADCASTF64X2 Vuv{K}{z},Mdq nil [evex m:2 p:1 l:x w:1 0x1A /r:mem] s:AVX512DQ, t:BROADCAST, a:NOL0, l:t2, e:E6, w:W|R|R
|
||||||
VBROADCASTF32X8 Voq{K}{z},Mqq nil [evex m:2 p:1 l:2 w:0 0x1B /r:mem] s:AVX512DQ, t:BROADCAST, l:t8, e:E6, w:W|R|R
|
VBROADCASTF32X8 Voq{K}{z},Mqq nil [evex m:2 p:1 l:2 w:0 0x1B /r:mem] s:AVX512DQ, t:BROADCAST, l:t8, e:E6, w:W|R|R
|
||||||
VBROADCASTF64X4 Voq{K}{z},Mqq nil [evex m:2 p:1 l:2 w:1 0x1B /r:mem] s:AVX512F, t:BROADCAST, l:t4, e:E6, w:W|R|R
|
VBROADCASTF64X4 Voq{K}{z},Mqq nil [evex m:2 p:1 l:2 w:1 0x1B /r:mem] s:AVX512F, t:BROADCAST, l:t4, e:E6, w:W|R|R
|
||||||
VPABSB Vn{K}{z},Wn nil [evex m:2 p:1 l:x w:x 0x1C /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R
|
VPABSB Vfv{K}{z},Wfv nil [evex m:2 p:1 l:x w:x 0x1C /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R
|
||||||
VPABSW Vn{K}{z},Wn nil [evex m:2 p:1 l:x w:x 0x1D /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R
|
VPABSW Vfv{K}{z},Wfv nil [evex m:2 p:1 l:x w:x 0x1D /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R
|
||||||
VPABSD Vn{K}{z},Wn|B32 nil [evex m:2 p:1 l:x w:0 0x1E /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R
|
VPABSD Vfv{K}{z},Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x1E /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R
|
||||||
VPABSQ Vn{K}{z},Wn|B64 nil [evex m:2 p:1 l:x w:1 0x1F /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R
|
VPABSQ Vfv{K}{z},Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x1F /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R
|
||||||
|
|
||||||
# 0x20 - 0x2F
|
# 0x20 - 0x2F
|
||||||
VPMOVSXBW Vn{K}{z},Wh nil [evex m:2 p:1 l:x w:i 0x20 /r] s:AVX512BW, t:DATAXFER, l:hvm, e:E5, w:W|R|R
|
VPMOVSXBW Vfv{K}{z},Whv nil [evex m:2 p:1 l:x w:i 0x20 /r] s:AVX512BW, t:DATAXFER, l:hvm, e:E5, w:W|R|R
|
||||||
VPMOVSXBD Vn{K}{z},Wf nil [evex m:2 p:1 l:x w:i 0x21 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E5, w:W|R|R
|
VPMOVSXBD Vfv{K}{z},Wqv nil [evex m:2 p:1 l:x w:i 0x21 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E5, w:W|R|R
|
||||||
VPMOVSXBQ Vn{K}{z},We nil [evex m:2 p:1 l:x w:i 0x22 /r] s:AVX512F, t:DATAXFER, l:ovm, e:E5, w:W|R|R
|
VPMOVSXBQ Vfv{K}{z},Wev nil [evex m:2 p:1 l:x w:i 0x22 /r] s:AVX512F, t:DATAXFER, l:ovm, e:E5, w:W|R|R
|
||||||
VPMOVSXWD Vn{K}{z},Wh nil [evex m:2 p:1 l:x w:i 0x23 /r] s:AVX512F, t:DATAXFER, l:hvm, e:E5, w:W|R|R
|
VPMOVSXWD Vfv{K}{z},Whv nil [evex m:2 p:1 l:x w:i 0x23 /r] s:AVX512F, t:DATAXFER, l:hvm, e:E5, w:W|R|R
|
||||||
VPMOVSXWQ Vn{K}{z},Wf nil [evex m:2 p:1 l:x w:i 0x24 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E5, w:W|R|R
|
VPMOVSXWQ Vfv{K}{z},Wqv nil [evex m:2 p:1 l:x w:i 0x24 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E5, w:W|R|R
|
||||||
VPMOVSXDQ Vn{K}{z},Wh nil [evex m:2 p:1 l:x w:0 0x25 /r] s:AVX512F, t:DATAXFER, l:hvm, e:E5, w:W|R|R
|
VPMOVSXDQ Vfv{K}{z},Whv nil [evex m:2 p:1 l:x w:0 0x25 /r] s:AVX512F, t:DATAXFER, l:hvm, e:E5, w:W|R|R
|
||||||
VPTESTMB rKq{K},Hn,Wn nil [evex m:2 p:1 l:x w:0 0x26 /r] s:AVX512BW, t:LOGICAL, l:fvm, e:E4nb, w:W|R|R|R
|
VPTESTMB rKq{K},Hfv,Wfv nil [evex m:2 p:1 l:x w:0 0x26 /r] s:AVX512BW, t:LOGICAL, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPTESTMW rKq{K},Hn,Wn nil [evex m:2 p:1 l:x w:1 0x26 /r] s:AVX512BW, t:LOGICAL, l:fvm, e:E4nb, w:W|R|R|R
|
VPTESTMW rKq{K},Hfv,Wfv nil [evex m:2 p:1 l:x w:1 0x26 /r] s:AVX512BW, t:LOGICAL, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPTESTMD rKq{K},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x27 /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
VPTESTMD rKq{K},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x27 /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
||||||
VPTESTMQ rKq{K},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x27 /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
VPTESTMQ rKq{K},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x27 /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
||||||
VPMOVSWB Wh{K}{z},Vn nil [evex m:2 p:2 l:x w:0 0x20 /r] s:AVX512BW, t:DATAXFER, l:hvm, e:E6, w:W|R|R
|
VPMOVSWB Whv{K}{z},Vfv nil [evex m:2 p:2 l:x w:0 0x20 /r] s:AVX512BW, t:DATAXFER, l:hvm, e:E6, w:W|R|R
|
||||||
VPMOVSDB Wf{K}{z},Vn nil [evex m:2 p:2 l:x w:0 0x21 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E6, w:W|R|R
|
VPMOVSDB Wqv{K}{z},Vfv nil [evex m:2 p:2 l:x w:0 0x21 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E6, w:W|R|R
|
||||||
VPMOVSQB We{K}{z},Vn nil [evex m:2 p:2 l:x w:0 0x22 /r] s:AVX512F, t:DATAXFER, l:ovm, e:E6, w:W|R|R
|
VPMOVSQB Wev{K}{z},Vfv nil [evex m:2 p:2 l:x w:0 0x22 /r] s:AVX512F, t:DATAXFER, l:ovm, e:E6, w:W|R|R
|
||||||
VPMOVSDW Wh{K}{z},Vn nil [evex m:2 p:2 l:x w:0 0x23 /r] s:AVX512F, t:DATAXFER, l:hvm, e:E6, w:W|R|R
|
VPMOVSDW Whv{K}{z},Vfv nil [evex m:2 p:2 l:x w:0 0x23 /r] s:AVX512F, t:DATAXFER, l:hvm, e:E6, w:W|R|R
|
||||||
VPMOVSQW Wf{K}{z},Vn nil [evex m:2 p:2 l:x w:0 0x24 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E6, w:W|R|R
|
VPMOVSQW Wqv{K}{z},Vfv nil [evex m:2 p:2 l:x w:0 0x24 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E6, w:W|R|R
|
||||||
VPMOVSQD Wh{K}{z},Vn nil [evex m:2 p:2 l:x w:0 0x25 /r] s:AVX512F, t:DATAXFER, l:hvm, e:E6, w:W|R|R
|
VPMOVSQD Whv{K}{z},Vfv nil [evex m:2 p:2 l:x w:0 0x25 /r] s:AVX512F, t:DATAXFER, l:hvm, e:E6, w:W|R|R
|
||||||
VPTESTNMB rKq{K},Hn,Wn nil [evex m:2 p:2 l:x w:0 0x26 /r] s:AVX512BW, t:LOGICAL, l:fvm, e:E4nb, w:W|R|R|R
|
VPTESTNMB rKq{K},Hfv,Wfv nil [evex m:2 p:2 l:x w:0 0x26 /r] s:AVX512BW, t:LOGICAL, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPTESTNMW rKq{K},Hn,Wn nil [evex m:2 p:2 l:x w:1 0x26 /r] s:AVX512BW, t:LOGICAL, l:fvm, e:E4nb, w:W|R|R|R
|
VPTESTNMW rKq{K},Hfv,Wfv nil [evex m:2 p:2 l:x w:1 0x26 /r] s:AVX512BW, t:LOGICAL, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPTESTNMD rKq{K},Hn,Wn|B32 nil [evex m:2 p:2 l:x w:0 0x27 /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
VPTESTNMD rKq{K},Hfv,Wfv|B32 nil [evex m:2 p:2 l:x w:0 0x27 /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
||||||
VPTESTNMQ rKq{K},Hn,Wn|B64 nil [evex m:2 p:2 l:x w:1 0x27 /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
VPTESTNMQ rKq{K},Hfv,Wfv|B64 nil [evex m:2 p:2 l:x w:1 0x27 /r] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:W|R|R|R
|
||||||
VPMULDQ Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x28 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPMULDQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x28 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPCMPEQQ rKq{K},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x29 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPCMPEQQ rKq{K},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x29 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VMOVNTDQA Vn,Mn nil [evex m:2 p:1 l:x w:0 0x2A /r:mem] s:AVX512F, t:DATAXFER, l:fvm, e:E1NF, w:W|R
|
VMOVNTDQA Vfv,Mfv nil [evex m:2 p:1 l:x w:0 0x2A /r:mem] s:AVX512F, t:DATAXFER, l:fvm, e:E1NF, w:W|R
|
||||||
VPACKUSDW Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x2B /r] s:AVX512BW, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
VPACKUSDW Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x2B /r] s:AVX512BW, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VSCALEFPS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:2 p:1 l:x w:0 0x2C /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VSCALEFPS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:2 p:1 l:x w:0 0x2C /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VSCALEFPD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:2 p:1 l:x w:1 0x2C /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VSCALEFPD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:2 p:1 l:x w:1 0x2C /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VSCALEFSS Vss{K}{z},Hss,Wss{er} nil [evex m:2 p:1 l:i w:0 0x2D /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
VSCALEFSS Vss{K}{z},Hss,Wss{er} nil [evex m:2 p:1 l:i w:0 0x2D /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
||||||
VSCALEFSD Vsd{K}{z},Hsd,Wsd{er} nil [evex m:2 p:1 l:i w:1 0x2D /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
VSCALEFSD Vsd{K}{z},Hsd,Wsd{er} nil [evex m:2 p:1 l:i w:1 0x2D /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
||||||
VPMOVM2B Vn,mKq nil [evex m:2 p:2 l:x w:0 0x28 /r:reg] s:AVX512BW, t:DATAXFER, e:E7NM, w:W|R
|
VPMOVM2B Vfv,mKq nil [evex m:2 p:2 l:x w:0 0x28 /r:reg] s:AVX512BW, t:DATAXFER, e:E7NM, w:W|R
|
||||||
VPMOVM2W Vn,mKq nil [evex m:2 p:2 l:x w:1 0x28 /r:reg] s:AVX512BW, t:DATAXFER, e:E7NM, w:W|R
|
VPMOVM2W Vfv,mKq nil [evex m:2 p:2 l:x w:1 0x28 /r:reg] s:AVX512BW, t:DATAXFER, e:E7NM, w:W|R
|
||||||
VPMOVB2M rKq,Un nil [evex m:2 p:2 l:x w:0 0x29 /r:reg] s:AVX512BW, t:DATAXFER, e:E7NM, w:W|R
|
VPMOVB2M rKq,Ufv nil [evex m:2 p:2 l:x w:0 0x29 /r:reg] s:AVX512BW, t:DATAXFER, e:E7NM, w:W|R
|
||||||
VPMOVW2M rKq,Un nil [evex m:2 p:2 l:x w:1 0x29 /r:reg] s:AVX512BW, t:DATAXFER, e:E7NM, w:W|R
|
VPMOVW2M rKq,Ufv nil [evex m:2 p:2 l:x w:1 0x29 /r:reg] s:AVX512BW, t:DATAXFER, e:E7NM, w:W|R
|
||||||
VPBROADCASTMB2Q Vn,mKq nil [evex m:2 p:2 l:x w:1 0x2A /r:reg] s:AVX512CD, t:BROADCAST, e:E6NF, w:W|R
|
VPBROADCASTMB2Q Vfv,mKq nil [evex m:2 p:2 l:x w:1 0x2A /r:reg] s:AVX512CD, t:BROADCAST, e:E6NF, w:W|R
|
||||||
|
|
||||||
# 0x30 - 0x3F
|
# 0x30 - 0x3F
|
||||||
VPMOVZXBW Vn{K}{z},Wh nil [evex m:2 p:1 l:x w:i 0x30 /r] s:AVX512BW, t:DATAXFER, l:hvm, e:E5, w:W|R|R
|
VPMOVZXBW Vfv{K}{z},Whv nil [evex m:2 p:1 l:x w:i 0x30 /r] s:AVX512BW, t:DATAXFER, l:hvm, e:E5, w:W|R|R
|
||||||
VPMOVZXBD Vn{K}{z},Wf nil [evex m:2 p:1 l:x w:i 0x31 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E5, w:W|R|R
|
VPMOVZXBD Vfv{K}{z},Wqv nil [evex m:2 p:1 l:x w:i 0x31 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E5, w:W|R|R
|
||||||
VPMOVZXBQ Vn{K}{z},We nil [evex m:2 p:1 l:x w:i 0x32 /r] s:AVX512F, t:DATAXFER, l:ovm, e:E5, w:W|R|R
|
VPMOVZXBQ Vfv{K}{z},Wev nil [evex m:2 p:1 l:x w:i 0x32 /r] s:AVX512F, t:DATAXFER, l:ovm, e:E5, w:W|R|R
|
||||||
VPMOVZXWD Vn{K}{z},Wh nil [evex m:2 p:1 l:x w:i 0x33 /r] s:AVX512F, t:DATAXFER, l:hvm, e:E5, w:W|R|R
|
VPMOVZXWD Vfv{K}{z},Whv nil [evex m:2 p:1 l:x w:i 0x33 /r] s:AVX512F, t:DATAXFER, l:hvm, e:E5, w:W|R|R
|
||||||
VPMOVZXWQ Vn{K}{z},Wf nil [evex m:2 p:1 l:x w:i 0x34 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E5, w:W|R|R
|
VPMOVZXWQ Vfv{K}{z},Wqv nil [evex m:2 p:1 l:x w:i 0x34 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E5, w:W|R|R
|
||||||
VPMOVZXDQ Vn{K}{z},Wh nil [evex m:2 p:1 l:x w:0 0x35 /r] s:AVX512F, t:DATAXFER, l:hvm, e:E5, w:W|R|R
|
VPMOVZXDQ Vfv{K}{z},Whv nil [evex m:2 p:1 l:x w:0 0x35 /r] s:AVX512F, t:DATAXFER, l:hvm, e:E5, w:W|R|R
|
||||||
VPERMD Vu{K}{z},Hu,Wu|B32 nil [evex m:2 p:1 l:x w:0 0x36 /r] s:AVX512F, t:AVX512, a:NOL0, l:fv, e:E4NF, w:W|R|R|R
|
VPERMD Vuv{K}{z},Huv,Wuv|B32 nil [evex m:2 p:1 l:x w:0 0x36 /r] s:AVX512F, t:AVX512, a:NOL0, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VPERMQ Vu{K}{z},Hu,Wu|B64 nil [evex m:2 p:1 l:x w:1 0x36 /r] s:AVX512F, t:AVX512, a:NOL0, l:fv, e:E4NF, w:W|R|R|R
|
VPERMQ Vuv{K}{z},Huv,Wuv|B64 nil [evex m:2 p:1 l:x w:1 0x36 /r] s:AVX512F, t:AVX512, a:NOL0, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VPCMPGTQ rKq{K},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x37 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPCMPGTQ rKq{K},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x37 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPMOVWB Wh{K}{z},Vn nil [evex m:2 p:2 l:x w:0 0x30 /r] s:AVX512BW, t:DATAXFER, l:hvm, e:E6, w:W|R|R
|
VPMOVWB Whv{K}{z},Vfv nil [evex m:2 p:2 l:x w:0 0x30 /r] s:AVX512BW, t:DATAXFER, l:hvm, e:E6, w:W|R|R
|
||||||
VPMOVDB Wf{K}{z},Vn nil [evex m:2 p:2 l:x w:0 0x31 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E6, w:W|R|R
|
VPMOVDB Wqv{K}{z},Vfv nil [evex m:2 p:2 l:x w:0 0x31 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E6, w:W|R|R
|
||||||
VPMOVQB We{K}{z},Vn nil [evex m:2 p:2 l:x w:0 0x32 /r] s:AVX512F, t:DATAXFER, l:ovm, e:E6, w:W|R|R
|
VPMOVQB Wev{K}{z},Vfv nil [evex m:2 p:2 l:x w:0 0x32 /r] s:AVX512F, t:DATAXFER, l:ovm, e:E6, w:W|R|R
|
||||||
VPMOVDW Wh{K}{z},Vn nil [evex m:2 p:2 l:x w:0 0x33 /r] s:AVX512F, t:DATAXFER, l:hvm, e:E6, w:W|R|R
|
VPMOVDW Whv{K}{z},Vfv nil [evex m:2 p:2 l:x w:0 0x33 /r] s:AVX512F, t:DATAXFER, l:hvm, e:E6, w:W|R|R
|
||||||
VPMOVQW Wf{K}{z},Vn nil [evex m:2 p:2 l:x w:0 0x34 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E6, w:W|R|R
|
VPMOVQW Wqv{K}{z},Vfv nil [evex m:2 p:2 l:x w:0 0x34 /r] s:AVX512F, t:DATAXFER, l:qvm, e:E6, w:W|R|R
|
||||||
VPMOVQD Wh{K}{z},Vn nil [evex m:2 p:2 l:x w:0 0x35 /r] s:AVX512F, t:DATAXFER, l:hvm, e:E6, w:W|R|R
|
VPMOVQD Whv{K}{z},Vfv nil [evex m:2 p:2 l:x w:0 0x35 /r] s:AVX512F, t:DATAXFER, l:hvm, e:E6, w:W|R|R
|
||||||
VPMINSB Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:i 0x38 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPMINSB Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:i 0x38 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPMINSD Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x39 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPMINSD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x39 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPMINSQ Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x39 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPMINSQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x39 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPMINUW Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:i 0x3A /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPMINUW Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:i 0x3A /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPMINUD Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x3B /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPMINUD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x3B /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPMINUQ Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x3B /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPMINUQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x3B /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPMAXSB Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:i 0x3C /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPMAXSB Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:i 0x3C /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPMAXSD Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x3D /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPMAXSD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x3D /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPMAXSQ Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x3D /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPMAXSQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x3D /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPMAXUW Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:i 0x3E /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
VPMAXUW Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:i 0x3E /r] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R
|
||||||
VPMAXUD Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x3F /r] s:AVX512F, t:AVX512, l:fv, e:E4nb, w:W|R|R|R
|
VPMAXUD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x3F /r] s:AVX512F, t:AVX512, l:fv, e:E4nb, w:W|R|R|R
|
||||||
VPMAXUQ Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x3F /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPMAXUQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x3F /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPMOVM2D Vn,mKq nil [evex m:2 p:2 l:x w:0 0x38 /r:reg] s:AVX512DQ, t:DATAXFER, e:E7NM, w:W|R
|
VPMOVM2D Vfv,mKq nil [evex m:2 p:2 l:x w:0 0x38 /r:reg] s:AVX512DQ, t:DATAXFER, e:E7NM, w:W|R
|
||||||
VPMOVM2Q Vn,mKq nil [evex m:2 p:2 l:x w:1 0x38 /r:reg] s:AVX512DQ, t:DATAXFER, e:E7NM, w:W|R
|
VPMOVM2Q Vfv,mKq nil [evex m:2 p:2 l:x w:1 0x38 /r:reg] s:AVX512DQ, t:DATAXFER, e:E7NM, w:W|R
|
||||||
VPMOVD2M rKq,Un nil [evex m:2 p:2 l:x w:0 0x39 /r:reg] s:AVX512DQ, t:DATAXFER, e:E7NM, w:W|R
|
VPMOVD2M rKq,Ufv nil [evex m:2 p:2 l:x w:0 0x39 /r:reg] s:AVX512DQ, t:DATAXFER, e:E7NM, w:W|R
|
||||||
VPMOVQ2M rKq,Un nil [evex m:2 p:2 l:x w:1 0x39 /r:reg] s:AVX512DQ, t:DATAXFER, e:E7NM, w:W|R
|
VPMOVQ2M rKq,Ufv nil [evex m:2 p:2 l:x w:1 0x39 /r:reg] s:AVX512DQ, t:DATAXFER, e:E7NM, w:W|R
|
||||||
VPBROADCASTMW2D Vn,mKq nil [evex m:2 p:2 l:x w:0 0x3A /r:reg] s:AVX512CD, t:BROADCAST, e:E6NF, w:W|R
|
VPBROADCASTMW2D Vfv,mKq nil [evex m:2 p:2 l:x w:0 0x3A /r:reg] s:AVX512CD, t:BROADCAST, e:E6NF, w:W|R
|
||||||
|
|
||||||
# 0x40 - 0x4F
|
# 0x40 - 0x4F
|
||||||
VPMULLD Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x40 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPMULLD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x40 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPMULLQ Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x40 /r] s:AVX512DQ, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPMULLQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x40 /r] s:AVX512DQ, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VGETEXPPS Vn{K}{z},Wn|B32{sae} nil [evex m:2 p:1 l:x w:0 0x42 /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R
|
VGETEXPPS Vfv{K}{z},Wfv|B32{sae} nil [evex m:2 p:1 l:x w:0 0x42 /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R
|
||||||
VGETEXPPD Vn{K}{z},Wn|B64{sae} nil [evex m:2 p:1 l:x w:1 0x42 /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R
|
VGETEXPPD Vfv{K}{z},Wfv|B64{sae} nil [evex m:2 p:1 l:x w:1 0x42 /r] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R
|
||||||
VGETEXPSS Vdq{K}{z},Hdq,Wss{sae} nil [evex m:2 p:1 l:x w:0 0x43 /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
VGETEXPSS Vdq{K}{z},Hdq,Wss{sae} nil [evex m:2 p:1 l:x w:0 0x43 /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
||||||
VGETEXPSD Vdq{K}{z},Hdq,Wsd{sae} nil [evex m:2 p:1 l:x w:1 0x43 /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
VGETEXPSD Vdq{K}{z},Hdq,Wsd{sae} nil [evex m:2 p:1 l:x w:1 0x43 /r] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R
|
||||||
VPLZCNTD Vn{K}{z},Wn|B32 nil [evex m:2 p:1 l:x w:0 0x44 /r] s:AVX512CD, t:CONFLICT, l:fv, e:E4, w:W|R|R
|
VPLZCNTD Vfv{K}{z},Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x44 /r] s:AVX512CD, t:CONFLICT, l:fv, e:E4, w:W|R|R
|
||||||
VPLZCNTQ Vn{K}{z},Wn|B64 nil [evex m:2 p:1 l:x w:1 0x44 /r] s:AVX512CD, t:CONFLICT, l:fv, e:E4, w:W|R|R
|
VPLZCNTQ Vfv{K}{z},Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x44 /r] s:AVX512CD, t:CONFLICT, l:fv, e:E4, w:W|R|R
|
||||||
VPSRLVD Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x45 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPSRLVD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x45 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPSRLVQ Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x45 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPSRLVQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x45 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPSRAVD Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x46 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPSRAVD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x46 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPSRAVQ Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x46 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPSRAVQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x46 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPSLLVD Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x47 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPSLLVD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x47 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VPSLLVQ Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x47 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VPSLLVQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x47 /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VRCP14PS Vn{K}{z},Wn|B32 nil [evex m:2 p:1 l:x w:0 0x4C /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R
|
VRCP14PS Vfv{K}{z},Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x4C /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R
|
||||||
VRCP14PD Vn{K}{z},Wn|B64 nil [evex m:2 p:1 l:x w:1 0x4C /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R
|
VRCP14PD Vfv{K}{z},Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x4C /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R
|
||||||
VRCP14SS Vdq{K}{z},Hdq,Wss nil [evex m:2 p:1 l:x w:0 0x4D /r] s:AVX512F, t:AVX512, l:t1s, e:E10, w:W|R|R|R
|
VRCP14SS Vdq{K}{z},Hdq,Wss nil [evex m:2 p:1 l:x w:0 0x4D /r] s:AVX512F, t:AVX512, l:t1s, e:E10, w:W|R|R|R
|
||||||
VRCP14SD Vdq{K}{z},Hdq,Wsd nil [evex m:2 p:1 l:x w:1 0x4D /r] s:AVX512F, t:AVX512, l:t1s, e:E10, w:W|R|R|R
|
VRCP14SD Vdq{K}{z},Hdq,Wsd nil [evex m:2 p:1 l:x w:1 0x4D /r] s:AVX512F, t:AVX512, l:t1s, e:E10, w:W|R|R|R
|
||||||
VRSQRT14PS Vn{K}{z},Wn|B32 nil [evex m:2 p:1 l:x w:0 0x4E /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R
|
VRSQRT14PS Vfv{K}{z},Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x4E /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R
|
||||||
VRSQRT14PD Vn{K}{z},Wn|B64 nil [evex m:2 p:1 l:x w:1 0x4E /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R
|
VRSQRT14PD Vfv{K}{z},Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x4E /r] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R
|
||||||
VRSQRT14SS Vdq{K}{z},Hdq,Wss nil [evex m:2 p:1 l:x w:0 0x4F /r] s:AVX512F, t:AVX512, l:t1s, e:E10, w:W|R|R|R
|
VRSQRT14SS Vdq{K}{z},Hdq,Wss nil [evex m:2 p:1 l:x w:0 0x4F /r] s:AVX512F, t:AVX512, l:t1s, e:E10, w:W|R|R|R
|
||||||
VRSQRT14SD Vdq{K}{z},Hdq,Wsd nil [evex m:2 p:1 l:x w:1 0x4F /r] s:AVX512F, t:AVX512, l:t1s, e:E10, w:W|R|R|R
|
VRSQRT14SD Vdq{K}{z},Hdq,Wsd nil [evex m:2 p:1 l:x w:1 0x4F /r] s:AVX512F, t:AVX512, l:t1s, e:E10, w:W|R|R|R
|
||||||
|
|
||||||
# 0x50 - 0x5F
|
# 0x50 - 0x5F
|
||||||
VPDPBUSD Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x50 /r] s:AVX512VNNI, t:VNNI, l:fv, e:E4, w:RW|R|R|R
|
VPDPBUSD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x50 /r] s:AVX512VNNI, t:VNNI, l:fv, e:E4, w:RW|R|R|R
|
||||||
VPDPBUSDS Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x51 /r] s:AVX512VNNI, t:VNNI, l:fv, e:E4, w:RW|R|R|R
|
VPDPBUSDS Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x51 /r] s:AVX512VNNI, t:VNNI, l:fv, e:E4, w:RW|R|R|R
|
||||||
VPDPWSSD Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x52 /r] s:AVX512VNNI, t:VNNI, l:fv, e:E4, w:RW|R|R|R
|
VPDPWSSD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x52 /r] s:AVX512VNNI, t:VNNI, l:fv, e:E4, w:RW|R|R|R
|
||||||
VDPBF16PS Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:2 l:x w:0 0x52 /r] s:AVX512BF16, t:AVX512BF16, l:fv, e:E4, w:W|R|R|R
|
VDPBF16PS Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:2 l:x w:0 0x52 /r] s:AVX512BF16, t:AVX512BF16, l:fv, e:E4, w:W|R|R|R
|
||||||
VP4DPWSSD Voq{K}{z},Hoq+3,Mdq nil [evex m:2 p:3 l:2 w:0 0x52 /r:mem] s:AVX5124VNNIW, t:VNNIW, l:t1_4x, e:E4, w:RW|R|R|R
|
VP4DPWSSD Voq{K}{z},Hoq+3,Mdq nil [evex m:2 p:3 l:2 w:0 0x52 /r:mem] s:AVX5124VNNIW, t:VNNIW, l:t1_4x, e:E4, w:RW|R|R|R
|
||||||
VPDPWSSDS Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x53 /r] s:AVX512VNNI, t:VNNI, l:fv, e:E4, w:RW|R|R|R
|
VPDPWSSDS Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x53 /r] s:AVX512VNNI, t:VNNI, l:fv, e:E4, w:RW|R|R|R
|
||||||
VP4DPWSSDS Voq{K}{z},Hoq+3,Mdq nil [evex m:2 p:3 l:2 w:0 0x53 /r:mem] s:AVX5124VNNIW, t:VNNIW, l:t1_4x, e:E4, w:RW|R|R|R
|
VP4DPWSSDS Voq{K}{z},Hoq+3,Mdq nil [evex m:2 p:3 l:2 w:0 0x53 /r:mem] s:AVX5124VNNIW, t:VNNIW, l:t1_4x, e:E4, w:RW|R|R|R
|
||||||
VPOPCNTB Vn{K}{z},Wn nil [evex m:2 p:1 l:x w:0 0x54 /r] s:AVX512BITALG, t:VPOPCNT, l:fvm, e:E4, w:W|R|R
|
VPOPCNTB Vfv{K}{z},Wfv nil [evex m:2 p:1 l:x w:0 0x54 /r] s:AVX512BITALG, t:VPOPCNT, l:fvm, e:E4, w:W|R|R
|
||||||
VPOPCNTW Vn{K}{z},Wn nil [evex m:2 p:1 l:x w:1 0x54 /r] s:AVX512BITALG, t:VPOPCNT, l:fvm, e:E4, w:W|R|R
|
VPOPCNTW Vfv{K}{z},Wfv nil [evex m:2 p:1 l:x w:1 0x54 /r] s:AVX512BITALG, t:VPOPCNT, l:fvm, e:E4, w:W|R|R
|
||||||
VPOPCNTD Vn{K}{z},Wn|B32 nil [evex m:2 p:1 l:x w:0 0x55 /r] s:AVX512VPOPCNTDQ, t:VPOPCNT, l:fv, e:E4, w:W|R|R
|
VPOPCNTD Vfv{K}{z},Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x55 /r] s:AVX512VPOPCNTDQ, t:VPOPCNT, l:fv, e:E4, w:W|R|R
|
||||||
VPOPCNTQ Vn{K}{z},Wn|B64 nil [evex m:2 p:1 l:x w:1 0x55 /r] s:AVX512VPOPCNTDQ, t:VPOPCNT, l:fv, e:E4, w:W|R|R
|
VPOPCNTQ Vfv{K}{z},Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x55 /r] s:AVX512VPOPCNTDQ, t:VPOPCNT, l:fv, e:E4, w:W|R|R
|
||||||
VPBROADCASTD Vn{K}{z},Wd nil [evex m:2 p:1 l:x w:0 0x58 /r] s:AVX512F, t:BROADCAST, l:t1s, e:E6, w:W|R|R
|
VPBROADCASTD Vfv{K}{z},Wd nil [evex m:2 p:1 l:x w:0 0x58 /r] s:AVX512F, t:BROADCAST, l:t1s, e:E6, w:W|R|R
|
||||||
VBROADCASTI32X2 Vn{K}{z},Wq nil [evex m:2 p:1 l:x w:0 0x59 /r] s:AVX512DQ, t:BROADCAST, l:t2, e:E6, w:W|R|R
|
VBROADCASTI32X2 Vfv{K}{z},Wq nil [evex m:2 p:1 l:x w:0 0x59 /r] s:AVX512DQ, t:BROADCAST, l:t2, e:E6, w:W|R|R
|
||||||
VPBROADCASTQ Vn{K}{z},Wq nil [evex m:2 p:1 l:x w:1 0x59 /r] s:AVX512F, t:BROADCAST, l:t1s, e:E6, w:W|R|R
|
VPBROADCASTQ Vfv{K}{z},Wq nil [evex m:2 p:1 l:x w:1 0x59 /r] s:AVX512F, t:BROADCAST, l:t1s, e:E6, w:W|R|R
|
||||||
VBROADCASTI32X4 Vu{K}{z},Mdq nil [evex m:2 p:1 l:x w:0 0x5A /r:mem] s:AVX512F, t:BROADCAST, a:NOL0, l:t4, e:E6, w:W|R|R
|
VBROADCASTI32X4 Vuv{K}{z},Mdq nil [evex m:2 p:1 l:x w:0 0x5A /r:mem] s:AVX512F, t:BROADCAST, a:NOL0, l:t4, e:E6, w:W|R|R
|
||||||
VBROADCASTI64X2 Vu{K}{z},Mdq nil [evex m:2 p:1 l:x w:1 0x5A /r:mem] s:AVX512DQ, t:BROADCAST, a:NOL0, l:t2, e:E6, w:W|R|R
|
VBROADCASTI64X2 Vuv{K}{z},Mdq nil [evex m:2 p:1 l:x w:1 0x5A /r:mem] s:AVX512DQ, t:BROADCAST, a:NOL0, l:t2, e:E6, w:W|R|R
|
||||||
VBROADCASTI32X8 Voq{K}{z},Mqq nil [evex m:2 p:1 l:2 w:0 0x5B /r:mem] s:AVX512DQ, t:BROADCAST, l:t8, e:E6, w:W|R|R
|
VBROADCASTI32X8 Voq{K}{z},Mqq nil [evex m:2 p:1 l:2 w:0 0x5B /r:mem] s:AVX512DQ, t:BROADCAST, l:t8, e:E6, w:W|R|R
|
||||||
VBROADCASTI64X4 Voq{K}{z},Mqq nil [evex m:2 p:1 l:2 w:1 0x5B /r:mem] s:AVX512F, t:BROADCAST, l:t4, e:E6, w:W|R|R
|
VBROADCASTI64X4 Voq{K}{z},Mqq nil [evex m:2 p:1 l:2 w:1 0x5B /r:mem] s:AVX512F, t:BROADCAST, l:t4, e:E6, w:W|R|R
|
||||||
|
|
||||||
# 0x60 - 0x6F
|
# 0x60 - 0x6F
|
||||||
VPEXPANDB Vn{K}{z},Wn nil [evex m:2 p:1 l:x w:0 0x62 /r] s:AVX512VBMI2, t:AVX512VBMI, l:t1s8, e:E4, w:W|R|R
|
VPEXPANDB Vfv{K}{z},Wfv nil [evex m:2 p:1 l:x w:0 0x62 /r] s:AVX512VBMI2, t:AVX512VBMI, l:t1s8, e:E4, w:W|R|R
|
||||||
VPEXPANDW Vn{K}{z},Wn nil [evex m:2 p:1 l:x w:1 0x62 /r] s:AVX512VBMI2, t:AVX512VBMI, l:t1s16, e:E4, w:W|R|R
|
VPEXPANDW Vfv{K}{z},Wfv nil [evex m:2 p:1 l:x w:1 0x62 /r] s:AVX512VBMI2, t:AVX512VBMI, l:t1s16, e:E4, w:W|R|R
|
||||||
VPCOMPRESSB Wn{K}{z},Vn nil [evex m:2 p:1 l:x w:0 0x63 /r] s:AVX512VBMI2, t:AVX512VBMI, l:t1s8, a:NOMZ, e:E4, w:W|R|R
|
VPCOMPRESSB Wfv{K}{z},Vfv nil [evex m:2 p:1 l:x w:0 0x63 /r] s:AVX512VBMI2, t:AVX512VBMI, l:t1s8, a:NOMZ, e:E4, w:W|R|R
|
||||||
VPCOMPRESSW Wn{K}{z},Vn nil [evex m:2 p:1 l:x w:1 0x63 /r] s:AVX512VBMI2, t:AVX512VBMI, l:t1s16, a:NOMZ, e:E4, w:W|R|R
|
VPCOMPRESSW Wfv{K}{z},Vfv nil [evex m:2 p:1 l:x w:1 0x63 /r] s:AVX512VBMI2, t:AVX512VBMI, l:t1s16, a:NOMZ, e:E4, w:W|R|R
|
||||||
VPBLENDMD Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x64 /r] s:AVX512F, t:BLEND, l:fv, e:E4, w:W|R|R|R
|
VPBLENDMD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x64 /r] s:AVX512F, t:BLEND, l:fv, e:E4, w:W|R|R|R
|
||||||
VPBLENDMQ Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x64 /r] s:AVX512F, t:BLEND, l:fv, e:E4, w:W|R|R|R
|
VPBLENDMQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x64 /r] s:AVX512F, t:BLEND, l:fv, e:E4, w:W|R|R|R
|
||||||
VBLENDMPS Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x65 /r] s:AVX512F, t:BLEND, l:fv, e:E4, w:W|R|R|R
|
VBLENDMPS Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x65 /r] s:AVX512F, t:BLEND, l:fv, e:E4, w:W|R|R|R
|
||||||
VBLENDMPD Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x65 /r] s:AVX512F, t:BLEND, l:fv, e:E4, w:W|R|R|R
|
VBLENDMPD Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x65 /r] s:AVX512F, t:BLEND, l:fv, e:E4, w:W|R|R|R
|
||||||
VPBLENDMB Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:0 0x66 /r] s:AVX512BW, t:BLEND, l:fvm, e:E4, w:W|R|R|R
|
VPBLENDMB Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:0 0x66 /r] s:AVX512BW, t:BLEND, l:fvm, e:E4, w:W|R|R|R
|
||||||
VPBLENDMW Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:1 0x66 /r] s:AVX512BW, t:BLEND, l:fvm, e:E4, w:W|R|R|R
|
VPBLENDMW Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:1 0x66 /r] s:AVX512BW, t:BLEND, l:fvm, e:E4, w:W|R|R|R
|
||||||
|
|
||||||
VP2INTERSECTD rKq+1,Hn,Wn|B32 nil [evex m:2 p:3 l:x w:0 0x68 /r] s:AVX512VP2INTERSECT, t:AVX512VP2INTERSECT, l:fv, e:E4NF, w:W|R|R
|
VP2INTERSECTD rKq+1,Hfv,Wfv|B32 nil [evex m:2 p:3 l:x w:0 0x68 /r] s:AVX512VP2INTERSECT, t:AVX512VP2INTERSECT, l:fv, e:E4NF, w:W|R|R
|
||||||
VP2INTERSECTQ rKq+1,Hn,Wn|B64 nil [evex m:2 p:3 l:x w:1 0x68 /r] s:AVX512VP2INTERSECT, t:AVX512VP2INTERSECT, l:fv, e:E4NF, w:W|R|R
|
VP2INTERSECTQ rKq+1,Hfv,Wfv|B64 nil [evex m:2 p:3 l:x w:1 0x68 /r] s:AVX512VP2INTERSECT, t:AVX512VP2INTERSECT, l:fv, e:E4NF, w:W|R|R
|
||||||
|
|
||||||
# 0x70 - 0x7F
|
# 0x70 - 0x7F
|
||||||
VPSHLDVW Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:1 0x70 /r] s:AVX512VBMI2, t:AVX512VBMI, l:fvm, e:E4, w:RW|R|R|R
|
VPSHLDVW Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:1 0x70 /r] s:AVX512VBMI2, t:AVX512VBMI, l:fvm, e:E4, w:RW|R|R|R
|
||||||
VPSHLDVD Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x71 /r] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R
|
VPSHLDVD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x71 /r] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R
|
||||||
VPSHLDVQ Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x71 /r] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R
|
VPSHLDVQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x71 /r] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R
|
||||||
VPSHRDVW Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:1 0x72 /r] s:AVX512VBMI2, t:AVX512VBMI, l:fvm, e:E4, w:RW|R|R|R
|
VPSHRDVW Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:1 0x72 /r] s:AVX512VBMI2, t:AVX512VBMI, l:fvm, e:E4, w:RW|R|R|R
|
||||||
VCVTNEPS2BF16 Vh{K}{z},Wn|B32 nil [evex m:2 p:2 l:x w:0 0x72 /r] s:AVX512BF16, t:AVX512BF16, l:fv, e:E4, w:W|R|R
|
VCVTNEPS2BF16 Vhv{K}{z},Wfv|B32 nil [evex m:2 p:2 l:x w:0 0x72 /r] s:AVX512BF16, t:AVX512BF16, l:fv, e:E4, w:W|R|R
|
||||||
VCVTNE2PS2BF16 Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:3 l:x w:0 0x72 /r] s:AVX512BF16, t:AVX512BF16, l:fv, e:E4NF, w:W|R|R|R
|
VCVTNE2PS2BF16 Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:3 l:x w:0 0x72 /r] s:AVX512BF16, t:AVX512BF16, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VPSHRDVD Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x73 /r] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R
|
VPSHRDVD Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x73 /r] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R
|
||||||
VPSHRDVQ Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x73 /r] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R
|
VPSHRDVQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x73 /r] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R
|
||||||
|
|
||||||
VPERMI2B Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:0 0x75 /r] s:AVX512VBMI, t:AVX512VBMI, l:fvm, e:E4NFnb, w:RW|R|R|R
|
VPERMI2B Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:0 0x75 /r] s:AVX512VBMI, t:AVX512VBMI, l:fvm, e:E4NFnb, w:RW|R|R|R
|
||||||
VPERMI2W Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:1 0x75 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:RW|R|R|R
|
VPERMI2W Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:1 0x75 /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:RW|R|R|R
|
||||||
VPERMI2D Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x76 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:RW|R|R|R
|
VPERMI2D Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x76 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:RW|R|R|R
|
||||||
VPERMI2Q Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x76 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:RW|R|R|R
|
VPERMI2Q Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x76 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:RW|R|R|R
|
||||||
VPERMI2PS Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x77 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:RW|R|R|R
|
VPERMI2PS Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x77 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:RW|R|R|R
|
||||||
VPERMI2PD Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x77 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:RW|R|R|R
|
VPERMI2PD Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x77 /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:RW|R|R|R
|
||||||
VPBROADCASTB Vn{K}{z},Wb nil [evex m:2 p:1 l:x w:0 0x78 /r] s:AVX512BW, t:BROADCAST, l:t1s8, e:E6, w:W|R|R
|
VPBROADCASTB Vfv{K}{z},Wb nil [evex m:2 p:1 l:x w:0 0x78 /r] s:AVX512BW, t:BROADCAST, l:t1s8, e:E6, w:W|R|R
|
||||||
VPBROADCASTW Vn{K}{z},Ww nil [evex m:2 p:1 l:x w:0 0x79 /r] s:AVX512BW, t:BROADCAST, l:t1s16, e:E6, w:W|R|R
|
VPBROADCASTW Vfv{K}{z},Ww nil [evex m:2 p:1 l:x w:0 0x79 /r] s:AVX512BW, t:BROADCAST, l:t1s16, e:E6, w:W|R|R
|
||||||
VPBROADCASTB Vn{K}{z},Rb nil [evex m:2 p:1 l:x w:0 0x7A /r:reg] s:AVX512BW, t:BROADCAST, l:t1s8, e:E7NM, w:W|R|R
|
VPBROADCASTB Vfv{K}{z},Rb nil [evex m:2 p:1 l:x w:0 0x7A /r:reg] s:AVX512BW, t:BROADCAST, l:t1s8, e:E7NM, w:W|R|R
|
||||||
VPBROADCASTW Vn{K}{z},Rw nil [evex m:2 p:1 l:x w:0 0x7B /r:reg] s:AVX512BW, t:BROADCAST, l:t1s16, e:E7NM, w:W|R|R
|
VPBROADCASTW Vfv{K}{z},Rw nil [evex m:2 p:1 l:x w:0 0x7B /r:reg] s:AVX512BW, t:BROADCAST, l:t1s16, e:E7NM, w:W|R|R
|
||||||
VPBROADCASTD Vn{K}{z},Rd nil [evex m:2 p:1 l:x w:0 0x7C /r:reg] s:AVX512F, t:BROADCAST, l:t1s, e:E7NM, w:W|R|R, a:IWO64
|
VPBROADCASTD Vfv{K}{z},Rd nil [evex m:2 p:1 l:x w:0 0x7C /r:reg] s:AVX512F, t:BROADCAST, l:t1s, e:E7NM, w:W|R|R, a:IWO64
|
||||||
VPBROADCASTQ Vn{K}{z},Rq nil [evex m:2 p:1 l:x w:1 0x7C /r:reg] s:AVX512F, t:BROADCAST, l:t1s, e:E7NM, w:W|R|R, a:IWO64
|
VPBROADCASTQ Vfv{K}{z},Rq nil [evex m:2 p:1 l:x w:1 0x7C /r:reg] s:AVX512F, t:BROADCAST, l:t1s, e:E7NM, w:W|R|R, a:IWO64
|
||||||
VPERMT2B Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:0 0x7D /r] s:AVX512VBMI, t:AVX512VBMI, l:fvm, e:E4NFnb, w:RW|R|R|R
|
VPERMT2B Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:0 0x7D /r] s:AVX512VBMI, t:AVX512VBMI, l:fvm, e:E4NFnb, w:RW|R|R|R
|
||||||
VPERMT2W Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:1 0x7D /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:RW|R|R|R
|
VPERMT2W Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:1 0x7D /r] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:RW|R|R|R
|
||||||
VPERMT2D Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x7E /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:RW|R|R|R
|
VPERMT2D Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x7E /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:RW|R|R|R
|
||||||
VPERMT2Q Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x7E /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:RW|R|R|R
|
VPERMT2Q Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x7E /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:RW|R|R|R
|
||||||
VPERMT2PS Vn{K}{z},Hn,Wn|B32 nil [evex m:2 p:1 l:x w:0 0x7F /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:RW|R|R|R
|
VPERMT2PS Vfv{K}{z},Hfv,Wfv|B32 nil [evex m:2 p:1 l:x w:0 0x7F /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:RW|R|R|R
|
||||||
VPERMT2PD Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x7F /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:RW|R|R|R
|
VPERMT2PD Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x7F /r] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:RW|R|R|R
|
||||||
|
|
||||||
# 0x80 - 0x8F
|
# 0x80 - 0x8F
|
||||||
VPMULTISHIFTQB Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0x83 /r] s:AVX512VBMI, t:AVX512VBMI, l:fv, e:E4NF, w:W|R|R|R
|
VPMULTISHIFTQB Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0x83 /r] s:AVX512VBMI, t:AVX512VBMI, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VEXPANDPS Vn{K}{z},Wn nil [evex m:2 p:1 l:x w:0 0x88 /r] s:AVX512F, t:EXPAND, l:t1s, e:E4nb, w:W|R|R
|
VEXPANDPS Vfv{K}{z},Wfv nil [evex m:2 p:1 l:x w:0 0x88 /r] s:AVX512F, t:EXPAND, l:t1s, e:E4nb, w:W|R|R
|
||||||
VEXPANDPD Vn{K}{z},Wn nil [evex m:2 p:1 l:x w:1 0x88 /r] s:AVX512F, t:EXPAND, l:t1s, e:E4nb, w:W|R|R
|
VEXPANDPD Vfv{K}{z},Wfv nil [evex m:2 p:1 l:x w:1 0x88 /r] s:AVX512F, t:EXPAND, l:t1s, e:E4nb, w:W|R|R
|
||||||
VPEXPANDD Vn{K}{z},Wn nil [evex m:2 p:1 l:x w:0 0x89 /r] s:AVX512F, t:EXPAND, l:t1s, e:E4nb, w:W|R|R
|
VPEXPANDD Vfv{K}{z},Wfv nil [evex m:2 p:1 l:x w:0 0x89 /r] s:AVX512F, t:EXPAND, l:t1s, e:E4nb, w:W|R|R
|
||||||
VPEXPANDQ Vn{K}{z},Wn nil [evex m:2 p:1 l:x w:1 0x89 /r] s:AVX512F, t:EXPAND, l:t1s, e:E4nb, w:W|R|R
|
VPEXPANDQ Vfv{K}{z},Wfv nil [evex m:2 p:1 l:x w:1 0x89 /r] s:AVX512F, t:EXPAND, l:t1s, e:E4nb, w:W|R|R
|
||||||
VCOMPRESSPS Wn{K}{z},Vn nil [evex m:2 p:1 l:x w:0 0x8A /r] s:AVX512F, t:COMPRESS, a:NOMZ, l:t1s, e:E4nb, w:W|R|R
|
VCOMPRESSPS Wfv{K}{z},Vfv nil [evex m:2 p:1 l:x w:0 0x8A /r] s:AVX512F, t:COMPRESS, a:NOMZ, l:t1s, e:E4nb, w:W|R|R
|
||||||
VCOMPRESSPD Wn{K}{z},Vn nil [evex m:2 p:1 l:x w:1 0x8A /r] s:AVX512F, t:COMPRESS, a:NOMZ, l:t1s, e:E4nb, w:W|R|R
|
VCOMPRESSPD Wfv{K}{z},Vfv nil [evex m:2 p:1 l:x w:1 0x8A /r] s:AVX512F, t:COMPRESS, a:NOMZ, l:t1s, e:E4nb, w:W|R|R
|
||||||
VPCOMPRESSD Wn{K}{z},Vn nil [evex m:2 p:1 l:x w:0 0x8B /r] s:AVX512F, t:COMPRESS, a:NOMZ, l:t1s, e:E4nb, w:W|R|R
|
VPCOMPRESSD Wfv{K}{z},Vfv nil [evex m:2 p:1 l:x w:0 0x8B /r] s:AVX512F, t:COMPRESS, a:NOMZ, l:t1s, e:E4nb, w:W|R|R
|
||||||
VPCOMPRESSQ Wn{K}{z},Vn nil [evex m:2 p:1 l:x w:1 0x8B /r] s:AVX512F, t:COMPRESS, a:NOMZ, l:t1s, e:E4nb, w:W|R|R
|
VPCOMPRESSQ Wfv{K}{z},Vfv nil [evex m:2 p:1 l:x w:1 0x8B /r] s:AVX512F, t:COMPRESS, a:NOMZ, l:t1s, e:E4nb, w:W|R|R
|
||||||
VPERMB Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:0 0x8D /r] s:AVX512VBMI, t:AVX512VBMI, a:NOMZ, l:fvm, e:E4NFnb, w:W|R|R|R
|
VPERMB Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:0 0x8D /r] s:AVX512VBMI, t:AVX512VBMI, a:NOMZ, l:fvm, e:E4NFnb, w:W|R|R|R
|
||||||
VPERMW Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:1 0x8D /r] s:AVX512BW, t:AVX512, l:fv, a:NOMZ, l:fvm, e:E4NFnb, w:W|R|R|R
|
VPERMW Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:1 0x8D /r] s:AVX512BW, t:AVX512, l:fv, a:NOMZ, l:fvm, e:E4NFnb, w:W|R|R|R
|
||||||
VPSHUFBITQMB rK{K},Hn,Wn nil [evex m:2 p:1 l:x w:0 0x8F /r] s:AVX512BITALG, t:AVX512VBMI, l:fvm, w:W|R|R|R
|
VPSHUFBITQMB rK{K},Hfv,Wfv nil [evex m:2 p:1 l:x w:0 0x8F /r] s:AVX512BITALG, t:AVX512VBMI, l:fvm, w:W|R|R|R
|
||||||
|
|
||||||
|
|
||||||
# 0x90 - 0x9F
|
# 0x90 - 0x9F
|
||||||
VPGATHERDD Vn{K},Mvm32n nil [evex m:2 p:1 l:x w:0 0x90 /r:mem vsib] s:AVX512F, t:GATHER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
VPGATHERDD Vfv{K},Mvm32n nil [evex m:2 p:1 l:x w:0 0x90 /r:mem vsib] s:AVX512F, t:GATHER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
||||||
VPGATHERDQ Vn{K},Mvm32h nil [evex m:2 p:1 l:x w:1 0x90 /r:mem vsib] s:AVX512F, t:GATHER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
VPGATHERDQ Vfv{K},Mvm32h nil [evex m:2 p:1 l:x w:1 0x90 /r:mem vsib] s:AVX512F, t:GATHER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
||||||
VPGATHERQD Vh{K},Mvm64n nil [evex m:2 p:1 l:x w:0 0x91 /r:mem vsib] s:AVX512F, t:GATHER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
VPGATHERQD Vhv{K},Mvm64n nil [evex m:2 p:1 l:x w:0 0x91 /r:mem vsib] s:AVX512F, t:GATHER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
||||||
VPGATHERQQ Vn{K},Mvm64n nil [evex m:2 p:1 l:x w:1 0x91 /r:mem vsib] s:AVX512F, t:GATHER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
VPGATHERQQ Vfv{K},Mvm64n nil [evex m:2 p:1 l:x w:1 0x91 /r:mem vsib] s:AVX512F, t:GATHER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
||||||
VGATHERDPS Vn{K},Mvm32n nil [evex m:2 p:1 l:x w:0 0x92 /r:mem vsib] s:AVX512F, t:GATHER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
VGATHERDPS Vfv{K},Mvm32n nil [evex m:2 p:1 l:x w:0 0x92 /r:mem vsib] s:AVX512F, t:GATHER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
||||||
VGATHERDPD Vn{K},Mvm32h nil [evex m:2 p:1 l:x w:1 0x92 /r:mem vsib] s:AVX512F, t:GATHER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
VGATHERDPD Vfv{K},Mvm32h nil [evex m:2 p:1 l:x w:1 0x92 /r:mem vsib] s:AVX512F, t:GATHER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
||||||
VGATHERQPS Vh{K},Mvm64n nil [evex m:2 p:1 l:x w:0 0x93 /r:mem vsib] s:AVX512F, t:GATHER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
VGATHERQPS Vhv{K},Mvm64n nil [evex m:2 p:1 l:x w:0 0x93 /r:mem vsib] s:AVX512F, t:GATHER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
||||||
VGATHERQPD Vn{K},Mvm64n nil [evex m:2 p:1 l:x w:1 0x93 /r:mem vsib] s:AVX512F, t:GATHER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
VGATHERQPD Vfv{K},Mvm64n nil [evex m:2 p:1 l:x w:1 0x93 /r:mem vsib] s:AVX512F, t:GATHER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
||||||
|
|
||||||
VFMADDSUB132PS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:2 p:1 l:x w:0 0x96 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMADDSUB132PS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:2 p:1 l:x w:0 0x96 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMADDSUB132PD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:2 p:1 l:x w:1 0x96 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMADDSUB132PD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:2 p:1 l:x w:1 0x96 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMSUBADD132PS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:2 p:1 l:x w:0 0x97 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMSUBADD132PS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:2 p:1 l:x w:0 0x97 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMSUBADD132PD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:2 p:1 l:x w:1 0x97 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMSUBADD132PD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:2 p:1 l:x w:1 0x97 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMADD132PS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:2 p:1 l:x w:0 0x98 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMADD132PS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:2 p:1 l:x w:0 0x98 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMADD132PD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:2 p:1 l:x w:1 0x98 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMADD132PD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:2 p:1 l:x w:1 0x98 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMADD132SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0x99 /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFMADD132SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0x99 /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
VFMADD132SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0x99 /r] s:AVX512F, t:VFMA, l:t1s, e:E2, w:RW|R|R|R
|
VFMADD132SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0x99 /r] s:AVX512F, t:VFMA, l:t1s, e:E2, w:RW|R|R|R
|
||||||
VFMSUB132PS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:2 p:1 l:x w:0 0x9A /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMSUB132PS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:2 p:1 l:x w:0 0x9A /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMSUB132PD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:2 p:1 l:x w:1 0x9A /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMSUB132PD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:2 p:1 l:x w:1 0x9A /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
V4FMADDPS Voq{K}{z},Hoq+3,Mdq nil [evex m:2 p:3 l:2 w:0 0x9A /r:mem] s:AVX5124FMAPS, t:VFMAPS, l:t1_4x, e:E2, w:RW|R|R|R
|
V4FMADDPS Voq{K}{z},Hoq+3,Mdq nil [evex m:2 p:3 l:2 w:0 0x9A /r:mem] s:AVX5124FMAPS, t:VFMAPS, l:t1_4x, e:E2, w:RW|R|R|R
|
||||||
VFMSUB132SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0x9B /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFMSUB132SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0x9B /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
VFMSUB132SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0x9B /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFMSUB132SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0x9B /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
V4FMADDSS Vdq{K}{z},Hdq+3,Mdq nil [evex m:2 p:3 l:i w:0 0x9B /r:mem] s:AVX5124FMAPS, t:VFMAPS, e:E3, l:t1_4x, w:RW|R|R|R
|
V4FMADDSS Vdq{K}{z},Hdq+3,Mdq nil [evex m:2 p:3 l:i w:0 0x9B /r:mem] s:AVX5124FMAPS, t:VFMAPS, e:E3, l:t1_4x, w:RW|R|R|R
|
||||||
VFNMADD132PS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:2 p:1 l:x w:0 0x9C /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFNMADD132PS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:2 p:1 l:x w:0 0x9C /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFNMADD132PD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:2 p:1 l:x w:1 0x9C /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFNMADD132PD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:2 p:1 l:x w:1 0x9C /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFNMADD132SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0x9D /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFNMADD132SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0x9D /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
VFNMADD132SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0x9D /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFNMADD132SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0x9D /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
VFNMSUB132PS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:2 p:1 l:x w:0 0x9E /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFNMSUB132PS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:2 p:1 l:x w:0 0x9E /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFNMSUB132PD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:2 p:1 l:x w:1 0x9E /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFNMSUB132PD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:2 p:1 l:x w:1 0x9E /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFNMSUB132SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0x9F /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFNMSUB132SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0x9F /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
VFNMSUB132SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0x9F /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFNMSUB132SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0x9F /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
|
|
||||||
# 0xA0 - 0xAF
|
# 0xA0 - 0xAF
|
||||||
VPSCATTERDD Mvm32n{K},Vn nil [evex m:2 p:1 l:x w:0 0xA0 /r:mem vsib] s:AVX512F, t:SCATTER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
VPSCATTERDD Mvm32n{K},Vfv nil [evex m:2 p:1 l:x w:0 0xA0 /r:mem vsib] s:AVX512F, t:SCATTER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
||||||
VPSCATTERDQ Mvm32h{K},Vn nil [evex m:2 p:1 l:x w:1 0xA0 /r:mem vsib] s:AVX512F, t:SCATTER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
VPSCATTERDQ Mvm32h{K},Vfv nil [evex m:2 p:1 l:x w:1 0xA0 /r:mem vsib] s:AVX512F, t:SCATTER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
||||||
VPSCATTERQD Mvm64n{K},Vh nil [evex m:2 p:1 l:x w:0 0xA1 /r:mem vsib] s:AVX512F, t:SCATTER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
VPSCATTERQD Mvm64n{K},Vhv nil [evex m:2 p:1 l:x w:0 0xA1 /r:mem vsib] s:AVX512F, t:SCATTER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
||||||
VPSCATTERQQ Mvm64n{K},Vn nil [evex m:2 p:1 l:x w:1 0xA1 /r:mem vsib] s:AVX512F, t:SCATTER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
VPSCATTERQQ Mvm64n{K},Vfv nil [evex m:2 p:1 l:x w:1 0xA1 /r:mem vsib] s:AVX512F, t:SCATTER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
||||||
VSCATTERDPS Mvm32n{K},Vn nil [evex m:2 p:1 l:x w:0 0xA2 /r:mem vsib] s:AVX512F, t:SCATTER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
VSCATTERDPS Mvm32n{K},Vfv nil [evex m:2 p:1 l:x w:0 0xA2 /r:mem vsib] s:AVX512F, t:SCATTER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
||||||
VSCATTERDPD Mvm32h{K},Vn nil [evex m:2 p:1 l:x w:1 0xA2 /r:mem vsib] s:AVX512F, t:SCATTER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
VSCATTERDPD Mvm32h{K},Vfv nil [evex m:2 p:1 l:x w:1 0xA2 /r:mem vsib] s:AVX512F, t:SCATTER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
||||||
VSCATTERQPS Mvm64n{K},Vh nil [evex m:2 p:1 l:x w:0 0xA3 /r:mem vsib] s:AVX512F, t:SCATTER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
VSCATTERQPS Mvm64n{K},Vhv nil [evex m:2 p:1 l:x w:0 0xA3 /r:mem vsib] s:AVX512F, t:SCATTER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
||||||
VSCATTERQPD Mvm64n{K},Vn nil [evex m:2 p:1 l:x w:1 0xA3 /r:mem vsib] s:AVX512F, t:SCATTER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
VSCATTERQPD Mvm64n{K},Vfv nil [evex m:2 p:1 l:x w:1 0xA3 /r:mem vsib] s:AVX512F, t:SCATTER, a:MMASK, l:t1s, e:E12, w:W|R|RW
|
||||||
|
|
||||||
VFMADDSUB213PS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:2 p:1 l:x w:0 0xA6 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMADDSUB213PS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:2 p:1 l:x w:0 0xA6 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMADDSUB213PD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:2 p:1 l:x w:1 0xA6 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMADDSUB213PD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:2 p:1 l:x w:1 0xA6 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMSUBADD213PS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:2 p:1 l:x w:0 0xA7 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMSUBADD213PS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:2 p:1 l:x w:0 0xA7 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMSUBADD213PD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:2 p:1 l:x w:1 0xA7 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMSUBADD213PD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:2 p:1 l:x w:1 0xA7 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMADD213PS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:2 p:1 l:x w:0 0xA8 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMADD213PS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:2 p:1 l:x w:0 0xA8 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMADD213PD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:2 p:1 l:x w:1 0xA8 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMADD213PD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:2 p:1 l:x w:1 0xA8 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMADD213SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0xA9 /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFMADD213SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0xA9 /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
VFMADD213SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0xA9 /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFMADD213SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0xA9 /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
VFMSUB213PS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:2 p:1 l:x w:0 0xAA /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMSUB213PS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:2 p:1 l:x w:0 0xAA /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMSUB213PD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:2 p:1 l:x w:1 0xAA /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMSUB213PD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:2 p:1 l:x w:1 0xAA /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
V4FNMADDPS Voq{K}{z},Hoq+3,Mdq nil [evex m:2 p:3 l:2 w:0 0xAA /r:mem] s:AVX5124FMAPS, t:VFMAPS, l:t1_4x, e:E2, w:RW|R|R|R
|
V4FNMADDPS Voq{K}{z},Hoq+3,Mdq nil [evex m:2 p:3 l:2 w:0 0xAA /r:mem] s:AVX5124FMAPS, t:VFMAPS, l:t1_4x, e:E2, w:RW|R|R|R
|
||||||
VFMSUB213SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0xAB /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFMSUB213SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0xAB /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
VFMSUB213SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0xAB /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFMSUB213SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0xAB /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
V4FNMADDSS Vdq{K}{z},Hdq+3,Mdq nil [evex m:2 p:3 l:i w:0 0xAB /r:mem] s:AVX5124FMAPS, t:VFMAPS, l:t1_4x, e:E2, w:RW|R|R|R
|
V4FNMADDSS Vdq{K}{z},Hdq+3,Mdq nil [evex m:2 p:3 l:i w:0 0xAB /r:mem] s:AVX5124FMAPS, t:VFMAPS, l:t1_4x, e:E2, w:RW|R|R|R
|
||||||
VFNMADD213PS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:2 p:1 l:x w:0 0xAC /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFNMADD213PS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:2 p:1 l:x w:0 0xAC /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFNMADD213PD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:2 p:1 l:x w:1 0xAC /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFNMADD213PD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:2 p:1 l:x w:1 0xAC /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFNMADD213SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0xAD /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFNMADD213SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0xAD /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
VFNMADD213SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0xAD /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFNMADD213SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0xAD /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
VFNMSUB213PS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:2 p:1 l:x w:0 0xAE /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFNMSUB213PS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:2 p:1 l:x w:0 0xAE /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFNMSUB213PD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:2 p:1 l:x w:1 0xAE /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFNMSUB213PD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:2 p:1 l:x w:1 0xAE /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFNMSUB213SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0xAF /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFNMSUB213SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0xAF /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
VFNMSUB213SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0xAF /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFNMSUB213SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0xAF /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
|
|
||||||
# 0xB0 - 0xBF
|
# 0xB0 - 0xBF
|
||||||
VPMADD52LUQ Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0xB4 /r] s:AVX512IFMA, t:IFMA, l:fv, e:E4, w:RW|R|R|R
|
VPMADD52LUQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0xB4 /r] s:AVX512IFMA, t:IFMA, l:fv, e:E4, w:RW|R|R|R
|
||||||
VPMADD52HUQ Vn{K}{z},Hn,Wn|B64 nil [evex m:2 p:1 l:x w:1 0xB5 /r] s:AVX512IFMA, t:IFMA, l:fv, e:E4, w:RW|R|R|R
|
VPMADD52HUQ Vfv{K}{z},Hfv,Wfv|B64 nil [evex m:2 p:1 l:x w:1 0xB5 /r] s:AVX512IFMA, t:IFMA, l:fv, e:E4, w:RW|R|R|R
|
||||||
VFMADDSUB231PS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:2 p:1 l:x w:0 0xB6 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMADDSUB231PS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:2 p:1 l:x w:0 0xB6 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMADDSUB231PD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:2 p:1 l:x w:1 0xB6 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMADDSUB231PD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:2 p:1 l:x w:1 0xB6 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMSUBADD231PS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:2 p:1 l:x w:0 0xB7 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMSUBADD231PS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:2 p:1 l:x w:0 0xB7 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMSUBADD231PD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:2 p:1 l:x w:1 0xB7 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMSUBADD231PD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:2 p:1 l:x w:1 0xB7 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMADD231PS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:2 p:1 l:x w:0 0xB8 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMADD231PS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:2 p:1 l:x w:0 0xB8 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMADD231PD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:2 p:1 l:x w:1 0xB8 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMADD231PD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:2 p:1 l:x w:1 0xB8 /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMADD231SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0xB9 /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFMADD231SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0xB9 /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
VFMADD231SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0xB9 /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFMADD231SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0xB9 /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
VFMSUB231PS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:2 p:1 l:x w:0 0xBA /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMSUB231PS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:2 p:1 l:x w:0 0xBA /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMSUB231PD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:2 p:1 l:x w:1 0xBA /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFMSUB231PD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:2 p:1 l:x w:1 0xBA /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMSUB231SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0xBB /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFMSUB231SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0xBB /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
VFMSUB231SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0xBB /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFMSUB231SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0xBB /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
VFNMADD231PS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:2 p:1 l:x w:0 0xBC /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFNMADD231PS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:2 p:1 l:x w:0 0xBC /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFNMADD231PD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:2 p:1 l:x w:1 0xBC /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFNMADD231PD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:2 p:1 l:x w:1 0xBC /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFNMADD231SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0xBD /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFNMADD231SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0xBD /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
VFNMADD231SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0xBD /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFNMADD231SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0xBD /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
VFNMSUB231PS Vn{K}{z},Hn,Wn|B32{er} nil [evex m:2 p:1 l:x w:0 0xBE /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFNMSUB231PS Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:2 p:1 l:x w:0 0xBE /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFNMSUB231PD Vn{K}{z},Hn,Wn|B64{er} nil [evex m:2 p:1 l:x w:1 0xBE /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
VFNMSUB231PD Vfv{K}{z},Hfv,Wfv|B64{er} nil [evex m:2 p:1 l:x w:1 0xBE /r] s:AVX512F, t:VFMA, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFNMSUB231SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0xBF /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFNMSUB231SS Vdq{K}{z},Hdq,Wss{er} nil [evex m:2 p:1 l:i w:0 0xBF /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
VFNMSUB231SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0xBF /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
VFNMSUB231SD Vdq{K}{z},Hdq,Wsd{er} nil [evex m:2 p:1 l:i w:1 0xBF /r] s:AVX512F, t:VFMA, l:t1s, e:E3, w:RW|R|R|R
|
||||||
|
|
||||||
# 0xC0 - 0xCF
|
# 0xC0 - 0xCF
|
||||||
VPCONFLICTD Vn{K}{z},Wn|B32 nil [evex m:2 p:1 l:x w:0 0xC4 /r] s:AVX512CD, t:CONFLICT, l:fv, e:E4NF, w:W|R|R
|
VPCONFLICTD Vfv{K}{z},Wfv|B32 nil [evex m:2 p:1 l:x w:0 0xC4 /r] s:AVX512CD, t:CONFLICT, l:fv, e:E4NF, w:W|R|R
|
||||||
VPCONFLICTQ Vn{K}{z},Wn|B64 nil [evex m:2 p:1 l:x w:1 0xC4 /r] s:AVX512CD, t:CONFLICT, l:fv, e:E4NF, w:W|R|R
|
VPCONFLICTQ Vfv{K}{z},Wfv|B64 nil [evex m:2 p:1 l:x w:1 0xC4 /r] s:AVX512CD, t:CONFLICT, l:fv, e:E4NF, w:W|R|R
|
||||||
VGATHERPF0DPS Mvm32n{K} nil [evex m:2 p:1 l:2 w:0 0xC6 /1:mem vsib] s:AVX512PF, t:GATHER, a:MMASK, l:t1s, e:E12NP, w:P|R
|
VGATHERPF0DPS Mvm32n{K} nil [evex m:2 p:1 l:2 w:0 0xC6 /1:mem vsib] s:AVX512PF, t:GATHER, a:MMASK, l:t1s, e:E12NP, w:P|R
|
||||||
VGATHERPF0DPD Mvm32h{K} nil [evex m:2 p:1 l:2 w:1 0xC6 /1:mem vsib] s:AVX512PF, t:GATHER, a:MMASK, l:t1s, e:E12NP, w:P|R
|
VGATHERPF0DPD Mvm32h{K} nil [evex m:2 p:1 l:2 w:1 0xC6 /1:mem vsib] s:AVX512PF, t:GATHER, a:MMASK, l:t1s, e:E12NP, w:P|R
|
||||||
VGATHERPF1DPS Mvm32n{K} nil [evex m:2 p:1 l:2 w:0 0xC6 /2:mem vsib] s:AVX512PF, t:GATHER, a:MMASK, l:t1s, e:E12NP, w:P|R
|
VGATHERPF1DPS Mvm32n{K} nil [evex m:2 p:1 l:2 w:0 0xC6 /2:mem vsib] s:AVX512PF, t:GATHER, a:MMASK, l:t1s, e:E12NP, w:P|R
|
||||||
@ -330,13 +330,13 @@ VRSQRT28PS Voq{K}{z},Woq|B32{sae} nil [evex m:2 p:1 l:2 w:
|
|||||||
VRSQRT28PD Voq{K}{z},Woq|B64{sae} nil [evex m:2 p:1 l:2 w:1 0xCC /r] s:AVX512ER, t:KNL, l:fv, e:E2, w:W|R|R
|
VRSQRT28PD Voq{K}{z},Woq|B64{sae} nil [evex m:2 p:1 l:2 w:1 0xCC /r] s:AVX512ER, t:KNL, l:fv, e:E2, w:W|R|R
|
||||||
VRSQRT28SS Vdq{K}{z},Hdq,Wss{sae} nil [evex m:2 p:1 l:i w:0 0xCD /r] s:AVX512ER, t:KNL, l:t1s, e:E3, w:W|R|R|R
|
VRSQRT28SS Vdq{K}{z},Hdq,Wss{sae} nil [evex m:2 p:1 l:i w:0 0xCD /r] s:AVX512ER, t:KNL, l:t1s, e:E3, w:W|R|R|R
|
||||||
VRSQRT28SD Vdq{K}{z},Hdq,Wsd{sae} nil [evex m:2 p:1 l:i w:1 0xCD /r] s:AVX512ER, t:KNL, l:t1s, e:E3, w:W|R|R|R
|
VRSQRT28SD Vdq{K}{z},Hdq,Wsd{sae} nil [evex m:2 p:1 l:i w:1 0xCD /r] s:AVX512ER, t:KNL, l:t1s, e:E3, w:W|R|R|R
|
||||||
VGF2P8MULB Vn{K}{z},Hn,Wn nil [evex m:2 p:1 l:x w:0 0xCF /r] s:GFNI, t:GFNI, l:fvm, e:E4, w:W|R|R|R
|
VGF2P8MULB Vfv{K}{z},Hfv,Wfv nil [evex m:2 p:1 l:x w:0 0xCF /r] s:GFNI, t:GFNI, l:fvm, e:E4, w:W|R|R|R
|
||||||
|
|
||||||
# 0xD0 - 0xDF
|
# 0xD0 - 0xDF
|
||||||
VAESENC Vn,Hn,Wn nil [evex m:2 p:1 l:x w:i 0xDC /r] s:VAES, t:VAES, l:fvm, e:E4NF, w:W|R|R
|
VAESENC Vfv,Hfv,Wfv nil [evex m:2 p:1 l:x w:i 0xDC /r] s:VAES, t:VAES, l:fvm, e:E4NF, w:W|R|R
|
||||||
VAESENCLAST Vn,Hn,Wn nil [evex m:2 p:1 l:x w:i 0xDD /r] s:VAES, t:VAES, l:fvm, e:E4NF, w:W|R|R
|
VAESENCLAST Vfv,Hfv,Wfv nil [evex m:2 p:1 l:x w:i 0xDD /r] s:VAES, t:VAES, l:fvm, e:E4NF, w:W|R|R
|
||||||
VAESDEC Vn,Hn,Wn nil [evex m:2 p:1 l:x w:i 0xDE /r] s:VAES, t:VAES, l:fvm, e:E4NF, w:W|R|R
|
VAESDEC Vfv,Hfv,Wfv nil [evex m:2 p:1 l:x w:i 0xDE /r] s:VAES, t:VAES, l:fvm, e:E4NF, w:W|R|R
|
||||||
VAESDECLAST Vn,Hn,Wn nil [evex m:2 p:1 l:x w:i 0xDF /r] s:VAES, t:VAES, l:fvm, e:E4NF, w:W|R|R
|
VAESDECLAST Vfv,Hfv,Wfv nil [evex m:2 p:1 l:x w:i 0xDF /r] s:VAES, t:VAES, l:fvm, e:E4NF, w:W|R|R
|
||||||
|
|
||||||
# 0xE0 - 0xEF
|
# 0xE0 - 0xEF
|
||||||
|
|
||||||
|
@ -1,19 +1,19 @@
|
|||||||
# Mnemonic Explicit Operands Implicit Encoding Flags, Prefixes, Set, Category, Class, RW map, Additional ops
|
# Mnemonic Explicit Operands Implicit Encoding Flags, Prefixes, Set, Category, Class, RW map, Additional ops
|
||||||
#------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
|
#------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
|
||||||
# 0x00 - 0x0F
|
# 0x00 - 0x0F
|
||||||
VPERMQ Vu{K}{z},Wu|B64,Ib nil [evex m:3 p:1 l:x w:1 0x00 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:fv, e:E4NF, w:W|R|R|R
|
VPERMQ Vuv{K}{z},Wuv|B64,Ib nil [evex m:3 p:1 l:x w:1 0x00 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VPERMPD Vu{K}{z},Wu|B64,Ib nil [evex m:3 p:1 l:x w:1 0x01 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:fv, e:E4NF, w:W|R|R|R
|
VPERMPD Vuv{K}{z},Wuv|B64,Ib nil [evex m:3 p:1 l:x w:1 0x01 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VALIGND Vn{K}{z},Hn,Wn|B32,Ib nil [evex m:3 p:1 l:x w:0 0x03 /r ib] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R|R
|
VALIGND Vfv{K}{z},Hfv,Wfv|B32,Ib nil [evex m:3 p:1 l:x w:0 0x03 /r ib] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R|R
|
||||||
VALIGNQ Vn{K}{z},Hn,Wn|B64,Ib nil [evex m:3 p:1 l:x w:1 0x03 /r ib] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R|R
|
VALIGNQ Vfv{K}{z},Hfv,Wfv|B64,Ib nil [evex m:3 p:1 l:x w:1 0x03 /r ib] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R|R
|
||||||
VPERMILPS Vn{K}{z},Wn|B32,Ib nil [evex m:3 p:1 l:x w:0 0x04 /r ib] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
VPERMILPS Vfv{K}{z},Wfv|B32,Ib nil [evex m:3 p:1 l:x w:0 0x04 /r ib] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VPERMILPD Vn{K}{z},Wn|B64,Ib nil [evex m:3 p:1 l:x w:1 0x05 /r ib] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
VPERMILPD Vfv{K}{z},Wfv|B64,Ib nil [evex m:3 p:1 l:x w:1 0x05 /r ib] s:AVX512F, t:AVX512, l:fv, e:E4NF, w:W|R|R|R
|
||||||
VRNDSCALEPH Vn{K}{z},Wn|B16{sae},Ib nil [evex m:3 p:0 l:x w:0 0x08 /r ib] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
VRNDSCALEPH Vfv{K}{z},Wfv|B16{sae},Ib nil [evex m:3 p:0 l:x w:0 0x08 /r ib] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
||||||
VRNDSCALEPS Vn{K}{z},Wn|B32{sae},Ib nil [evex m:3 p:1 l:x w:0 0x08 /r ib] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VRNDSCALEPS Vfv{K}{z},Wfv|B32{sae},Ib nil [evex m:3 p:1 l:x w:0 0x08 /r ib] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VRNDSCALEPD Vn{K}{z},Wn|B64{sae},Ib nil [evex m:3 p:1 l:x w:1 0x09 /r ib] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VRNDSCALEPD Vfv{K}{z},Wfv|B64{sae},Ib nil [evex m:3 p:1 l:x w:1 0x09 /r ib] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VRNDSCALESH Vdq{K}{z},Hdq,Wsh{sae},Ib nil [evex m:3 p:0 l:i w:0 0x0A /r ib] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R|R
|
VRNDSCALESH Vdq{K}{z},Hdq,Wsh{sae},Ib nil [evex m:3 p:0 l:i w:0 0x0A /r ib] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R|R
|
||||||
VRNDSCALESS Vdq{K}{z},Hdq,Wss{sae},Ib nil [evex m:3 p:1 l:i w:0 0x0A /r ib] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R|R
|
VRNDSCALESS Vdq{K}{z},Hdq,Wss{sae},Ib nil [evex m:3 p:1 l:i w:0 0x0A /r ib] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R|R
|
||||||
VRNDSCALESD Vdq{K}{z},Hdq,Wsd{sae},Ib nil [evex m:3 p:1 l:i w:1 0x0B /r ib] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R|R
|
VRNDSCALESD Vdq{K}{z},Hdq,Wsd{sae},Ib nil [evex m:3 p:1 l:i w:1 0x0B /r ib] s:AVX512F, t:AVX512, l:t1s, e:E3, w:W|R|R|R|R
|
||||||
VPALIGNR Vn{K}{z},Hn,Wn,Ib nil [evex m:3 p:1 l:x w:i 0x0F /r ib] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R|R
|
VPALIGNR Vfv{K}{z},Hfv,Wfv,Ib nil [evex m:3 p:1 l:x w:i 0x0F /r ib] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R|R
|
||||||
|
|
||||||
# 0x10 - 0x1F
|
# 0x10 - 0x1F
|
||||||
VPEXTRB Mb,Vdq,Ib nil [evex m:3 p:1 l:0 w:i 0x14 /r:mem ib] s:AVX512BW, t:AVX512, l:t1s8, e:E9NF, w:W|R|R
|
VPEXTRB Mb,Vdq,Ib nil [evex m:3 p:1 l:0 w:i 0x14 /r:mem ib] s:AVX512BW, t:AVX512, l:t1s8, e:E9NF, w:W|R|R
|
||||||
@ -26,19 +26,19 @@ VPEXTRQ Mq,Vdq,Ib nil [evex m:3 p:1 l:0 w:
|
|||||||
VPEXTRQ Ry,Vdq,Ib nil [evex m:3 p:1 l:0 w:1 0x16 /r:reg ib] s:AVX512DQ, t:AVX512, l:t1s, e:E9NF, w:W|R|R, a:IWO64
|
VPEXTRQ Ry,Vdq,Ib nil [evex m:3 p:1 l:0 w:1 0x16 /r:reg ib] s:AVX512DQ, t:AVX512, l:t1s, e:E9NF, w:W|R|R, a:IWO64
|
||||||
VEXTRACTPS Md,Vdq,Ib nil [evex m:3 p:1 l:0 w:i 0x17 /r:mem ib] s:AVX512F, t:AVX512, l:t1s, e:E9NF, w:W|R|R
|
VEXTRACTPS Md,Vdq,Ib nil [evex m:3 p:1 l:0 w:i 0x17 /r:mem ib] s:AVX512F, t:AVX512, l:t1s, e:E9NF, w:W|R|R
|
||||||
VEXTRACTPS Ry,Vdq,Ib nil [evex m:3 p:1 l:0 w:i 0x17 /r:reg ib] s:AVX512F, t:AVX512, l:t1s, e:E9NF, w:W|R|R
|
VEXTRACTPS Ry,Vdq,Ib nil [evex m:3 p:1 l:0 w:i 0x17 /r:reg ib] s:AVX512F, t:AVX512, l:t1s, e:E9NF, w:W|R|R
|
||||||
VINSERTF32X4 Vu{K}{z},Hu,Wdq,Ib nil [evex m:3 p:1 l:x w:0 0x18 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:t4, e:E6NF, w:W|R|R|R|R
|
VINSERTF32X4 Vuv{K}{z},Huv,Wdq,Ib nil [evex m:3 p:1 l:x w:0 0x18 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:t4, e:E6NF, w:W|R|R|R|R
|
||||||
VINSERTF64X2 Vu{K}{z},Hu,Wdq,Ib nil [evex m:3 p:1 l:x w:1 0x18 /r ib] s:AVX512DQ, t:AVX512, a:NOL0, l:t2, e:E6NF, w:W|R|R|R|R
|
VINSERTF64X2 Vuv{K}{z},Huv,Wdq,Ib nil [evex m:3 p:1 l:x w:1 0x18 /r ib] s:AVX512DQ, t:AVX512, a:NOL0, l:t2, e:E6NF, w:W|R|R|R|R
|
||||||
VEXTRACTF32X4 Wdq{K}{z},Vu,Ib nil [evex m:3 p:1 l:x w:0 0x19 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:t4, e:E6NF, w:W|R|R|R
|
VEXTRACTF32X4 Wdq{K}{z},Vuv,Ib nil [evex m:3 p:1 l:x w:0 0x19 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:t4, e:E6NF, w:W|R|R|R
|
||||||
VEXTRACTF64X2 Wdq{K}{z},Vu,Ib nil [evex m:3 p:1 l:x w:1 0x19 /r ib] s:AVX512DQ, t:AVX512, a:NOL0, l:t2, e:E6NF, w:W|R|R|R
|
VEXTRACTF64X2 Wdq{K}{z},Vuv,Ib nil [evex m:3 p:1 l:x w:1 0x19 /r ib] s:AVX512DQ, t:AVX512, a:NOL0, l:t2, e:E6NF, w:W|R|R|R
|
||||||
VINSERTF32X8 Voq{K}{z},Hoq,Wqq,Ib nil [evex m:3 p:1 l:2 w:0 0x1A /r ib] s:AVX512DQ, t:AVX512, l:t8, e:E6NF, w:W|R|R|R|R
|
VINSERTF32X8 Voq{K}{z},Hoq,Wqq,Ib nil [evex m:3 p:1 l:2 w:0 0x1A /r ib] s:AVX512DQ, t:AVX512, l:t8, e:E6NF, w:W|R|R|R|R
|
||||||
VINSERTF64X4 Voq{K}{z},Hoq,Wqq,Ib nil [evex m:3 p:1 l:2 w:1 0x1A /r ib] s:AVX512F, t:AVX512, l:t4, e:E6NF, w:W|R|R|R|R
|
VINSERTF64X4 Voq{K}{z},Hoq,Wqq,Ib nil [evex m:3 p:1 l:2 w:1 0x1A /r ib] s:AVX512F, t:AVX512, l:t4, e:E6NF, w:W|R|R|R|R
|
||||||
VEXTRACTF32X8 Wqq{K}{z},Voq,Ib nil [evex m:3 p:1 l:2 w:0 0x1B /r ib] s:AVX512DQ, t:AVX512, l:t8, e:E6NF, w:W|R|R|R
|
VEXTRACTF32X8 Wqq{K}{z},Voq,Ib nil [evex m:3 p:1 l:2 w:0 0x1B /r ib] s:AVX512DQ, t:AVX512, l:t8, e:E6NF, w:W|R|R|R
|
||||||
VEXTRACTF64X4 Wqq{K}{z},Voq,Ib nil [evex m:3 p:1 l:2 w:1 0x1B /r ib] s:AVX512F, t:AVX512, l:t4, e:E6NF, w:W|R|R|R
|
VEXTRACTF64X4 Wqq{K}{z},Voq,Ib nil [evex m:3 p:1 l:2 w:1 0x1B /r ib] s:AVX512F, t:AVX512, l:t4, e:E6NF, w:W|R|R|R
|
||||||
VCVTPS2PH Wh{K}{z},Vn{sae},Ib nil [evex m:3 p:1 l:x w:0 0x1D /r ib] s:AVX512F, t:CONVERT, l:hvm, e:E11, w:W|R|R|R
|
VCVTPS2PH Whv{K}{z},Vfv{sae},Ib nil [evex m:3 p:1 l:x w:0 0x1D /r ib] s:AVX512F, t:CONVERT, l:hvm, e:E11, w:W|R|R|R
|
||||||
VPCMPUD rKq{K},Hn,Wn|B32,Ib nil [evex m:3 p:1 l:x w:0 0x1E /r ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R|R
|
VPCMPUD rKq{K},Hfv,Wfv|B32,Ib nil [evex m:3 p:1 l:x w:0 0x1E /r ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R|R
|
||||||
VPCMPUQ rKq{K},Hn,Wn|B64,Ib nil [evex m:3 p:1 l:x w:1 0x1E /r ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R|R
|
VPCMPUQ rKq{K},Hfv,Wfv|B64,Ib nil [evex m:3 p:1 l:x w:1 0x1E /r ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R|R
|
||||||
VPCMPD rKq{K},Hn,Wn|B32,Ib nil [evex m:3 p:1 l:x w:0 0x1F /r ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R|R
|
VPCMPD rKq{K},Hfv,Wfv|B32,Ib nil [evex m:3 p:1 l:x w:0 0x1F /r ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R|R
|
||||||
VPCMPQ rKq{K},Hn,Wn|B64,Ib nil [evex m:3 p:1 l:x w:1 0x1F /r ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R|R
|
VPCMPQ rKq{K},Hfv,Wfv|B64,Ib nil [evex m:3 p:1 l:x w:1 0x1F /r ib] s:AVX512F, t:AVX512, l:fv, e:E4, w:W|R|R|R|R
|
||||||
|
|
||||||
# 0x20 - 0x2F
|
# 0x20 - 0x2F
|
||||||
VPINSRB Vdq,Hdq,Mb,Ib nil [evex m:3 p:1 l:0 w:i 0x20 /r:mem ib] s:AVX512BW, t:AVX512, l:t1s8, e:E9NF, w:W|R|R|R
|
VPINSRB Vdq,Hdq,Mb,Ib nil [evex m:3 p:1 l:0 w:i 0x20 /r:mem ib] s:AVX512BW, t:AVX512, l:t1s8, e:E9NF, w:W|R|R|R
|
||||||
@ -47,68 +47,68 @@ VINSERTPS Vdq,Hdq,Md,Ib nil [evex m:3 p:1 l:0 w:
|
|||||||
VINSERTPS Vdq,Hdq,Udq,Ib nil [evex m:3 p:1 l:0 w:i 0x21 /r:reg ib] s:AVX512F, t:AVX512, l:t1s, e:E9NF, w:W|R|R|R
|
VINSERTPS Vdq,Hdq,Udq,Ib nil [evex m:3 p:1 l:0 w:i 0x21 /r:reg ib] s:AVX512F, t:AVX512, l:t1s, e:E9NF, w:W|R|R|R
|
||||||
VPINSRD Vdq,Hdq,Ed,Ib nil [evex m:3 p:1 l:0 w:0 0x22 /r ib] s:AVX512DQ, t:AVX512, l:t1s, e:E9NF, w:W|R|R|R, a:IWO64
|
VPINSRD Vdq,Hdq,Ed,Ib nil [evex m:3 p:1 l:0 w:0 0x22 /r ib] s:AVX512DQ, t:AVX512, l:t1s, e:E9NF, w:W|R|R|R, a:IWO64
|
||||||
VPINSRQ Vdq,Hdq,Eq,Ib nil [evex m:3 p:1 l:0 w:1 0x22 /r ib] s:AVX512DQ, t:AVX512, l:t1s, e:E9NF, w:W|R|R|R, a:IWO64
|
VPINSRQ Vdq,Hdq,Eq,Ib nil [evex m:3 p:1 l:0 w:1 0x22 /r ib] s:AVX512DQ, t:AVX512, l:t1s, e:E9NF, w:W|R|R|R, a:IWO64
|
||||||
VSHUFF32X4 Vu{K}{z},Hu,Wu|B32,Ib nil [evex m:3 p:1 l:x w:0 0x23 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:fv, e:E4NF, w:W|R|R|R|R
|
VSHUFF32X4 Vuv{K}{z},Huv,Wuv|B32,Ib nil [evex m:3 p:1 l:x w:0 0x23 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:fv, e:E4NF, w:W|R|R|R|R
|
||||||
VSHUFF64X2 Vu{K}{z},Hu,Wu|B64,Ib nil [evex m:3 p:1 l:x w:1 0x23 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:fv, e:E4NF, w:W|R|R|R|R
|
VSHUFF64X2 Vuv{K}{z},Huv,Wuv|B64,Ib nil [evex m:3 p:1 l:x w:1 0x23 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:fv, e:E4NF, w:W|R|R|R|R
|
||||||
VPTERNLOGD Vn{K}{z},Hn,Wn|B32,Ib nil [evex m:3 p:1 l:x w:0 0x25 /r ib] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:RW|R|R|R|R
|
VPTERNLOGD Vfv{K}{z},Hfv,Wfv|B32,Ib nil [evex m:3 p:1 l:x w:0 0x25 /r ib] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:RW|R|R|R|R
|
||||||
VPTERNLOGQ Vn{K}{z},Hn,Wn|B64,Ib nil [evex m:3 p:1 l:x w:1 0x25 /r ib] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:RW|R|R|R|R
|
VPTERNLOGQ Vfv{K}{z},Hfv,Wfv|B64,Ib nil [evex m:3 p:1 l:x w:1 0x25 /r ib] s:AVX512F, t:LOGICAL, l:fv, e:E4, w:RW|R|R|R|R
|
||||||
VGETMANTPH Vn{K}{z},Wn|B16{sae},Ib nil [evex m:3 p:0 l:x w:0 0x26 /r ib] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
VGETMANTPH Vfv{K}{z},Wfv|B16{sae},Ib nil [evex m:3 p:0 l:x w:0 0x26 /r ib] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
||||||
VGETMANTPS Vn{K}{z},Wn|B32{sae},Ib nil [evex m:3 p:1 l:x w:0 0x26 /r ib] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VGETMANTPS Vfv{K}{z},Wfv|B32{sae},Ib nil [evex m:3 p:1 l:x w:0 0x26 /r ib] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VGETMANTPD Vn{K}{z},Wn|B64{sae},Ib nil [evex m:3 p:1 l:x w:1 0x26 /r ib] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VGETMANTPD Vfv{K}{z},Wfv|B64{sae},Ib nil [evex m:3 p:1 l:x w:1 0x26 /r ib] s:AVX512F, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VGETMANTSH Vdq{K}{z},Hdq,Wsh{sae},Ib nil [evex m:3 p:0 l:i w:0 0x27 /r ib] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R|R
|
VGETMANTSH Vdq{K}{z},Hdq,Wsh{sae},Ib nil [evex m:3 p:0 l:i w:0 0x27 /r ib] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R|R
|
||||||
VGETMANTSS Vdq{K}{z},Hdq,Wss{sae},Ib nil [evex m:3 p:1 l:i w:0 0x27 /r ib] s:AVX512F, t:AVX512, l:t1s, e:E2, w:W|R|R|R|R
|
VGETMANTSS Vdq{K}{z},Hdq,Wss{sae},Ib nil [evex m:3 p:1 l:i w:0 0x27 /r ib] s:AVX512F, t:AVX512, l:t1s, e:E2, w:W|R|R|R|R
|
||||||
VGETMANTSD Vdq{K}{z},Hdq,Wsd{sae},Ib nil [evex m:3 p:1 l:i w:1 0x27 /r ib] s:AVX512F, t:AVX512, l:t1s, e:E2, w:W|R|R|R|R
|
VGETMANTSD Vdq{K}{z},Hdq,Wsd{sae},Ib nil [evex m:3 p:1 l:i w:1 0x27 /r ib] s:AVX512F, t:AVX512, l:t1s, e:E2, w:W|R|R|R|R
|
||||||
|
|
||||||
# 0x30 - 0x3F
|
# 0x30 - 0x3F
|
||||||
VINSERTI32X4 Vu{K}{z},Hu,Wdq,Ib nil [evex m:3 p:1 l:x w:0 0x38 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:t4, e:E6NF, w:W|R|R|R|R
|
VINSERTI32X4 Vuv{K}{z},Huv,Wdq,Ib nil [evex m:3 p:1 l:x w:0 0x38 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:t4, e:E6NF, w:W|R|R|R|R
|
||||||
VINSERTI64X2 Vu{K}{z},Hu,Wdq,Ib nil [evex m:3 p:1 l:x w:1 0x38 /r ib] s:AVX512DQ, t:AVX512, a:NOL0, l:t2, e:E6NF, w:W|R|R|R|R
|
VINSERTI64X2 Vuv{K}{z},Huv,Wdq,Ib nil [evex m:3 p:1 l:x w:1 0x38 /r ib] s:AVX512DQ, t:AVX512, a:NOL0, l:t2, e:E6NF, w:W|R|R|R|R
|
||||||
VEXTRACTI32X4 Wdq{K}{z},Vu,Ib nil [evex m:3 p:1 l:x w:0 0x39 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:t4, e:E6NF, w:W|R|R|R
|
VEXTRACTI32X4 Wdq{K}{z},Vuv,Ib nil [evex m:3 p:1 l:x w:0 0x39 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:t4, e:E6NF, w:W|R|R|R
|
||||||
VEXTRACTI64X2 Wdq{K}{z},Vu,Ib nil [evex m:3 p:1 l:x w:1 0x39 /r ib] s:AVX512DQ, t:AVX512, a:NOL0, l:t2, e:E6NF, w:W|R|R|R
|
VEXTRACTI64X2 Wdq{K}{z},Vuv,Ib nil [evex m:3 p:1 l:x w:1 0x39 /r ib] s:AVX512DQ, t:AVX512, a:NOL0, l:t2, e:E6NF, w:W|R|R|R
|
||||||
VINSERTI32X8 Voq{K}{z},Hoq,Wqq,Ib nil [evex m:3 p:1 l:2 w:0 0x3A /r ib] s:AVX512DQ, t:AVX512, l:t8, e:E6NF, w:W|R|R|R|R
|
VINSERTI32X8 Voq{K}{z},Hoq,Wqq,Ib nil [evex m:3 p:1 l:2 w:0 0x3A /r ib] s:AVX512DQ, t:AVX512, l:t8, e:E6NF, w:W|R|R|R|R
|
||||||
VINSERTI64X4 Voq{K}{z},Hoq,Wqq,Ib nil [evex m:3 p:1 l:2 w:1 0x3A /r ib] s:AVX512F, t:AVX512, l:t4, e:E6NF, w:W|R|R|R|R
|
VINSERTI64X4 Voq{K}{z},Hoq,Wqq,Ib nil [evex m:3 p:1 l:2 w:1 0x3A /r ib] s:AVX512F, t:AVX512, l:t4, e:E6NF, w:W|R|R|R|R
|
||||||
VEXTRACTI32X8 Wqq{K}{z},Voq,Ib nil [evex m:3 p:1 l:2 w:0 0x3B /r ib] s:AVX512DQ, t:AVX512, l:t8, e:E6NF, w:W|R|R|R
|
VEXTRACTI32X8 Wqq{K}{z},Voq,Ib nil [evex m:3 p:1 l:2 w:0 0x3B /r ib] s:AVX512DQ, t:AVX512, l:t8, e:E6NF, w:W|R|R|R
|
||||||
VEXTRACTI64X4 Wqq{K}{z},Voq,Ib nil [evex m:3 p:1 l:2 w:1 0x3B /r ib] s:AVX512F, t:AVX512, l:t4, e:E6NF, w:W|R|R|R
|
VEXTRACTI64X4 Wqq{K}{z},Voq,Ib nil [evex m:3 p:1 l:2 w:1 0x3B /r ib] s:AVX512F, t:AVX512, l:t4, e:E6NF, w:W|R|R|R
|
||||||
VPCMPUB rKq{K},Hn,Wn,Ib nil [evex m:3 p:1 l:x w:0 0x3E /r ib] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R|R
|
VPCMPUB rKq{K},Hfv,Wfv,Ib nil [evex m:3 p:1 l:x w:0 0x3E /r ib] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R|R
|
||||||
VPCMPUW rKq{K},Hn,Wn,Ib nil [evex m:3 p:1 l:x w:1 0x3E /r ib] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R|R
|
VPCMPUW rKq{K},Hfv,Wfv,Ib nil [evex m:3 p:1 l:x w:1 0x3E /r ib] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R|R
|
||||||
VPCMPB rKq{K},Hn,Wn,Ib nil [evex m:3 p:1 l:x w:0 0x3F /r ib] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R|R
|
VPCMPB rKq{K},Hfv,Wfv,Ib nil [evex m:3 p:1 l:x w:0 0x3F /r ib] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R|R
|
||||||
VPCMPW rKq{K},Hn,Wn,Ib nil [evex m:3 p:1 l:x w:1 0x3F /r ib] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R|R
|
VPCMPW rKq{K},Hfv,Wfv,Ib nil [evex m:3 p:1 l:x w:1 0x3F /r ib] s:AVX512BW, t:AVX512, l:fvm, e:E4nb, w:W|R|R|R|R
|
||||||
|
|
||||||
# 0x40 - 0x4F
|
# 0x40 - 0x4F
|
||||||
VDBPSADBW Vn{K}{z},Hn,Wn,Ib nil [evex m:3 p:1 l:x w:0 0x42 /r ib] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R|R
|
VDBPSADBW Vfv{K}{z},Hfv,Wfv,Ib nil [evex m:3 p:1 l:x w:0 0x42 /r ib] s:AVX512BW, t:AVX512, l:fvm, e:E4NFnb, w:W|R|R|R|R
|
||||||
VSHUFI32X4 Vu{K}{z},Hu,Wu|B32,Ib nil [evex m:3 p:1 l:x w:0 0x43 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:fv, e:E4NF, w:W|R|R|R|R
|
VSHUFI32X4 Vuv{K}{z},Huv,Wuv|B32,Ib nil [evex m:3 p:1 l:x w:0 0x43 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:fv, e:E4NF, w:W|R|R|R|R
|
||||||
VSHUFI64X2 Vu{K}{z},Hu,Wu|B64,Ib nil [evex m:3 p:1 l:x w:1 0x43 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:fv, e:E4NF, w:W|R|R|R|R
|
VSHUFI64X2 Vuv{K}{z},Huv,Wuv|B64,Ib nil [evex m:3 p:1 l:x w:1 0x43 /r ib] s:AVX512F, t:AVX512, a:NOL0, l:fv, e:E4NF, w:W|R|R|R|R
|
||||||
VPCLMULQDQ Vn,Hn,Wn,Ib nil [evex m:3 p:1 l:x w:i 0x44 /r ib] s:VPCLMULQDQ, t:VPCLMULQDQ, l:fvm, e:E4NF, w:W|R|R|R
|
VPCLMULQDQ Vfv,Hfv,Wfv,Ib nil [evex m:3 p:1 l:x w:i 0x44 /r ib] s:VPCLMULQDQ, t:VPCLMULQDQ, l:fvm, e:E4NF, w:W|R|R|R
|
||||||
|
|
||||||
# 0x50 - 0x5F
|
# 0x50 - 0x5F
|
||||||
VRANGEPS Vn{K}{z},Hn,Wn|B32{sae},Ib nil [evex m:3 p:1 l:x w:0 0x50 /r ib] s:AVX512DQ, t:AVX512, l:fv, e:E2, w:W|R|R|R|R
|
VRANGEPS Vfv{K}{z},Hfv,Wfv|B32{sae},Ib nil [evex m:3 p:1 l:x w:0 0x50 /r ib] s:AVX512DQ, t:AVX512, l:fv, e:E2, w:W|R|R|R|R
|
||||||
VRANGEPD Vn{K}{z},Hn,Wn|B64{sae},Ib nil [evex m:3 p:1 l:x w:1 0x50 /r ib] s:AVX512DQ, t:AVX512, l:fv, e:E2, w:W|R|R|R|R
|
VRANGEPD Vfv{K}{z},Hfv,Wfv|B64{sae},Ib nil [evex m:3 p:1 l:x w:1 0x50 /r ib] s:AVX512DQ, t:AVX512, l:fv, e:E2, w:W|R|R|R|R
|
||||||
VRANGESS Vdq{K}{z},Hdq,Wss{sae},Ib nil [evex m:3 p:1 l:i w:0 0x51 /r ib] s:AVX512DQ, t:AVX512, l:t1s, e:E3, w:W|R|R|R|R
|
VRANGESS Vdq{K}{z},Hdq,Wss{sae},Ib nil [evex m:3 p:1 l:i w:0 0x51 /r ib] s:AVX512DQ, t:AVX512, l:t1s, e:E3, w:W|R|R|R|R
|
||||||
VRANGESD Vdq{K}{z},Hdq,Wsd{sae},Ib nil [evex m:3 p:1 l:i w:1 0x51 /r ib] s:AVX512DQ, t:AVX512, l:t1s, e:E3, w:W|R|R|R|R
|
VRANGESD Vdq{K}{z},Hdq,Wsd{sae},Ib nil [evex m:3 p:1 l:i w:1 0x51 /r ib] s:AVX512DQ, t:AVX512, l:t1s, e:E3, w:W|R|R|R|R
|
||||||
VFIXUPIMMPS Vn{K}{z},Hn,Wn|B32{sae},Ib nil [evex m:3 p:1 l:x w:0 0x54 /r ib] s:AVX512F, t:AVX512, l:fv, e:E2, w:RW|R|R|R|R
|
VFIXUPIMMPS Vfv{K}{z},Hfv,Wfv|B32{sae},Ib nil [evex m:3 p:1 l:x w:0 0x54 /r ib] s:AVX512F, t:AVX512, l:fv, e:E2, w:RW|R|R|R|R
|
||||||
VFIXUPIMMPD Vn{K}{z},Hn,Wn|B64{sae},Ib nil [evex m:3 p:1 l:x w:1 0x54 /r ib] s:AVX512F, t:AVX512, l:fv, e:E2, w:RW|R|R|R|R
|
VFIXUPIMMPD Vfv{K}{z},Hfv,Wfv|B64{sae},Ib nil [evex m:3 p:1 l:x w:1 0x54 /r ib] s:AVX512F, t:AVX512, l:fv, e:E2, w:RW|R|R|R|R
|
||||||
VFIXUPIMMSS Vdq{K}{z},Hdq,Wss{sae},Ib nil [evex m:3 p:1 l:i w:0 0x55 /r ib] s:AVX512F, t:AVX512, l:t1s, e:E3, w:RW|R|R|R|R
|
VFIXUPIMMSS Vdq{K}{z},Hdq,Wss{sae},Ib nil [evex m:3 p:1 l:i w:0 0x55 /r ib] s:AVX512F, t:AVX512, l:t1s, e:E3, w:RW|R|R|R|R
|
||||||
VFIXUPIMMSD Vdq{K}{z},Hdq,Wsd{sae},Ib nil [evex m:3 p:1 l:i w:1 0x55 /r ib] s:AVX512F, t:AVX512, l:t1s, e:E3, w:RW|R|R|R|R
|
VFIXUPIMMSD Vdq{K}{z},Hdq,Wsd{sae},Ib nil [evex m:3 p:1 l:i w:1 0x55 /r ib] s:AVX512F, t:AVX512, l:t1s, e:E3, w:RW|R|R|R|R
|
||||||
VREDUCEPH Vn{K}{z},Wn|B16{sae},Ib nil [evex m:3 p:0 l:x w:0 0x56 /r ib] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
VREDUCEPH Vfv{K}{z},Wfv|B16{sae},Ib nil [evex m:3 p:0 l:x w:0 0x56 /r ib] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
||||||
VREDUCEPS Vn{K}{z},Wn|B32{sae},Ib nil [evex m:3 p:1 l:x w:0 0x56 /r ib] s:AVX512DQ, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VREDUCEPS Vfv{K}{z},Wfv|B32{sae},Ib nil [evex m:3 p:1 l:x w:0 0x56 /r ib] s:AVX512DQ, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VREDUCEPD Vn{K}{z},Wn|B64{sae},Ib nil [evex m:3 p:1 l:x w:1 0x56 /r ib] s:AVX512DQ, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
VREDUCEPD Vfv{K}{z},Wfv|B64{sae},Ib nil [evex m:3 p:1 l:x w:1 0x56 /r ib] s:AVX512DQ, t:AVX512, l:fv, e:E2, w:W|R|R|R
|
||||||
VREDUCESH Vdq{K}{z},Hdq,Wsh{sae},Ib nil [evex m:3 p:0 l:i w:0 0x57 /r ib] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R|R
|
VREDUCESH Vdq{K}{z},Hdq,Wsh{sae},Ib nil [evex m:3 p:0 l:i w:0 0x57 /r ib] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R|R
|
||||||
VREDUCESS Vdq{K}{z},Hdq,Wss{sae},Ib nil [evex m:3 p:1 l:i w:0 0x57 /r ib] s:AVX512DQ, t:AVX512, l:t1s, e:E3, w:W|R|R|R|R
|
VREDUCESS Vdq{K}{z},Hdq,Wss{sae},Ib nil [evex m:3 p:1 l:i w:0 0x57 /r ib] s:AVX512DQ, t:AVX512, l:t1s, e:E3, w:W|R|R|R|R
|
||||||
VREDUCESD Vdq{K}{z},Hdq,Wsd{sae},Ib nil [evex m:3 p:1 l:i w:1 0x57 /r ib] s:AVX512DQ, t:AVX512, l:t1s, e:E3, w:W|R|R|R|R
|
VREDUCESD Vdq{K}{z},Hdq,Wsd{sae},Ib nil [evex m:3 p:1 l:i w:1 0x57 /r ib] s:AVX512DQ, t:AVX512, l:t1s, e:E3, w:W|R|R|R|R
|
||||||
|
|
||||||
# 0x60 - 0x6F
|
# 0x60 - 0x6F
|
||||||
VFPCLASSPH rKq{K},Wn|B16,Ib nil [evex m:3 p:0 l:x w:0 0x66 /r ib] s:AVX512FP16, t:AVX512FP16, l:fv, e:E4, w:W|R|R|R
|
VFPCLASSPH rKq{K},Wfv|B16,Ib nil [evex m:3 p:0 l:x w:0 0x66 /r ib] s:AVX512FP16, t:AVX512FP16, l:fv, e:E4, w:W|R|R|R
|
||||||
VFPCLASSPS rKq{K},Wn|B32,Ib nil [evex m:3 p:1 l:x w:0 0x66 /r ib] s:AVX512DQ, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VFPCLASSPS rKq{K},Wfv|B32,Ib nil [evex m:3 p:1 l:x w:0 0x66 /r ib] s:AVX512DQ, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VFPCLASSPD rKq{K},Wn|B64,Ib nil [evex m:3 p:1 l:x w:1 0x66 /r ib] s:AVX512DQ, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
VFPCLASSPD rKq{K},Wfv|B64,Ib nil [evex m:3 p:1 l:x w:1 0x66 /r ib] s:AVX512DQ, t:AVX512, l:fv, e:E4, w:W|R|R|R
|
||||||
VFPCLASSSH rKq{K},Wsh,Ib nil [evex m:3 p:0 l:i w:0 0x67 /r ib] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E10, w:W|R|R|R
|
VFPCLASSSH rKq{K},Wsh,Ib nil [evex m:3 p:0 l:i w:0 0x67 /r ib] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E10, w:W|R|R|R
|
||||||
VFPCLASSSS rKq{K},Wss,Ib nil [evex m:3 p:1 l:i w:0 0x67 /r ib] s:AVX512DQ, t:AVX512, l:t1s, e:E6, w:W|R|R|R
|
VFPCLASSSS rKq{K},Wss,Ib nil [evex m:3 p:1 l:i w:0 0x67 /r ib] s:AVX512DQ, t:AVX512, l:t1s, e:E6, w:W|R|R|R
|
||||||
VFPCLASSSD rKq{K},Wsd,Ib nil [evex m:3 p:1 l:i w:1 0x67 /r ib] s:AVX512DQ, t:AVX512, l:t1s, e:E6, w:W|R|R|R
|
VFPCLASSSD rKq{K},Wsd,Ib nil [evex m:3 p:1 l:i w:1 0x67 /r ib] s:AVX512DQ, t:AVX512, l:t1s, e:E6, w:W|R|R|R
|
||||||
|
|
||||||
# 0x70 - 0x7F
|
# 0x70 - 0x7F
|
||||||
VPSHLDW Vn{K}{z},Hn,Wn,Ib nil [evex m:3 p:1 l:x w:1 0x70 /r ib] s:AVX512VBMI2, t:AVX512VBMI, l:fvm, e:E4, w:RW|R|R|R|R
|
VPSHLDW Vfv{K}{z},Hfv,Wfv,Ib nil [evex m:3 p:1 l:x w:1 0x70 /r ib] s:AVX512VBMI2, t:AVX512VBMI, l:fvm, e:E4, w:RW|R|R|R|R
|
||||||
VPSHLDD Vn{K}{z},Hn,Wn|B32,Ib nil [evex m:3 p:1 l:x w:0 0x71 /r ib] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R|R
|
VPSHLDD Vfv{K}{z},Hfv,Wfv|B32,Ib nil [evex m:3 p:1 l:x w:0 0x71 /r ib] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R|R
|
||||||
VPSHLDQ Vn{K}{z},Hn,Wn|B64,Ib nil [evex m:3 p:1 l:x w:1 0x71 /r ib] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R|R
|
VPSHLDQ Vfv{K}{z},Hfv,Wfv|B64,Ib nil [evex m:3 p:1 l:x w:1 0x71 /r ib] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R|R
|
||||||
VPSHRDW Vn{K}{z},Hn,Wn,Ib nil [evex m:3 p:1 l:x w:1 0x72 /r ib] s:AVX512VBMI2, t:AVX512VBMI, l:fvm, e:E4, w:RW|R|R|R|R
|
VPSHRDW Vfv{K}{z},Hfv,Wfv,Ib nil [evex m:3 p:1 l:x w:1 0x72 /r ib] s:AVX512VBMI2, t:AVX512VBMI, l:fvm, e:E4, w:RW|R|R|R|R
|
||||||
VPSHRDD Vn{K}{z},Hn,Wn|B32,Ib nil [evex m:3 p:1 l:x w:0 0x73 /r ib] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R|R
|
VPSHRDD Vfv{K}{z},Hfv,Wfv|B32,Ib nil [evex m:3 p:1 l:x w:0 0x73 /r ib] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R|R
|
||||||
VPSHRDQ Vn{K}{z},Hn,Wn|B64,Ib nil [evex m:3 p:1 l:x w:1 0x73 /r ib] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R|R
|
VPSHRDQ Vfv{K}{z},Hfv,Wfv|B64,Ib nil [evex m:3 p:1 l:x w:1 0x73 /r ib] s:AVX512VBMI2, t:AVX512VBMI, l:fv, e:E4, w:RW|R|R|R|R
|
||||||
|
|
||||||
# 0x80 - 0x8F
|
# 0x80 - 0x8F
|
||||||
|
|
||||||
@ -119,11 +119,11 @@ VPSHRDQ Vn{K}{z},Hn,Wn|B64,Ib nil [evex m:3 p:1 l:x w:
|
|||||||
# 0xB0 - 0xBF
|
# 0xB0 - 0xBF
|
||||||
|
|
||||||
# 0xC0 - 0xCF
|
# 0xC0 - 0xCF
|
||||||
VCMPPH rK{K},Hn,Wn|B16{sae},Ib nil [evex m:3 p:0 l:x w:0 0xC2 /r ib] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R|R
|
VCMPPH rK{K},Hfv,Wfv|B16{sae},Ib nil [evex m:3 p:0 l:x w:0 0xC2 /r ib] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R|R
|
||||||
VCMPSH rK{K},Hn,Wsh{sae},Ib nil [evex m:3 p:2 l:i w:0 0xC2 /r ib] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R|R
|
VCMPSH rK{K},Hfv,Wsh{sae},Ib nil [evex m:3 p:2 l:i w:0 0xC2 /r ib] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R|R
|
||||||
|
|
||||||
VGF2P8AFFINEQB Vn{K}{z},Hn,Wn|B64,Ib nil [evex m:3 p:1 l:x w:1 0xCE /r ib] s:GFNI, t:GFNI, l:fv, e:E4NF, w:W|R|R|R|R
|
VGF2P8AFFINEQB Vfv{K}{z},Hfv,Wfv|B64,Ib nil [evex m:3 p:1 l:x w:1 0xCE /r ib] s:GFNI, t:GFNI, l:fv, e:E4NF, w:W|R|R|R|R
|
||||||
VGF2P8AFFINEINVQB Vn{K}{z},Hn,Wn|B64,Ib nil [evex m:3 p:1 l:x w:1 0xCF /r ib] s:GFNI, t:GFNI, l:fv, e:E4NF, w:W|R|R|R|R
|
VGF2P8AFFINEINVQB Vfv{K}{z},Hfv,Wfv|B64,Ib nil [evex m:3 p:1 l:x w:1 0xCF /r ib] s:GFNI, t:GFNI, l:fv, e:E4NF, w:W|R|R|R|R
|
||||||
|
|
||||||
# 0xD0 - 0xDF
|
# 0xD0 - 0xDF
|
||||||
|
|
||||||
|
@ -5,7 +5,7 @@ VMOVSH Vdq{K}{z},Wsh nil [evex m:5 p:2 l:i w:
|
|||||||
VMOVSH Vdq{K}{z},Hdq,Wsh nil [evex m:5 p:2 l:i w:0 0x10 /r:reg] s:AVX512FP16, t:AVX512FP16, e:E5, w:W|R|R|R
|
VMOVSH Vdq{K}{z},Hdq,Wsh nil [evex m:5 p:2 l:i w:0 0x10 /r:reg] s:AVX512FP16, t:AVX512FP16, e:E5, w:W|R|R|R
|
||||||
VMOVSH Wsh{K},Vdq nil [evex m:5 p:2 l:i w:0 0x11 /r:mem] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E5, w:W|R|R
|
VMOVSH Wsh{K},Vdq nil [evex m:5 p:2 l:i w:0 0x11 /r:mem] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E5, w:W|R|R
|
||||||
VMOVSH Wsh{K}{z},Hdq,Vdq nil [evex m:5 p:2 l:i w:0 0x11 /r:reg] s:AVX512FP16, t:AVX512FP16, e:E5, w:W|R|R|R
|
VMOVSH Wsh{K}{z},Hdq,Vdq nil [evex m:5 p:2 l:i w:0 0x11 /r:reg] s:AVX512FP16, t:AVX512FP16, e:E5, w:W|R|R|R
|
||||||
VCVTPS2PHX Vh{K}{z},Wn|B32{er} nil [evex m:5 p:1 l:x w:0 0x1D /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
VCVTPS2PHX Vhv{K}{z},Wfv|B32{er} nil [evex m:5 p:1 l:x w:0 0x1D /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
||||||
VCVTSS2SH Vdq{K}{z},Hdq,Wss{er} nil [evex m:5 p:0 l:i w:0 0x1D /r] s:AVX512FP16, t:AVX512FP16, l:t1s, e:E3, w:W|R|R|R
|
VCVTSS2SH Vdq{K}{z},Hdq,Wss{er} nil [evex m:5 p:0 l:i w:0 0x1D /r] s:AVX512FP16, t:AVX512FP16, l:t1s, e:E3, w:W|R|R|R
|
||||||
|
|
||||||
# 0x20 - 0x2F
|
# 0x20 - 0x2F
|
||||||
@ -16,27 +16,27 @@ VUCOMISH Vdq,Wsh{sae} Fv [evex m:5 p:0 l:i w:
|
|||||||
VCOMISH Vdq,Wsh{sae} Fv [evex m:5 p:0 l:i w:0 0x2F /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3NF, w:R|R|W, f:ZF=m|PF=m|CF=m|OF=0|SF=0|AF=0
|
VCOMISH Vdq,Wsh{sae} Fv [evex m:5 p:0 l:i w:0 0x2F /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3NF, w:R|R|W, f:ZF=m|PF=m|CF=m|OF=0|SF=0|AF=0
|
||||||
|
|
||||||
# 0x50 - 0x5F
|
# 0x50 - 0x5F
|
||||||
VSQRTPH Vn{K}{z},Wn|B16{er} nil [evex m:5 p:0 l:x w:0 0x51 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
VSQRTPH Vfv{K}{z},Wfv|B16{er} nil [evex m:5 p:0 l:x w:0 0x51 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
||||||
VSQRTSH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:5 p:2 l:i w:0 0x51 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
VSQRTSH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:5 p:2 l:i w:0 0x51 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
||||||
VADDPH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:5 p:0 l:x w:0 0x58 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
VADDPH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:5 p:0 l:x w:0 0x58 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
||||||
VADDSH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:5 p:2 l:i w:0 0x58 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
VADDSH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:5 p:2 l:i w:0 0x58 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
||||||
VMULPH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:5 p:0 l:x w:0 0x59 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
VMULPH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:5 p:0 l:x w:0 0x59 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
||||||
VMULSH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:5 p:2 l:i w:0 0x59 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
VMULSH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:5 p:2 l:i w:0 0x59 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
||||||
VCVTPH2PD Vn{K}{z},Wf|B16{sae} nil [evex m:5 p:0 l:x w:0 0x5A /r] s:AVX512FP16, t:AVX512FP16, l:qv, e:E2, w:W|R|R
|
VCVTPH2PD Vfv{K}{z},Wqv|B16{sae} nil [evex m:5 p:0 l:x w:0 0x5A /r] s:AVX512FP16, t:AVX512FP16, l:qv, e:E2, w:W|R|R
|
||||||
VCVTPD2PH Vdq{K}{z},Wn|B64{er} nil [evex m:5 p:1 l:x w:1 0x5A /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
VCVTPD2PH Vdq{K}{z},Wfv|B64{er} nil [evex m:5 p:1 l:x w:1 0x5A /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
||||||
VCVTSH2SD Vdq{K}{z},Hdq,Wsh{sae} nil [evex m:5 p:2 l:i w:0 0x5A /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
VCVTSH2SD Vdq{K}{z},Hdq,Wsh{sae} nil [evex m:5 p:2 l:i w:0 0x5A /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
||||||
VCVTSD2SH Vdq{K}{z},Hdq,Wsd{er} nil [evex m:5 p:3 l:i w:1 0x5A /r] s:AVX512FP16, t:AVX512FP16, l:t1s, e:E3, w:W|R|R|R
|
VCVTSD2SH Vdq{K}{z},Hdq,Wsd{er} nil [evex m:5 p:3 l:i w:1 0x5A /r] s:AVX512FP16, t:AVX512FP16, l:t1s, e:E3, w:W|R|R|R
|
||||||
VCVTDQ2PH Vh{K}{z},Wn|B32{er} nil [evex m:5 p:0 l:x w:0 0x5B /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
VCVTDQ2PH Vhv{K}{z},Wfv|B32{er} nil [evex m:5 p:0 l:x w:0 0x5B /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
||||||
VCVTQQ2PH Vdq{K}{z},Wn|B64{er} nil [evex m:5 p:0 l:x w:1 0x5B /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
VCVTQQ2PH Vdq{K}{z},Wfv|B64{er} nil [evex m:5 p:0 l:x w:1 0x5B /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
||||||
VCVTPH2DQ Vn{K}{z},Wh|B16{er} nil [evex m:5 p:1 l:x w:0 0x5B /r] s:AVX512FP16, t:AVX512FP16, l:hv, e:E2, w:W|R|R
|
VCVTPH2DQ Vfv{K}{z},Whv|B16{er} nil [evex m:5 p:1 l:x w:0 0x5B /r] s:AVX512FP16, t:AVX512FP16, l:hv, e:E2, w:W|R|R
|
||||||
VCVTTPH2DQ Vn{K}{z},Wh|B16{sae} nil [evex m:5 p:2 l:x w:0 0x5B /r] s:AVX512FP16, t:AVX512FP16, l:hv, e:E2, w:W|R|R
|
VCVTTPH2DQ Vfv{K}{z},Whv|B16{sae} nil [evex m:5 p:2 l:x w:0 0x5B /r] s:AVX512FP16, t:AVX512FP16, l:hv, e:E2, w:W|R|R
|
||||||
VSUBPH Vn{K}{z},Hn,Wn|B16{sae} nil [evex m:5 p:0 l:x w:0 0x5C /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
VSUBPH Vfv{K}{z},Hfv,Wfv|B16{sae} nil [evex m:5 p:0 l:x w:0 0x5C /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
||||||
VSUBSH Vdq{K}{z},Hdq,Wsh{sae} nil [evex m:5 p:2 l:i w:0 0x5C /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
VSUBSH Vdq{K}{z},Hdq,Wsh{sae} nil [evex m:5 p:2 l:i w:0 0x5C /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
||||||
VMINPH Vn{K}{z},Hn,Wn|B16{sae} nil [evex m:5 p:0 l:x w:0 0x5D /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
VMINPH Vfv{K}{z},Hfv,Wfv|B16{sae} nil [evex m:5 p:0 l:x w:0 0x5D /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
||||||
VMINSH Vdq{K}{z},Hdq,Wsh{sae} nil [evex m:5 p:2 l:i w:0 0x5D /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
VMINSH Vdq{K}{z},Hdq,Wsh{sae} nil [evex m:5 p:2 l:i w:0 0x5D /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
||||||
VDIVPH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:5 p:0 l:x w:0 0x5E /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
VDIVPH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:5 p:0 l:x w:0 0x5E /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
||||||
VDIVSH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:5 p:2 l:i w:0 0x5E /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
VDIVSH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:5 p:2 l:i w:0 0x5E /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
||||||
VMAXPH Vn{K}{z},Hn,Wn|B16{sae} nil [evex m:5 p:0 l:x w:0 0x5F /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
VMAXPH Vfv{K}{z},Hfv,Wfv|B16{sae} nil [evex m:5 p:0 l:x w:0 0x5F /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
||||||
VMAXSH Vdq{K}{z},Hdq,Wsh{sae} nil [evex m:5 p:2 l:i w:0 0x5F /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
VMAXSH Vdq{K}{z},Hdq,Wsh{sae} nil [evex m:5 p:2 l:i w:0 0x5F /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
||||||
|
|
||||||
# 0x60 - 0x6F
|
# 0x60 - 0x6F
|
||||||
@ -44,22 +44,22 @@ VMOVW Vdq,Mw nil [evex m:5 p:1 l:0 w:
|
|||||||
VMOVW Vdq,Rd nil [evex m:5 p:1 l:0 w:i 0x6E /r:reg] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E9NF, w:W|R
|
VMOVW Vdq,Rd nil [evex m:5 p:1 l:0 w:i 0x6E /r:reg] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E9NF, w:W|R
|
||||||
|
|
||||||
# 0x70 - 0x7F
|
# 0x70 - 0x7F
|
||||||
VCVTTPH2UDQ Vn{K}{z},Wh|B16{sae} nil [evex m:5 p:0 l:x w:0 0x78 /r] s:AVX512FP16, t:AVX512FP16, l:hv, e:E2, w:W|R|R
|
VCVTTPH2UDQ Vfv{K}{z},Whv|B16{sae} nil [evex m:5 p:0 l:x w:0 0x78 /r] s:AVX512FP16, t:AVX512FP16, l:hv, e:E2, w:W|R|R
|
||||||
VCVTTPH2UQQ Vn{K}{z},Wf|B16{sae} nil [evex m:5 p:1 l:x w:0 0x78 /r] s:AVX512FP16, t:AVX512FP16, l:qv, e:E2, w:W|R|R
|
VCVTTPH2UQQ Vfv{K}{z},Wqv|B16{sae} nil [evex m:5 p:1 l:x w:0 0x78 /r] s:AVX512FP16, t:AVX512FP16, l:qv, e:E2, w:W|R|R
|
||||||
VCVTTSH2USI Gy,Wsh{sae} nil [evex m:5 p:2 l:i w:0 0x78 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3NF, w:W|R, a:IWO64
|
VCVTTSH2USI Gy,Wsh{sae} nil [evex m:5 p:2 l:i w:0 0x78 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3NF, w:W|R, a:IWO64
|
||||||
VCVTPH2UDQ Vn{K}{z},Wh|B16{er} nil [evex m:5 p:0 l:x w:0 0x79 /r] s:AVX512FP16, t:AVX512FP16, l:hv, e:E2, w:W|R|R
|
VCVTPH2UDQ Vfv{K}{z},Whv|B16{er} nil [evex m:5 p:0 l:x w:0 0x79 /r] s:AVX512FP16, t:AVX512FP16, l:hv, e:E2, w:W|R|R
|
||||||
VCVTPH2UQQ Vn{K}{z},Wf|B16{er} nil [evex m:5 p:1 l:x w:0 0x79 /r] s:AVX512FP16, t:AVX512FP16, l:qv, e:E2, w:W|R|R
|
VCVTPH2UQQ Vfv{K}{z},Wqv|B16{er} nil [evex m:5 p:1 l:x w:0 0x79 /r] s:AVX512FP16, t:AVX512FP16, l:qv, e:E2, w:W|R|R
|
||||||
VCVTSH2USI Gy,Wsh{er} nil [evex m:5 p:2 l:i w:x 0x79 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3NF, w:W|R, a:IWO64
|
VCVTSH2USI Gy,Wsh{er} nil [evex m:5 p:2 l:i w:x 0x79 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3NF, w:W|R, a:IWO64
|
||||||
VCVTUDQ2PH Vh{K}{z},Wn|B32{er} nil [evex m:5 p:3 l:x w:0 0x7A /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
VCVTUDQ2PH Vhv{K}{z},Wfv|B32{er} nil [evex m:5 p:3 l:x w:0 0x7A /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
||||||
VCVTUQQ2PH Vf{K}{z},Wn|B64{er} nil [evex m:5 p:3 l:x w:1 0x7A /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
VCVTUQQ2PH Vqv{K}{z},Wfv|B64{er} nil [evex m:5 p:3 l:x w:1 0x7A /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
||||||
VCVTTPH2QQ Vn{K}{z},Wf|B16{sae} nil [evex m:5 p:1 l:x w:0 0x7A /r] s:AVX512FP16, t:AVX512FP16, l:qv, e:E2, w:W|R|R
|
VCVTTPH2QQ Vfv{K}{z},Wqv|B16{sae} nil [evex m:5 p:1 l:x w:0 0x7A /r] s:AVX512FP16, t:AVX512FP16, l:qv, e:E2, w:W|R|R
|
||||||
VCVTPH2QQ Vn{K}{z},Wf|B16{er} nil [evex m:5 p:1 l:x w:0 0x7B /r] s:AVX512FP16, t:AVX512FP16, l:qv, e:E2, w:W|R|R
|
VCVTPH2QQ Vfv{K}{z},Wqv|B16{er} nil [evex m:5 p:1 l:x w:0 0x7B /r] s:AVX512FP16, t:AVX512FP16, l:qv, e:E2, w:W|R|R
|
||||||
VCVTUSI2SH Vdq,Hdq,Ey{er} nil [evex m:5 p:2 l:i w:x 0x7B /r] s:AVX512FP16, t:AVX512FP16, l:t1s, e:E3NF, w:W|R|R, a:IWO64
|
VCVTUSI2SH Vdq,Hdq,Ey{er} nil [evex m:5 p:2 l:i w:x 0x7B /r] s:AVX512FP16, t:AVX512FP16, l:t1s, e:E3NF, w:W|R|R, a:IWO64
|
||||||
VCVTTPH2UW Vn{K}{z},Wn|B16{sae} nil [evex m:5 p:0 l:x w:0 0x7C /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
VCVTTPH2UW Vfv{K}{z},Wfv|B16{sae} nil [evex m:5 p:0 l:x w:0 0x7C /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
||||||
VCVTTPH2W Vn{K}{z},Wn|B16{sae} nil [evex m:5 p:1 l:x w:0 0x7C /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
VCVTTPH2W Vfv{K}{z},Wfv|B16{sae} nil [evex m:5 p:1 l:x w:0 0x7C /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
||||||
VCVTPH2UW Vn{K}{z},Wn|B16{er} nil [evex m:5 p:0 l:x w:0 0x7D /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
VCVTPH2UW Vfv{K}{z},Wfv|B16{er} nil [evex m:5 p:0 l:x w:0 0x7D /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
||||||
VCVTPH2W Vn{K}{z},Wn|B16{er} nil [evex m:5 p:1 l:x w:0 0x7D /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
VCVTPH2W Vfv{K}{z},Wfv|B16{er} nil [evex m:5 p:1 l:x w:0 0x7D /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
||||||
VCVTW2PH Vn{K}{z},Wn|B16{er} nil [evex m:5 p:2 l:x w:0 0x7D /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
VCVTW2PH Vfv{K}{z},Wfv|B16{er} nil [evex m:5 p:2 l:x w:0 0x7D /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
||||||
VCVTUW2PH Vn{K}{z},Wn|B16{er} nil [evex m:5 p:3 l:x w:0 0x7D /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
VCVTUW2PH Vfv{K}{z},Wfv|B16{er} nil [evex m:5 p:3 l:x w:0 0x7D /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
||||||
VMOVW Mw,Vdq nil [evex m:5 p:1 l:0 w:i 0x7E /r:mem] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E9NF, w:W|R
|
VMOVW Mw,Vdq nil [evex m:5 p:1 l:0 w:i 0x7E /r:mem] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E9NF, w:W|R
|
||||||
VMOVW Rd,Vdq nil [evex m:5 p:1 l:0 w:i 0x7E /r:reg] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E9NF, w:W|R
|
VMOVW Rd,Vdq nil [evex m:5 p:1 l:0 w:i 0x7E /r:reg] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E9NF, w:W|R
|
||||||
|
@ -2,64 +2,64 @@
|
|||||||
#------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
|
#------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
|
||||||
# 0x10 - 0x1F
|
# 0x10 - 0x1F
|
||||||
VCVTSH2SS Vdq{K}{z},Hdq,Wsh{sae} nil [evex m:6 p:0 l:i w:0 0x13 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
VCVTSH2SS Vdq{K}{z},Hdq,Wsh{sae} nil [evex m:6 p:0 l:i w:0 0x13 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
||||||
VCVTPH2PSX Vn{K}{z},Wh|B16{sae} nil [evex m:6 p:1 l:x w:0 0x13 /r] s:AVX512FP16, t:AVX512FP16, l:hv, e:E2, w:W|R|R
|
VCVTPH2PSX Vfv{K}{z},Whv|B16{sae} nil [evex m:6 p:1 l:x w:0 0x13 /r] s:AVX512FP16, t:AVX512FP16, l:hv, e:E2, w:W|R|R
|
||||||
|
|
||||||
# 0x20 - 0x2F
|
# 0x20 - 0x2F
|
||||||
VSCALEFPH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:6 p:1 l:x w:0 0x2C /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
VSCALEFPH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:6 p:1 l:x w:0 0x2C /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R|R
|
||||||
VSCALEFSH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0x2D /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
VSCALEFSH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0x2D /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
||||||
|
|
||||||
# 0x40 - 0x4F
|
# 0x40 - 0x4F
|
||||||
VGETEXPPH Vn{K}{z},Wn|B16{sae} nil [evex m:6 p:1 l:x w:0 0x42 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
VGETEXPPH Vfv{K}{z},Wfv|B16{sae} nil [evex m:6 p:1 l:x w:0 0x42 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:W|R|R
|
||||||
VGETEXPSH Vdq{K}{z},Hdq,Wsh{sae} nil [evex m:6 p:1 l:i w:0 0x43 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
VGETEXPSH Vdq{K}{z},Hdq,Wsh{sae} nil [evex m:6 p:1 l:i w:0 0x43 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:W|R|R|R
|
||||||
VRCPPH Vn{K}{z},Wn|B16 nil [evex m:6 p:1 l:x w:0 0x4C /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E4, w:W|R|R
|
VRCPPH Vfv{K}{z},Wfv|B16 nil [evex m:6 p:1 l:x w:0 0x4C /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E4, w:W|R|R
|
||||||
VRCPSH Vdq{K}{z},Hdq,Wsh nil [evex m:6 p:1 l:i w:0 0x4D /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E10, w:W|R|R|R
|
VRCPSH Vdq{K}{z},Hdq,Wsh nil [evex m:6 p:1 l:i w:0 0x4D /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E10, w:W|R|R|R
|
||||||
VRSQRTPH Vn{K}{z},Wn|B16 nil [evex m:6 p:1 l:x w:0 0x4E /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E4, w:W|R|R
|
VRSQRTPH Vfv{K}{z},Wfv|B16 nil [evex m:6 p:1 l:x w:0 0x4E /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E4, w:W|R|R
|
||||||
VRSQRTSH Vdq{K}{z},Hdq,Wsh nil [evex m:6 p:1 l:i w:0 0x4F /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E10, w:W|R|R|R
|
VRSQRTSH Vdq{K}{z},Hdq,Wsh nil [evex m:6 p:1 l:i w:0 0x4F /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E10, w:W|R|R|R
|
||||||
|
|
||||||
# 0x50 - 0x5F
|
# 0x50 - 0x5F
|
||||||
VFMADDCPH Vn{K}{z},Hn,Wn|B32{er} nil [evex m:6 p:2 l:x w:0 0x56 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E4S, w:RW|R|R|R
|
VFMADDCPH Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:6 p:2 l:x w:0 0x56 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E4S, w:RW|R|R|R
|
||||||
VFCMADDCPH Vn{K}{z},Hn,Wn|B32{er} nil [evex m:6 p:3 l:x w:0 0x56 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E4S, w:RW|R|R|R
|
VFCMADDCPH Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:6 p:3 l:x w:0 0x56 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E4S, w:RW|R|R|R
|
||||||
VFMADDCSH Vdq{K}{z},Hdq,Wd{er} nil [evex m:6 p:2 l:i w:0 0x57 /r] s:AVX512FP16, t:AVX512FP16, l:t1s, e:E10S, w:RW|R|R|R
|
VFMADDCSH Vdq{K}{z},Hdq,Wd{er} nil [evex m:6 p:2 l:i w:0 0x57 /r] s:AVX512FP16, t:AVX512FP16, l:t1s, e:E10S, w:RW|R|R|R
|
||||||
VFCMADDCSH Vdq{K}{z},Hdq,Wd{er} nil [evex m:6 p:3 l:i w:0 0x57 /r] s:AVX512FP16, t:AVX512FP16, l:t1s, e:E10S, w:RW|R|R|R
|
VFCMADDCSH Vdq{K}{z},Hdq,Wd{er} nil [evex m:6 p:3 l:i w:0 0x57 /r] s:AVX512FP16, t:AVX512FP16, l:t1s, e:E10S, w:RW|R|R|R
|
||||||
|
|
||||||
# 0x90 - 0x9F
|
# 0x90 - 0x9F
|
||||||
VFMADDSUB132PH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:6 p:1 l:x w:0 0x96 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
VFMADDSUB132PH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:6 p:1 l:x w:0 0x96 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMSUBADD132PH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:6 p:1 l:x w:0 0x97 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
VFMSUBADD132PH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:6 p:1 l:x w:0 0x97 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMADD132PH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:6 p:1 l:x w:0 0x98 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
VFMADD132PH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:6 p:1 l:x w:0 0x98 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMADD132SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0x99 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
VFMADD132SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0x99 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
||||||
VFMSUB132PH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:6 p:1 l:x w:0 0x9A /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
VFMSUB132PH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:6 p:1 l:x w:0 0x9A /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMSUB132SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0x9B /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
VFMSUB132SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0x9B /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
||||||
VFNMADD132PH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:6 p:1 l:x w:0 0x9C /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
VFNMADD132PH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:6 p:1 l:x w:0 0x9C /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFNMADD132SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0x9D /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
VFNMADD132SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0x9D /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
||||||
VFNMSUB132PH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:6 p:1 l:x w:0 0x9E /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
VFNMSUB132PH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:6 p:1 l:x w:0 0x9E /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFNMSUB132SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0x9F /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
VFNMSUB132SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0x9F /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
||||||
|
|
||||||
# 0xA0 - 0xAF
|
# 0xA0 - 0xAF
|
||||||
VFMADDSUB213PH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:6 p:1 l:x w:0 0xA6 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
VFMADDSUB213PH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:6 p:1 l:x w:0 0xA6 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMSUBADD213PH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:6 p:1 l:x w:0 0xA7 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
VFMSUBADD213PH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:6 p:1 l:x w:0 0xA7 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMADD213PH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:6 p:1 l:x w:0 0xA8 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
VFMADD213PH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:6 p:1 l:x w:0 0xA8 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMADD213SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0xA9 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
VFMADD213SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0xA9 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
||||||
VFMSUB213PH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:6 p:1 l:x w:0 0xAA /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
VFMSUB213PH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:6 p:1 l:x w:0 0xAA /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMSUB213SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0xAB /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
VFMSUB213SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0xAB /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
||||||
VFNMADD213PH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:6 p:1 l:x w:0 0xAC /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
VFNMADD213PH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:6 p:1 l:x w:0 0xAC /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFNMADD213SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0xAD /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
VFNMADD213SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0xAD /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
||||||
VFNMSUB213PH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:6 p:1 l:x w:0 0xAE /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
VFNMSUB213PH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:6 p:1 l:x w:0 0xAE /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFNMSUB213SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0xAF /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
VFNMSUB213SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0xAF /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
||||||
|
|
||||||
# 0xB0 - 0xBF
|
# 0xB0 - 0xBF
|
||||||
VFMADDSUB231PH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:6 p:1 l:x w:0 0xB6 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
VFMADDSUB231PH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:6 p:1 l:x w:0 0xB6 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMSUBADD231PH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:6 p:1 l:x w:0 0xB7 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
VFMSUBADD231PH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:6 p:1 l:x w:0 0xB7 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMADD231PH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:6 p:1 l:x w:0 0xB8 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
VFMADD231PH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:6 p:1 l:x w:0 0xB8 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMADD231SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0xB9 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
VFMADD231SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0xB9 /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
||||||
VFMSUB231PH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:6 p:1 l:x w:0 0xBA /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
VFMSUB231PH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:6 p:1 l:x w:0 0xBA /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFMSUB231SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0xBB /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
VFMSUB231SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0xBB /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
||||||
VFNMADD231PH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:6 p:1 l:x w:0 0xBC /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
VFNMADD231PH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:6 p:1 l:x w:0 0xBC /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFNMADD231SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0xBD /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
VFNMADD231SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0xBD /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
||||||
VFNMSUB231PH Vn{K}{z},Hn,Wn|B16{er} nil [evex m:6 p:1 l:x w:0 0xBE /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
VFNMSUB231PH Vfv{K}{z},Hfv,Wfv|B16{er} nil [evex m:6 p:1 l:x w:0 0xBE /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E2, w:RW|R|R|R
|
||||||
VFNMSUB231SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0xBF /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
VFNMSUB231SH Vdq{K}{z},Hdq,Wsh{er} nil [evex m:6 p:1 l:i w:0 0xBF /r] s:AVX512FP16, t:AVX512FP16, l:t1s16, e:E3, w:RW|R|R|R
|
||||||
|
|
||||||
# 0xD0 - 0xD7
|
# 0xD0 - 0xD7
|
||||||
VFMULCPH Vn{K}{z},Hn,Wn|B32{er} nil [evex m:6 p:2 l:x w:0 0xD6 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E4S, w:W|R|R|R
|
VFMULCPH Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:6 p:2 l:x w:0 0xD6 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E4S, w:W|R|R|R
|
||||||
VFCMULCPH Vn{K}{z},Hn,Wn|B32{er} nil [evex m:6 p:3 l:x w:0 0xD6 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E4S, w:W|R|R|R
|
VFCMULCPH Vfv{K}{z},Hfv,Wfv|B32{er} nil [evex m:6 p:3 l:x w:0 0xD6 /r] s:AVX512FP16, t:AVX512FP16, l:fv, e:E4S, w:W|R|R|R
|
||||||
VFMULCSH Vdq{K}{z},Hdq,Wd{er} nil [evex m:6 p:2 l:i w:0 0xD7 /r] s:AVX512FP16, t:AVX512FP16, l:t1s, e:E10S, w:W|R|R|R
|
VFMULCSH Vdq{K}{z},Hdq,Wd{er} nil [evex m:6 p:2 l:i w:0 0xD7 /r] s:AVX512FP16, t:AVX512FP16, l:t1s, e:E10S, w:W|R|R|R
|
||||||
VFCMULCSH Vdq{K}{z},Hdq,Wd{er} nil [evex m:6 p:3 l:i w:0 0xD7 /r] s:AVX512FP16, t:AVX512FP16, l:t1s, e:E10S, w:W|R|R|R
|
VFCMULCSH Vdq{K}{z},Hdq,Wd{er} nil [evex m:6 p:3 l:i w:0 0xD7 /r] s:AVX512FP16, t:AVX512FP16, l:t1s, e:E10S, w:W|R|R|R
|
||||||
|
Loading…
Reference in New Issue
Block a user