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https://github.com/bitdefender/bddisasm.git
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Although not stated in the SDM, VMCALL, VMLAUNCH, VMRESUME and VMXOFF refuse any prefix (66, F3, F2).
This commit is contained in:
parent
072f6e059b
commit
d053de409f
@ -12517,7 +12517,7 @@ const ND_INSTRUCTION gInstructions[2589] =
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},
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},
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},
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},
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// Pos:754 Instruction:"NOP Gv,Ev" Encoding:"0x0F 0x1A /r"/"RM"
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// Pos:754 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x1A /r"/"MR"
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{
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{
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ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 478,
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ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 478,
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0,
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0,
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@ -12528,8 +12528,8 @@ const ND_INSTRUCTION gInstructions[2589] =
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0,
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0,
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0,
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0,
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{
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{
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OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_N, 0, 0),
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OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_N, 0, 0),
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OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_N, 0, 0),
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OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_N, 0, 0),
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},
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},
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},
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},
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@ -29451,7 +29451,7 @@ const ND_INSTRUCTION gInstructions[2589] =
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},
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},
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},
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},
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// Pos:1762 Instruction:"VMCALL" Encoding:"0x0F 0x01 /0xC1"/""
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// Pos:1762 Instruction:"VMCALL" Encoding:"NP 0x0F 0x01 /0xC1"/""
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{
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{
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ND_INS_VMCALL, ND_CAT_VTX, ND_SET_VTX, 1075,
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ND_INS_VMCALL, ND_CAT_VTX, ND_SET_VTX, 1075,
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0,
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0,
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@ -29667,7 +29667,7 @@ const ND_INSTRUCTION gInstructions[2589] =
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},
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},
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},
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},
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// Pos:1775 Instruction:"VMLAUNCH" Encoding:"0x0F 0x01 /0xC2"/""
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// Pos:1775 Instruction:"VMLAUNCH" Encoding:"NP 0x0F 0x01 /0xC2"/""
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{
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{
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ND_INS_VMLAUNCH, ND_CAT_VTX, ND_SET_VTX, 1083,
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ND_INS_VMLAUNCH, ND_CAT_VTX, ND_SET_VTX, 1083,
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0,
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0,
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@ -31431,7 +31431,7 @@ const ND_INSTRUCTION gInstructions[2589] =
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},
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},
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},
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},
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// Pos:1882 Instruction:"VMRESUME" Encoding:"0x0F 0x01 /0xC3"/""
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// Pos:1882 Instruction:"VMRESUME" Encoding:"NP 0x0F 0x01 /0xC3"/""
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{
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{
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ND_INS_VMRESUME, ND_CAT_VTX, ND_SET_VTX, 1121,
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ND_INS_VMRESUME, ND_CAT_VTX, ND_SET_VTX, 1121,
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0,
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0,
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@ -31633,7 +31633,7 @@ const ND_INSTRUCTION gInstructions[2589] =
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},
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},
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},
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},
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// Pos:1894 Instruction:"VMXOFF" Encoding:"0x0F 0x01 /0xC4"/""
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// Pos:1894 Instruction:"VMXOFF" Encoding:"NP 0x0F 0x01 /0xC4"/""
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{
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{
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ND_INS_VMXOFF, ND_CAT_VTX, ND_SET_VTX, 1129,
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ND_INS_VMXOFF, ND_CAT_VTX, ND_SET_VTX, 1129,
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0,
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0,
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@ -4480,39 +4480,83 @@ const ND_TABLE_MPREFIX gRootTable_root_0f_01_reg_00_05_mprefix =
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}
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}
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};
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};
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const ND_TABLE_INSTRUCTION gRootTable_root_0f_01_reg_00_01_leaf =
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const ND_TABLE_INSTRUCTION gRootTable_root_0f_01_reg_00_01_NP_leaf =
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{
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{
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ND_ILUT_INSTRUCTION,
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ND_ILUT_INSTRUCTION,
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(const void *)&gInstructions[1762]
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(const void *)&gInstructions[1762]
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};
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};
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const ND_TABLE_INSTRUCTION gRootTable_root_0f_01_reg_00_02_leaf =
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const ND_TABLE_MPREFIX gRootTable_root_0f_01_reg_00_01_mprefix =
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{
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ND_ILUT_MAN_PREFIX,
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{
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/* 00 */ (const void *)&gRootTable_root_0f_01_reg_00_01_NP_leaf,
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/* 01 */ NULL,
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/* 02 */ NULL,
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/* 03 */ NULL,
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}
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};
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const ND_TABLE_INSTRUCTION gRootTable_root_0f_01_reg_00_02_NP_leaf =
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{
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{
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ND_ILUT_INSTRUCTION,
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ND_ILUT_INSTRUCTION,
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(const void *)&gInstructions[1775]
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(const void *)&gInstructions[1775]
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};
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};
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const ND_TABLE_INSTRUCTION gRootTable_root_0f_01_reg_00_03_leaf =
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const ND_TABLE_MPREFIX gRootTable_root_0f_01_reg_00_02_mprefix =
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{
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ND_ILUT_MAN_PREFIX,
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{
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/* 00 */ (const void *)&gRootTable_root_0f_01_reg_00_02_NP_leaf,
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/* 01 */ NULL,
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/* 02 */ NULL,
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/* 03 */ NULL,
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}
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};
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const ND_TABLE_INSTRUCTION gRootTable_root_0f_01_reg_00_03_NP_leaf =
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{
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{
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ND_ILUT_INSTRUCTION,
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ND_ILUT_INSTRUCTION,
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(const void *)&gInstructions[1882]
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(const void *)&gInstructions[1882]
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};
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};
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const ND_TABLE_INSTRUCTION gRootTable_root_0f_01_reg_00_04_leaf =
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const ND_TABLE_MPREFIX gRootTable_root_0f_01_reg_00_03_mprefix =
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{
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ND_ILUT_MAN_PREFIX,
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{
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/* 00 */ (const void *)&gRootTable_root_0f_01_reg_00_03_NP_leaf,
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/* 01 */ NULL,
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/* 02 */ NULL,
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/* 03 */ NULL,
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}
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};
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const ND_TABLE_INSTRUCTION gRootTable_root_0f_01_reg_00_04_NP_leaf =
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{
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{
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ND_ILUT_INSTRUCTION,
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ND_ILUT_INSTRUCTION,
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(const void *)&gInstructions[1894]
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(const void *)&gInstructions[1894]
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};
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};
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const ND_TABLE_MPREFIX gRootTable_root_0f_01_reg_00_04_mprefix =
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{
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ND_ILUT_MAN_PREFIX,
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{
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/* 00 */ (const void *)&gRootTable_root_0f_01_reg_00_04_NP_leaf,
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/* 01 */ NULL,
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/* 02 */ NULL,
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/* 03 */ NULL,
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}
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};
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const ND_TABLE_MODRM_RM gRootTable_root_0f_01_reg_00_modrmrm =
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const ND_TABLE_MODRM_RM gRootTable_root_0f_01_reg_00_modrmrm =
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{
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{
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ND_ILUT_MODRM_RM,
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ND_ILUT_MODRM_RM,
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{
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{
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/* 00 */ (const void *)&gRootTable_root_0f_01_reg_00_00_mprefix,
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/* 00 */ (const void *)&gRootTable_root_0f_01_reg_00_00_mprefix,
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/* 01 */ (const void *)&gRootTable_root_0f_01_reg_00_01_leaf,
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/* 01 */ (const void *)&gRootTable_root_0f_01_reg_00_01_mprefix,
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/* 02 */ (const void *)&gRootTable_root_0f_01_reg_00_02_leaf,
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/* 02 */ (const void *)&gRootTable_root_0f_01_reg_00_02_mprefix,
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/* 03 */ (const void *)&gRootTable_root_0f_01_reg_00_03_leaf,
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/* 03 */ (const void *)&gRootTable_root_0f_01_reg_00_03_mprefix,
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/* 04 */ (const void *)&gRootTable_root_0f_01_reg_00_04_leaf,
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/* 04 */ (const void *)&gRootTable_root_0f_01_reg_00_04_mprefix,
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/* 05 */ (const void *)&gRootTable_root_0f_01_reg_00_05_mprefix,
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/* 05 */ (const void *)&gRootTable_root_0f_01_reg_00_05_mprefix,
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/* 06 */ NULL,
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/* 06 */ NULL,
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/* 07 */ NULL,
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/* 07 */ NULL,
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@ -7,6 +7,6 @@
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#define DISASM_VERSION_MAJOR 1
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#define DISASM_VERSION_MAJOR 1
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#define DISASM_VERSION_MINOR 32
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#define DISASM_VERSION_MINOR 32
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#define DISASM_VERSION_REVISION 3
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#define DISASM_VERSION_REVISION 4
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#endif // DISASM_VER_H
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#endif // DISASM_VER_H
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@ -22,10 +22,10 @@ LMSW Ew CR0 [ 0x0F 0x01 /6
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INVLPG Mb nil [ 0x0F 0x01 /7:mem] s:I486REAL, t:SYSTEM, w:R, a:AG, m:KERNEL|NOV86
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INVLPG Mb nil [ 0x0F 0x01 /7:mem] s:I486REAL, t:SYSTEM, w:R, a:AG, m:KERNEL|NOV86
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RSTORSSP Mq SSP [ 0xF3 0x0F 0x01 /5:mem] s:CET_SS, t:CET, a:SHS, w:RW|RW, f:CF=m|ZF=0|PF=0|AF=0|OF=0|SF=0
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RSTORSSP Mq SSP [ 0xF3 0x0F 0x01 /5:mem] s:CET_SS, t:CET, a:SHS, w:RW|RW, f:CF=m|ZF=0|PF=0|AF=0|OF=0|SF=0
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ENCLV nil EAX,RBX,RCX,RDX [ NP 0x0F 0x01 /0xC0] s:SGX, t:SGX, w:R|CRW|CRW|CRW, m:KERNEL|NOSMM|NOTSX|VMX
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ENCLV nil EAX,RBX,RCX,RDX [ NP 0x0F 0x01 /0xC0] s:SGX, t:SGX, w:R|CRW|CRW|CRW, m:KERNEL|NOSMM|NOTSX|VMX
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VMCALL nil nil [ 0x0F 0x01 /0xC1] s:VTX, t:VTX, m:VMX|NOSGX
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VMCALL nil nil [ NP 0x0F 0x01 /0xC1] s:VTX, t:VTX, m:VMX|NOSGX
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VMLAUNCH nil Fv [ 0x0F 0x01 /0xC2] s:VTX, t:VTX, w:W, f:VMX, m:VMXROOT
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VMLAUNCH nil Fv [ NP 0x0F 0x01 /0xC2] s:VTX, t:VTX, w:W, f:VMX, m:VMXROOT
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VMRESUME nil Fv [ 0x0F 0x01 /0xC3] s:VTX, t:VTX, w:W, f:VMX, m:VMXROOT
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VMRESUME nil Fv [ NP 0x0F 0x01 /0xC3] s:VTX, t:VTX, w:W, f:VMX, m:VMXROOT
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VMXOFF nil Fv [ 0x0F 0x01 /0xC4] s:VTX, t:VTX, w:W, f:VMX, m:VMXROOT
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VMXOFF nil Fv [ NP 0x0F 0x01 /0xC4] s:VTX, t:VTX, w:W, f:VMX, m:VMXROOT
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PCONFIG nil EAX,RBX,RCX,RDX [ NP 0x0F 0x01 /0xC5] s:PCONFIG, t:PCONFIG, w:R|RW|RW|RW, m:NOV86
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PCONFIG nil EAX,RBX,RCX,RDX [ NP 0x0F 0x01 /0xC5] s:PCONFIG, t:PCONFIG, w:R|RW|RW|RW, m:NOV86
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MONITOR nil EAX,ECX,EDX [ NP 0x0F 0x01 /0xC8] s:SSE3, t:MISC, w:R|R|R, i:MONITOR, m:KERNEL|NOV86
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MONITOR nil EAX,ECX,EDX [ NP 0x0F 0x01 /0xC8] s:SSE3, t:MISC, w:R|R|R, i:MONITOR, m:KERNEL|NOV86
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MWAIT nil EAX,ECX [ NP 0x0F 0x01 /0xC9] s:SSE3, t:MISC, w:RW|R, i:MONITOR, m:KERNEL|NOV86
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MWAIT nil EAX,ECX [ NP 0x0F 0x01 /0xC9] s:SSE3, t:MISC, w:RW|R, i:MONITOR, m:KERNEL|NOV86
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@ -157,7 +157,7 @@ NOP Ev nil [ 0x0F 0x19 /r
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# that Xed doesn't do those checks either).
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# that Xed doesn't do those checks either).
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# MPX not used, these guys are wide NOPs.
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# MPX not used, these guys are wide NOPs.
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NOP Gv,Ev nil [ 0x0F 0x1A /r] s:PPRO, t:WIDENOP, w:N|N
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NOP Ev,Gv nil [ 0x0F 0x1A /r] s:PPRO, t:WIDENOP, w:N|N
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NOP Gv,Ev nil [ 0x0F 0x1B /r] s:PPRO, t:WIDENOP, w:N|N
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NOP Gv,Ev nil [ 0x0F 0x1B /r] s:PPRO, t:WIDENOP, w:N|N
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NOP Ev,Gv nil [ 0x0F 0x1C /r] s:PPRO, t:WIDENOP, w:N|N
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NOP Ev,Gv nil [ 0x0F 0x1C /r] s:PPRO, t:WIDENOP, w:N|N
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NOP Ev,Gv nil [ 0x0F 0x1D /r] s:PPRO, t:WIDENOP, w:N|N
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NOP Ev,Gv nil [ 0x0F 0x1D /r] s:PPRO, t:WIDENOP, w:N|N
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@ -12,7 +12,7 @@ from setuptools import find_packages, setup, Command, Extension, Distribution
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from codecs import open
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from codecs import open
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VERSION = (0, 1, 3)
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VERSION = (0, 1, 3)
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LIBRARY_VERSION = (1, 32, 3)
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LIBRARY_VERSION = (1, 32, 4)
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LIBRARY_INSTRUX_SIZE = 864
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LIBRARY_INSTRUX_SIZE = 864
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packages = ['pybddisasm']
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packages = ['pybddisasm']
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