Although not stated in the SDM, VMCALL, VMLAUNCH, VMRESUME and VMXOFF refuse any prefix (66, F3, F2).

pull/52/head
Andrei Vlad LUTAS 3 years ago
parent 072f6e059b
commit d053de409f

@ -12517,7 +12517,7 @@ const ND_INSTRUCTION gInstructions[2589] =
}, },
}, },
// Pos:754 Instruction:"NOP Gv,Ev" Encoding:"0x0F 0x1A /r"/"RM" // Pos:754 Instruction:"NOP Ev,Gv" Encoding:"0x0F 0x1A /r"/"MR"
{ {
ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 478, ND_INS_NOP, ND_CAT_WIDENOP, ND_SET_PPRO, 478,
0, 0,
@ -12528,8 +12528,8 @@ const ND_INSTRUCTION gInstructions[2589] =
0, 0,
0, 0,
{ {
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_N, 0, 0),
OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_N, 0, 0), OP(ND_OPT_E, ND_OPS_v, 0, ND_OPA_N, 0, 0),
OP(ND_OPT_G, ND_OPS_v, 0, ND_OPA_N, 0, 0),
}, },
}, },
@ -29451,7 +29451,7 @@ const ND_INSTRUCTION gInstructions[2589] =
}, },
}, },
// Pos:1762 Instruction:"VMCALL" Encoding:"0x0F 0x01 /0xC1"/"" // Pos:1762 Instruction:"VMCALL" Encoding:"NP 0x0F 0x01 /0xC1"/""
{ {
ND_INS_VMCALL, ND_CAT_VTX, ND_SET_VTX, 1075, ND_INS_VMCALL, ND_CAT_VTX, ND_SET_VTX, 1075,
0, 0,
@ -29667,7 +29667,7 @@ const ND_INSTRUCTION gInstructions[2589] =
}, },
}, },
// Pos:1775 Instruction:"VMLAUNCH" Encoding:"0x0F 0x01 /0xC2"/"" // Pos:1775 Instruction:"VMLAUNCH" Encoding:"NP 0x0F 0x01 /0xC2"/""
{ {
ND_INS_VMLAUNCH, ND_CAT_VTX, ND_SET_VTX, 1083, ND_INS_VMLAUNCH, ND_CAT_VTX, ND_SET_VTX, 1083,
0, 0,
@ -31431,7 +31431,7 @@ const ND_INSTRUCTION gInstructions[2589] =
}, },
}, },
// Pos:1882 Instruction:"VMRESUME" Encoding:"0x0F 0x01 /0xC3"/"" // Pos:1882 Instruction:"VMRESUME" Encoding:"NP 0x0F 0x01 /0xC3"/""
{ {
ND_INS_VMRESUME, ND_CAT_VTX, ND_SET_VTX, 1121, ND_INS_VMRESUME, ND_CAT_VTX, ND_SET_VTX, 1121,
0, 0,
@ -31633,7 +31633,7 @@ const ND_INSTRUCTION gInstructions[2589] =
}, },
}, },
// Pos:1894 Instruction:"VMXOFF" Encoding:"0x0F 0x01 /0xC4"/"" // Pos:1894 Instruction:"VMXOFF" Encoding:"NP 0x0F 0x01 /0xC4"/""
{ {
ND_INS_VMXOFF, ND_CAT_VTX, ND_SET_VTX, 1129, ND_INS_VMXOFF, ND_CAT_VTX, ND_SET_VTX, 1129,
0, 0,

@ -4480,39 +4480,83 @@ const ND_TABLE_MPREFIX gRootTable_root_0f_01_reg_00_05_mprefix =
} }
}; };
const ND_TABLE_INSTRUCTION gRootTable_root_0f_01_reg_00_01_leaf = const ND_TABLE_INSTRUCTION gRootTable_root_0f_01_reg_00_01_NP_leaf =
{ {
ND_ILUT_INSTRUCTION, ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1762] (const void *)&gInstructions[1762]
}; };
const ND_TABLE_INSTRUCTION gRootTable_root_0f_01_reg_00_02_leaf = const ND_TABLE_MPREFIX gRootTable_root_0f_01_reg_00_01_mprefix =
{
ND_ILUT_MAN_PREFIX,
{
/* 00 */ (const void *)&gRootTable_root_0f_01_reg_00_01_NP_leaf,
/* 01 */ NULL,
/* 02 */ NULL,
/* 03 */ NULL,
}
};
const ND_TABLE_INSTRUCTION gRootTable_root_0f_01_reg_00_02_NP_leaf =
{ {
ND_ILUT_INSTRUCTION, ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1775] (const void *)&gInstructions[1775]
}; };
const ND_TABLE_INSTRUCTION gRootTable_root_0f_01_reg_00_03_leaf = const ND_TABLE_MPREFIX gRootTable_root_0f_01_reg_00_02_mprefix =
{
ND_ILUT_MAN_PREFIX,
{
/* 00 */ (const void *)&gRootTable_root_0f_01_reg_00_02_NP_leaf,
/* 01 */ NULL,
/* 02 */ NULL,
/* 03 */ NULL,
}
};
const ND_TABLE_INSTRUCTION gRootTable_root_0f_01_reg_00_03_NP_leaf =
{ {
ND_ILUT_INSTRUCTION, ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1882] (const void *)&gInstructions[1882]
}; };
const ND_TABLE_INSTRUCTION gRootTable_root_0f_01_reg_00_04_leaf = const ND_TABLE_MPREFIX gRootTable_root_0f_01_reg_00_03_mprefix =
{
ND_ILUT_MAN_PREFIX,
{
/* 00 */ (const void *)&gRootTable_root_0f_01_reg_00_03_NP_leaf,
/* 01 */ NULL,
/* 02 */ NULL,
/* 03 */ NULL,
}
};
const ND_TABLE_INSTRUCTION gRootTable_root_0f_01_reg_00_04_NP_leaf =
{ {
ND_ILUT_INSTRUCTION, ND_ILUT_INSTRUCTION,
(const void *)&gInstructions[1894] (const void *)&gInstructions[1894]
}; };
const ND_TABLE_MPREFIX gRootTable_root_0f_01_reg_00_04_mprefix =
{
ND_ILUT_MAN_PREFIX,
{
/* 00 */ (const void *)&gRootTable_root_0f_01_reg_00_04_NP_leaf,
/* 01 */ NULL,
/* 02 */ NULL,
/* 03 */ NULL,
}
};
const ND_TABLE_MODRM_RM gRootTable_root_0f_01_reg_00_modrmrm = const ND_TABLE_MODRM_RM gRootTable_root_0f_01_reg_00_modrmrm =
{ {
ND_ILUT_MODRM_RM, ND_ILUT_MODRM_RM,
{ {
/* 00 */ (const void *)&gRootTable_root_0f_01_reg_00_00_mprefix, /* 00 */ (const void *)&gRootTable_root_0f_01_reg_00_00_mprefix,
/* 01 */ (const void *)&gRootTable_root_0f_01_reg_00_01_leaf, /* 01 */ (const void *)&gRootTable_root_0f_01_reg_00_01_mprefix,
/* 02 */ (const void *)&gRootTable_root_0f_01_reg_00_02_leaf, /* 02 */ (const void *)&gRootTable_root_0f_01_reg_00_02_mprefix,
/* 03 */ (const void *)&gRootTable_root_0f_01_reg_00_03_leaf, /* 03 */ (const void *)&gRootTable_root_0f_01_reg_00_03_mprefix,
/* 04 */ (const void *)&gRootTable_root_0f_01_reg_00_04_leaf, /* 04 */ (const void *)&gRootTable_root_0f_01_reg_00_04_mprefix,
/* 05 */ (const void *)&gRootTable_root_0f_01_reg_00_05_mprefix, /* 05 */ (const void *)&gRootTable_root_0f_01_reg_00_05_mprefix,
/* 06 */ NULL, /* 06 */ NULL,
/* 07 */ NULL, /* 07 */ NULL,

@ -7,6 +7,6 @@
#define DISASM_VERSION_MAJOR 1 #define DISASM_VERSION_MAJOR 1
#define DISASM_VERSION_MINOR 32 #define DISASM_VERSION_MINOR 32
#define DISASM_VERSION_REVISION 3 #define DISASM_VERSION_REVISION 4
#endif // DISASM_VER_H #endif // DISASM_VER_H

@ -22,10 +22,10 @@ LMSW Ew CR0 [ 0x0F 0x01 /6
INVLPG Mb nil [ 0x0F 0x01 /7:mem] s:I486REAL, t:SYSTEM, w:R, a:AG, m:KERNEL|NOV86 INVLPG Mb nil [ 0x0F 0x01 /7:mem] s:I486REAL, t:SYSTEM, w:R, a:AG, m:KERNEL|NOV86
RSTORSSP Mq SSP [ 0xF3 0x0F 0x01 /5:mem] s:CET_SS, t:CET, a:SHS, w:RW|RW, f:CF=m|ZF=0|PF=0|AF=0|OF=0|SF=0 RSTORSSP Mq SSP [ 0xF3 0x0F 0x01 /5:mem] s:CET_SS, t:CET, a:SHS, w:RW|RW, f:CF=m|ZF=0|PF=0|AF=0|OF=0|SF=0
ENCLV nil EAX,RBX,RCX,RDX [ NP 0x0F 0x01 /0xC0] s:SGX, t:SGX, w:R|CRW|CRW|CRW, m:KERNEL|NOSMM|NOTSX|VMX ENCLV nil EAX,RBX,RCX,RDX [ NP 0x0F 0x01 /0xC0] s:SGX, t:SGX, w:R|CRW|CRW|CRW, m:KERNEL|NOSMM|NOTSX|VMX
VMCALL nil nil [ 0x0F 0x01 /0xC1] s:VTX, t:VTX, m:VMX|NOSGX VMCALL nil nil [ NP 0x0F 0x01 /0xC1] s:VTX, t:VTX, m:VMX|NOSGX
VMLAUNCH nil Fv [ 0x0F 0x01 /0xC2] s:VTX, t:VTX, w:W, f:VMX, m:VMXROOT VMLAUNCH nil Fv [ NP 0x0F 0x01 /0xC2] s:VTX, t:VTX, w:W, f:VMX, m:VMXROOT
VMRESUME nil Fv [ 0x0F 0x01 /0xC3] s:VTX, t:VTX, w:W, f:VMX, m:VMXROOT VMRESUME nil Fv [ NP 0x0F 0x01 /0xC3] s:VTX, t:VTX, w:W, f:VMX, m:VMXROOT
VMXOFF nil Fv [ 0x0F 0x01 /0xC4] s:VTX, t:VTX, w:W, f:VMX, m:VMXROOT VMXOFF nil Fv [ NP 0x0F 0x01 /0xC4] s:VTX, t:VTX, w:W, f:VMX, m:VMXROOT
PCONFIG nil EAX,RBX,RCX,RDX [ NP 0x0F 0x01 /0xC5] s:PCONFIG, t:PCONFIG, w:R|RW|RW|RW, m:NOV86 PCONFIG nil EAX,RBX,RCX,RDX [ NP 0x0F 0x01 /0xC5] s:PCONFIG, t:PCONFIG, w:R|RW|RW|RW, m:NOV86
MONITOR nil EAX,ECX,EDX [ NP 0x0F 0x01 /0xC8] s:SSE3, t:MISC, w:R|R|R, i:MONITOR, m:KERNEL|NOV86 MONITOR nil EAX,ECX,EDX [ NP 0x0F 0x01 /0xC8] s:SSE3, t:MISC, w:R|R|R, i:MONITOR, m:KERNEL|NOV86
MWAIT nil EAX,ECX [ NP 0x0F 0x01 /0xC9] s:SSE3, t:MISC, w:RW|R, i:MONITOR, m:KERNEL|NOV86 MWAIT nil EAX,ECX [ NP 0x0F 0x01 /0xC9] s:SSE3, t:MISC, w:RW|R, i:MONITOR, m:KERNEL|NOV86
@ -157,7 +157,7 @@ NOP Ev nil [ 0x0F 0x19 /r
# that Xed doesn't do those checks either). # that Xed doesn't do those checks either).
# MPX not used, these guys are wide NOPs. # MPX not used, these guys are wide NOPs.
NOP Gv,Ev nil [ 0x0F 0x1A /r] s:PPRO, t:WIDENOP, w:N|N NOP Ev,Gv nil [ 0x0F 0x1A /r] s:PPRO, t:WIDENOP, w:N|N
NOP Gv,Ev nil [ 0x0F 0x1B /r] s:PPRO, t:WIDENOP, w:N|N NOP Gv,Ev nil [ 0x0F 0x1B /r] s:PPRO, t:WIDENOP, w:N|N
NOP Ev,Gv nil [ 0x0F 0x1C /r] s:PPRO, t:WIDENOP, w:N|N NOP Ev,Gv nil [ 0x0F 0x1C /r] s:PPRO, t:WIDENOP, w:N|N
NOP Ev,Gv nil [ 0x0F 0x1D /r] s:PPRO, t:WIDENOP, w:N|N NOP Ev,Gv nil [ 0x0F 0x1D /r] s:PPRO, t:WIDENOP, w:N|N

@ -12,7 +12,7 @@ from setuptools import find_packages, setup, Command, Extension, Distribution
from codecs import open from codecs import open
VERSION = (0, 1, 3) VERSION = (0, 1, 3)
LIBRARY_VERSION = (1, 32, 3) LIBRARY_VERSION = (1, 32, 4)
LIBRARY_INSTRUX_SIZE = 864 LIBRARY_INSTRUX_SIZE = 864
packages = ['pybddisasm'] packages = ['pybddisasm']

Loading…
Cancel
Save