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* Added missing Rust source file.
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@ -22,7 +22,7 @@
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//!
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//!
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//! ```toml
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//! ```toml
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//! [dependencies]
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//! [dependencies]
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//! bddisasm = "0.5.0"
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//! bddisasm = "0.5.1"
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//! ```
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//! ```
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//!
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//!
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//! # Examples
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//! # Examples
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@ -186,7 +186,7 @@
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//! # Feature Flags
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//! # Feature Flags
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//!
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//!
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//! - `std` - adds a `std` dependency - the only visible difference when doing this is that [`DecodeError`] implements
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//! - `std` - adds a `std` dependency - the only visible difference when doing this is that [`DecodeError`] implements
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//! the `Error` trait
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//! the `Error` trait
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//!
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//!
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#![cfg_attr(all(not(test), not(feature = "std")), no_std)]
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#![cfg_attr(all(not(test), not(feature = "std")), no_std)]
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@ -205,6 +205,7 @@ pub mod isa_set;
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pub mod mnemonic;
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pub mod mnemonic;
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pub mod operand;
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pub mod operand;
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pub mod rflags;
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pub mod rflags;
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pub mod simd_exceptions;
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pub mod tuple;
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pub mod tuple;
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pub use crate::decode_error::DecodeError;
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pub use crate::decode_error::DecodeError;
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46
bindings/rsbddisasm/bddisasm/src/simd_exceptions.rs
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46
bindings/rsbddisasm/bddisasm/src/simd_exceptions.rs
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@ -0,0 +1,46 @@
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/*
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* Copyright (c) 2024 Bitdefender
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* SPDX-License-Identifier: Apache-2.0
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*/
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//! Offers information about the SIMD exceptions that can be triggered by an instruction.
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#![allow(clippy::module_name_repetitions)]
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// TODO: maybe use something like the `bitflags` crate and have all these as flags?
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/// SIMD Floating-Point Exceptions.
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#[derive(Copy, Clone, Eq, PartialEq, Hash, Debug)]
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pub struct SimdExceptions {
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/// Invalid Operation Exception.
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pub invalid_operation: bool,
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/// Denormal Exception.
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pub denormal: bool,
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/// Divide-by-Zero Exception.
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pub divide_by_zero: bool,
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/// Overflow Exception.
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pub overflow: bool,
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/// Underflow Exception.
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pub underflow: bool,
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/// Precision Exception.
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pub precision: bool,
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}
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#[doc(hidden)]
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impl SimdExceptions {
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pub(crate) fn from_raw(value: u8) -> Self {
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let value = u32::from(value);
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Self {
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invalid_operation: (value & ffi::ND_SIMD_EXC_IE) != 0,
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denormal: (value & ffi::ND_SIMD_EXC_DE) != 0,
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divide_by_zero: (value & ffi::ND_SIMD_EXC_ZE) != 0,
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overflow: (value & ffi::ND_SIMD_EXC_OE) != 0,
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underflow: (value & ffi::ND_SIMD_EXC_UE) != 0,
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precision: (value & ffi::ND_SIMD_EXC_PE) != 0,
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}
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}
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}
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