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mirror of https://github.com/bitdefender/bddisasm.git synced 2024-11-22 07:28:07 +00:00

Some more type cast warnings fixed.

This commit is contained in:
Andrei Vlad LUTAS 2024-06-04 19:13:52 +03:00
parent f1a85df2e7
commit 270587903e
3 changed files with 50 additions and 54 deletions

View File

@ -250,24 +250,7 @@ ShemuCopyMem(
ND_UINT64 Size ND_UINT64 Size
) )
{ {
switch (Size) shemu_memcpy(Destination, Source, (ND_SIZET)Size);
{
case 1:
*Destination = *Source;
break;
case 2:
*(ND_UINT16 *)Destination = *(ND_UINT16 *)Source;
break;
case 4:
*(ND_UINT32 *)Destination = *(ND_UINT32 *)Source;
break;
case 8:
*(ND_UINT64 *)Destination = *(ND_UINT64 *)Source;
break;
default:
shemu_memcpy(Destination, Source, (ND_SIZET)Size);
break;
}
} }

View File

@ -77,18 +77,18 @@ enum
#define GET_OP(ctx, op, val) { \ #define GET_OP(ctx, op, val) { \
SHEMU_STATUS status = ShemuX86GetOperandValue(ctx, op, val); \ shstatus = ShemuX86GetOperandValue(ctx, op, val); \
if (SHEMU_SUCCESS != status) \ if (SHEMU_SUCCESS != shstatus) \
{ \ { \
return status; \ return shstatus; \
} \ } \
} }
#define SET_OP(ctx, op, val) { \ #define SET_OP(ctx, op, val) { \
SHEMU_STATUS status = ShemuX86SetOperandValue(ctx, op, val); \ shstatus = ShemuX86SetOperandValue(ctx, op, val); \
if (SHEMU_SUCCESS != status) \ if (SHEMU_SUCCESS != shstatus) \
{ \ { \
return status; \ return shstatus; \
} \ } \
} }
@ -1448,20 +1448,23 @@ ShemuX86Multiply64Unsigned(
ND_UINT64 *ResLow ND_UINT64 *ResLow
) )
{ {
ND_UINT64 xLow = (ND_UINT64)(ND_UINT32)Operand1; ND_UINT64 xLow, xHigh, yLow, yHigh, p0, p1, p2, p3, ps;
ND_UINT64 xHigh = Operand1 >> 32;
ND_UINT64 yLow = (ND_UINT64)(ND_UINT32)Operand2;
ND_UINT64 yHigh = Operand2 >> 32;
ND_UINT64 p0 = xLow * yLow; xLow = Operand1 & 0xFFFFFFFF;
ND_UINT64 p1 = xLow * yHigh; xHigh = Operand1 >> 32;
ND_UINT64 p2 = xHigh * yLow; yLow = Operand2 & 0xFFFFFFFF;
ND_UINT64 p3 = xHigh * yHigh; yHigh = Operand2 >> 32;
ND_UINT32 cy = (ND_UINT32)(((p0 >> 32) + (ND_UINT32)p1 + (ND_UINT32)p2) >> 32); // Multiply the 4 parts into 4 partial products.
p0 = xLow * yLow;
p1 = xLow * yHigh;
p2 = xHigh * yLow;
p3 = xHigh * yHigh;
ps = (((p0 >> 32) + (p1 & 0xFFFFFFFF) + (p2 & 0xFFFFFFFF)) >> 32) & 0xFFFFFFFF;
// Fill in the final result (low & high 64-bit parts).
*ResLow = p0 + (p1 << 32) + (p2 << 32); *ResLow = p0 + (p1 << 32) + (p2 << 32);
*ResHigh = p3 + (p1 >> 32) + (p2 >> 32) + cy; *ResHigh = p3 + (p1 >> 32) + (p2 >> 32) + ps;
} }
@ -1477,8 +1480,18 @@ ShemuX86Multiply64Signed(
) )
{ {
ShemuX86Multiply64Unsigned((ND_UINT64)Operand1, (ND_UINT64)Operand2, (ND_UINT64 *)ResHigh, (ND_UINT64 *)ResLow); ShemuX86Multiply64Unsigned((ND_UINT64)Operand1, (ND_UINT64)Operand2, (ND_UINT64 *)ResHigh, (ND_UINT64 *)ResLow);
if (Operand1 < 0LL) *ResHigh -= Operand2;
if (Operand2 < 0LL) *ResHigh -= Operand1; // Negate, if needed.
if (Operand1 < 0)
{
*ResHigh -= Operand2;
}
// Negate, if needed.
if (Operand2 < 0)
{
*ResHigh -= Operand1;
}
} }
@ -2789,7 +2802,7 @@ check_far_branch:
} }
else else
{ {
ShemuX86Multiply64Signed(dst.Value.Qwords[0], src.Value.Qwords[0], ShemuX86Multiply64Signed((ND_SINT64)dst.Value.Qwords[0], (ND_SINT64)src.Value.Qwords[0],
(ND_SINT64*)&res.Value.Qwords[1], (ND_SINT64*)&res.Value.Qwords[0]); (ND_SINT64*)&res.Value.Qwords[1], (ND_SINT64*)&res.Value.Qwords[0]);
} }
} }

View File

@ -139,22 +139,22 @@ enum
#define NDR_IA32_TSC_AUX 0xC0000103 #define NDR_IA32_TSC_AUX 0xC0000103
#define NDR_MSR_ANY 0xFFFFFFFF #define NDR_MSR_ANY 0xFFFFFFFF
#define NDR_RFLAG_CF (1 << 0) #define NDR_RFLAG_CF (1ULL << 0)
#define NDR_RFLAG_PF (1 << 2) #define NDR_RFLAG_PF (1ULL << 2)
#define NDR_RFLAG_AF (1 << 4) #define NDR_RFLAG_AF (1ULL << 4)
#define NDR_RFLAG_ZF (1 << 6) #define NDR_RFLAG_ZF (1ULL << 6)
#define NDR_RFLAG_SF (1 << 7) #define NDR_RFLAG_SF (1ULL << 7)
#define NDR_RFLAG_TF (1 << 8) #define NDR_RFLAG_TF (1ULL << 8)
#define NDR_RFLAG_IF (1 << 9) #define NDR_RFLAG_IF (1ULL << 9)
#define NDR_RFLAG_DF (1 << 10) #define NDR_RFLAG_DF (1ULL << 10)
#define NDR_RFLAG_OF (1 << 11) #define NDR_RFLAG_OF (1ULL << 11)
#define NDR_RFLAG_IOPL (3 << 12) #define NDR_RFLAG_IOPL (3ULL << 12)
#define NDR_RFLAG_NT (1 << 14) #define NDR_RFLAG_NT (1ULL << 14)
#define NDR_RFLAG_RF (1 << 16) #define NDR_RFLAG_RF (1ULL << 16)
#define NDR_RFLAG_VM (1 << 17) #define NDR_RFLAG_VM (1ULL << 17)
#define NDR_RFLAG_AC (1 << 18) #define NDR_RFLAG_AC (1ULL << 18)
#define NDR_RFLAG_VIF (1 << 19) #define NDR_RFLAG_VIF (1ULL << 19)
#define NDR_RFLAG_VIP (1 << 20) #define NDR_RFLAG_VIP (1ULL << 20)
#define NDR_RFLAG_ID (1 << 21) #define NDR_RFLAG_ID (1ULL << 21)
#endif #endif