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bddisasm/bddisasm_test/x86/amx/amx1_64.asm

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Initial commit.
2020-07-21 08:19:18 +00:00
bits 64
db 0xc4, 0xe2, 0x78, 0x49, 0x00 ; LDTILECFG zmmword ptr [rax]
db 0xc4, 0xe2, 0x79, 0x49, 0x00 ; STTILECFG zmmword ptr [rax]
db 0xc4, 0xe2, 0x7A, 0x5c, 0xF4 ; TDPBF16PS tmm6, tmm4, tmm0
db 0xc4, 0xe2, 0x78, 0x5e, 0xF4 ; TDPBUUD tmm6, tmm4, tmm0
db 0xc4, 0xe2, 0x79, 0x5e, 0xF4 ; TDPBUSD tmm6, tmm4, tmm0
db 0xc4, 0xe2, 0x7A, 0x5e, 0xF4 ; TDPBSUD tmm6, tmm4, tmm0
db 0xc4, 0xe2, 0x7B, 0x5e, 0xF4 ; TDPBSSD tmm6, tmm4, tmm0
db 0xc4, 0xe2, 0x79, 0x4b, 0x04, 0x00 ; TILELOADDT1 tmm0, [rax+rax]
db 0xc4, 0xe2, 0x7b, 0x4b, 0x04, 0x00 ; TILELOADD tmm0, [rax+rax]
db 0xc4, 0xe2, 0x7a, 0x4b, 0x04, 0x00 ; TILESTORED tmm0, [rax+rax]
db 0xc4, 0xe2, 0x79, 0x4b, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00 ; TILELOADDT1 tmm0, [rax+rax+0]
db 0xc4, 0xe2, 0x7b, 0x4b, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00 ; TILELOADD tmm0, [rax+rax+0]
db 0xc4, 0xe2, 0x7a, 0x4b, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00 ; TILESTORED tmm0, [rax+rax+0]
db 0xc4, 0xe2, 0x78, 0x49, 0xC0 ; TILERELEASE
db 0xc4, 0xe2, 0x7b, 0x49, 0xC0 ; TILEZERO tmm0
db 0xc4, 0xe2, 0x7b, 0x49, 0xf8 ; TILEZERO tmm7
Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8. Multiple minor fixes to existing instructions. Moved x86 decoding tests in a separate directory & improved the test script.
2022-10-04 09:22:59 +00:00
db 0xc4, 0xe2, 0x7b, 0x5C, 0xF4 ; TDPFP16PS tmm6, tmm4, tmm0
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