mirror of
https://github.com/bitdefender/bddisasm.git
synced 2024-12-23 06:28:13 +00:00
90 lines
2.0 KiB
C
90 lines
2.0 KiB
C
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/*
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* Copyright (c) 2020 Bitdefender
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef BDSHEMU_X86_
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#define BDSHEMU_X86_
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#include "bddisasm_types.h"
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//
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// General purpose registers.
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//
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typedef struct _SHEMU_X86_GPR_REGS
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{
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ND_UINT64 RegRax;
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ND_UINT64 RegRcx;
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ND_UINT64 RegRdx;
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ND_UINT64 RegRbx;
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ND_UINT64 RegRsp;
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ND_UINT64 RegRbp;
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ND_UINT64 RegRsi;
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ND_UINT64 RegRdi;
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ND_UINT64 RegR8;
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ND_UINT64 RegR9;
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ND_UINT64 RegR10;
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ND_UINT64 RegR11;
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ND_UINT64 RegR12;
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ND_UINT64 RegR13;
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ND_UINT64 RegR14;
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ND_UINT64 RegR15;
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ND_UINT64 RegR16;
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ND_UINT64 RegR17;
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ND_UINT64 RegR18;
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ND_UINT64 RegR19;
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ND_UINT64 RegR20;
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ND_UINT64 RegR21;
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ND_UINT64 RegR22;
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ND_UINT64 RegR23;
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ND_UINT64 RegR24;
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ND_UINT64 RegR25;
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ND_UINT64 RegR26;
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ND_UINT64 RegR27;
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ND_UINT64 RegR28;
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ND_UINT64 RegR29;
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ND_UINT64 RegR30;
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ND_UINT64 RegR31;
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ND_UINT64 RegCr2;
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ND_UINT64 RegFlags;
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ND_UINT64 RegDr7;
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ND_UINT64 RegRip;
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ND_UINT64 RegCr0;
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ND_UINT64 RegCr4;
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ND_UINT64 RegCr3;
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ND_UINT64 RegCr8;
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ND_UINT64 RegIdtBase;
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ND_UINT64 RegIdtLimit;
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ND_UINT64 RegGdtBase;
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ND_UINT64 RegGdtLimit;
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ND_UINT64 FpuRip;
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} SHEMU_X86_GPR_REGS, *PSHEMU_X86_GPR_REGS;
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//
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// Segment register (with its hidden part).
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//
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typedef struct _SHEMU_X86_SEG
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{
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ND_UINT64 Base;
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ND_UINT64 Limit;
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ND_UINT64 Selector;
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ND_UINT64 AccessRights;
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} SHEMU_X86_SEG, *PSHEMU_X86_SEG;
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//
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// The segment registers.
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//
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typedef struct _SHEMU_X86_SEG_REGS
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{
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SHEMU_X86_SEG Es;
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SHEMU_X86_SEG Cs;
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SHEMU_X86_SEG Ss;
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SHEMU_X86_SEG Ds;
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SHEMU_X86_SEG Fs;
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SHEMU_X86_SEG Gs;
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} SHEMU_X86_SEG_REGS, *PSHEMU_X86_SEG_REGS;
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#endif
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