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bddisasm/bddisasm_test/basic/branch_16.result

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Initial commit.
2020-07-21 08:19:18 +00:00
0000000000000000 e8fdff CALL 0x0
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: CALL, CET tracked: no
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: yes, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Offset, Size: 2, RawSize: 2, Encoding: D
Operand: 1, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 2, Acc: -W, Type: Memory, Size: 2, RawSize: 2, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 3, Acc: -W, Type: Memory, Size: 2, RawSize: 2, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
0000000000000003 ffd0 CALL ax
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: CALL, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: yes, BHINT: no, DNT: yes
Operand: 0, Acc: R-, Type: Register, Size: 2, RawSize: 2, Encoding: M, RegType: General Purpose, RegSize: 2, RegId: 0, RegCount: 1
Operand: 1, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 2, Acc: -W, Type: Memory, Size: 2, RawSize: 2, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 3, Acc: -W, Type: Memory, Size: 2, RawSize: 2, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
0000000000000005 66ffd0 CALL eax
DSIZE: 32, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: CALL, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: yes, BHINT: no, DNT: yes
Operand: 0, Acc: R-, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 0, RegCount: 1
Operand: 1, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
Operand: 2, Acc: -W, Type: Memory, Size: 4, RawSize: 4, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 3, Acc: -W, Type: Memory, Size: 4, RawSize: 4, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
0000000000000008 ff17 CALL word ptr [bx]
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: CALL, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: yes, BHINT: no, DNT: yes
Operand: 0, Acc: R-, Type: Memory, Size: 2, RawSize: 2, Encoding: M,
Segment: 3, Base: 3,
Operand: 1, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 2, Acc: -W, Type: Memory, Size: 2, RawSize: 2, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 3, Acc: -W, Type: Memory, Size: 2, RawSize: 2, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
000000000000000A 67ff13 CALL word ptr [ebx]
DSIZE: 16, ASIZE: 32, VLEN: -
ISA Set: I86, Ins cat: CALL, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: yes, BHINT: no, DNT: yes
Operand: 0, Acc: R-, Type: Memory, Size: 2, RawSize: 2, Encoding: M,
Segment: 3, Base: 3,
Operand: 1, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 2, Acc: -W, Type: Memory, Size: 2, RawSize: 2, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 3, Acc: -W, Type: Memory, Size: 2, RawSize: 2, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
000000000000000D 67ff13 CALL word ptr [ebx]
DSIZE: 16, ASIZE: 32, VLEN: -
ISA Set: I86, Ins cat: CALL, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: yes, BHINT: no, DNT: yes
Operand: 0, Acc: R-, Type: Memory, Size: 2, RawSize: 2, Encoding: M,
Segment: 3, Base: 3,
Operand: 1, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 2, Acc: -W, Type: Memory, Size: 2, RawSize: 2, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 3, Acc: -W, Type: Memory, Size: 2, RawSize: 2, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
0000000000000010 6667ff13 CALL dword ptr [ebx]
DSIZE: 32, ASIZE: 32, VLEN: -
ISA Set: I86, Ins cat: CALL, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: yes, BHINT: no, DNT: yes
Operand: 0, Acc: R-, Type: Memory, Size: 4, RawSize: 4, Encoding: M,
Segment: 3, Base: 3,
Operand: 1, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
Operand: 2, Acc: -W, Type: Memory, Size: 4, RawSize: 4, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 3, Acc: -W, Type: Memory, Size: 4, RawSize: 4, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
0000000000000014 ebfe JMP 0x14
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: UNCOND_BR, CET tracked: no
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: yes, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Offset, Size: 2, RawSize: 1, Encoding: D
Operand: 1, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
0000000000000016 ffe0 JMP ax
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: UNCOND_BR, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: yes, BHINT: no, DNT: yes
Operand: 0, Acc: R-, Type: Register, Size: 2, RawSize: 2, Encoding: M, RegType: General Purpose, RegSize: 2, RegId: 0, RegCount: 1
Operand: 1, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
0000000000000018 66ffe0 JMP eax
DSIZE: 32, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: UNCOND_BR, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: yes, BHINT: no, DNT: yes
Operand: 0, Acc: R-, Type: Register, Size: 4, RawSize: 4, Encoding: M, RegType: General Purpose, RegSize: 4, RegId: 0, RegCount: 1
Operand: 1, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
000000000000001B ff27 JMP word ptr [bx]
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: UNCOND_BR, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: yes, BHINT: no, DNT: yes
Operand: 0, Acc: R-, Type: Memory, Size: 2, RawSize: 2, Encoding: M,
Segment: 3, Base: 3,
Operand: 1, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
000000000000001D 67ff23 JMP word ptr [ebx]
DSIZE: 16, ASIZE: 32, VLEN: -
ISA Set: I86, Ins cat: UNCOND_BR, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: yes, BHINT: no, DNT: yes
Operand: 0, Acc: R-, Type: Memory, Size: 2, RawSize: 2, Encoding: M,
Segment: 3, Base: 3,
Operand: 1, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
0000000000000020 67ff23 JMP word ptr [ebx]
DSIZE: 16, ASIZE: 32, VLEN: -
ISA Set: I86, Ins cat: UNCOND_BR, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: yes, BHINT: no, DNT: yes
Operand: 0, Acc: R-, Type: Memory, Size: 2, RawSize: 2, Encoding: M,
Segment: 3, Base: 3,
Operand: 1, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
0000000000000023 6667ff23 JMP dword ptr [ebx]
DSIZE: 32, ASIZE: 32, VLEN: -
ISA Set: I86, Ins cat: UNCOND_BR, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: yes, BHINT: no, DNT: yes
Operand: 0, Acc: R-, Type: Memory, Size: 4, RawSize: 4, Encoding: M,
Segment: 3, Base: 3,
Operand: 1, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
0000000000000027 9a00102000 CALLF 0x0020:0x1000
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: CALL, CET tracked: no
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: no
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Address, Size: 4, RawSize: 4, Encoding: D
Operand: 1, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Segment, RegSize: 2, RegId: 1, RegCount: 1
Operand: 2, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 3, Acc: -W, Type: Memory, Size: 4, RawSize: 4, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 4, Acc: -W, Type: Memory, Size: 4, RawSize: 4, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
000000000000002C 669a000000102000 CALLF 0x0020:0x10000000
DSIZE: 32, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: CALL, CET tracked: no
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: no
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Address, Size: 6, RawSize: 6, Encoding: D
Operand: 1, Acc: RW, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 1, RegCount: 1
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
Operand: 3, Acc: -W, Type: Memory, Size: 8, RawSize: 8, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 4, Acc: -W, Type: Memory, Size: 8, RawSize: 8, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
0000000000000034 ea00102000 JMPF 0x0020:0x1000
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: UNCOND_BR, CET tracked: no
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: no
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Address, Size: 4, RawSize: 4, Encoding: D
Operand: 1, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Segment, RegSize: 2, RegId: 1, RegCount: 1
Operand: 2, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
0000000000000039 669a000000102000 CALLF 0x0020:0x10000000
DSIZE: 32, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: CALL, CET tracked: no
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: no
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Address, Size: 6, RawSize: 6, Encoding: D
Operand: 1, Acc: RW, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 1, RegCount: 1
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
Operand: 3, Acc: -W, Type: Memory, Size: 8, RawSize: 8, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 4, Acc: -W, Type: Memory, Size: 8, RawSize: 8, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
0000000000000041 67ff1b CALLF dword ptr [ebx]
DSIZE: 16, ASIZE: 32, VLEN: -
ISA Set: I86, Ins cat: CALL, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Memory, Size: 4, RawSize: 4, Encoding: M,
Segment: 3, Base: 3,
Operand: 1, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Segment, RegSize: 2, RegId: 1, RegCount: 1
Operand: 2, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 3, Acc: -W, Type: Memory, Size: 4, RawSize: 4, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 4, Acc: -W, Type: Memory, Size: 4, RawSize: 4, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
0000000000000044 ff1f CALLF dword ptr [bx]
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: CALL, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Memory, Size: 4, RawSize: 4, Encoding: M,
Segment: 3, Base: 3,
Operand: 1, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Segment, RegSize: 2, RegId: 1, RegCount: 1
Operand: 2, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 3, Acc: -W, Type: Memory, Size: 4, RawSize: 4, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 4, Acc: -W, Type: Memory, Size: 4, RawSize: 4, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
0000000000000046 6667ff1b CALLF fword ptr [ebx]
DSIZE: 32, ASIZE: 32, VLEN: -
ISA Set: I86, Ins cat: CALL, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Memory, Size: 6, RawSize: 6, Encoding: M,
Segment: 3, Base: 3,
Operand: 1, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 1, RegCount: 1
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
Operand: 3, Acc: -W, Type: Memory, Size: 8, RawSize: 8, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 4, Acc: -W, Type: Memory, Size: 8, RawSize: 8, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
000000000000004A 66ff1f CALLF fword ptr [bx]
DSIZE: 32, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: CALL, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Memory, Size: 6, RawSize: 6, Encoding: M,
Segment: 3, Base: 3,
Operand: 1, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 1, RegCount: 1
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
Operand: 3, Acc: -W, Type: Memory, Size: 8, RawSize: 8, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 4, Acc: -W, Type: Memory, Size: 8, RawSize: 8, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
000000000000004D 67ff2b JMPF dword ptr [ebx]
DSIZE: 16, ASIZE: 32, VLEN: -
ISA Set: I86, Ins cat: UNCOND_BR, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Memory, Size: 4, RawSize: 4, Encoding: M,
Segment: 3, Base: 3,
Operand: 1, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Segment, RegSize: 2, RegId: 1, RegCount: 1
Operand: 2, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
0000000000000050 ff2f JMPF dword ptr [bx]
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: UNCOND_BR, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Memory, Size: 4, RawSize: 4, Encoding: M,
Segment: 3, Base: 3,
Operand: 1, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Segment, RegSize: 2, RegId: 1, RegCount: 1
Operand: 2, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
0000000000000052 6667ff2b JMPF fword ptr [ebx]
DSIZE: 32, ASIZE: 32, VLEN: -
ISA Set: I86, Ins cat: UNCOND_BR, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Memory, Size: 6, RawSize: 6, Encoding: M,
Segment: 3, Base: 3,
Operand: 1, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 1, RegCount: 1
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
0000000000000056 66ff2f JMPF fword ptr [bx]
DSIZE: 32, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: UNCOND_BR, CET tracked: yes
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Memory, Size: 6, RawSize: 6, Encoding: M,
Segment: 3, Base: 3,
Operand: 1, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 1, RegCount: 1
Operand: 2, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
0000000000000059 72fe JC 0x59
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: COND_BR, CET tracked: no
FLAGS access
CF: t,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: yes, BHINT: yes, DNT: no
Operand: 0, Acc: R-, Type: Offset, Size: 2, RawSize: 1, Encoding: D
Operand: 1, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Flags, RegSize: 2, RegId: 0, RegCount: 1
000000000000005B 73fe JNC 0x5b
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: COND_BR, CET tracked: no
FLAGS access
CF: t,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: yes, BHINT: yes, DNT: no
Operand: 0, Acc: R-, Type: Offset, Size: 2, RawSize: 1, Encoding: D
Operand: 1, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Flags, RegSize: 2, RegId: 0, RegCount: 1
000000000000005D e2fe LOOP 0x5d
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: COND_BR, CET tracked: no
FLAGS access
Entire register
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Offset, Size: 2, RawSize: 1, Encoding: D
Operand: 1, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: General Purpose, RegSize: 2, RegId: 1, RegCount: 1
Operand: 2, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 3, Acc: R-, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Flags, RegSize: 2, RegId: 0, RegCount: 1
000000000000005F e0fe LOOPNZ 0x5f
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: COND_BR, CET tracked: no
FLAGS access
ZF: t,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Offset, Size: 2, RawSize: 1, Encoding: D
Operand: 1, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: General Purpose, RegSize: 2, RegId: 1, RegCount: 1
Operand: 2, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 3, Acc: R-, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Flags, RegSize: 2, RegId: 0, RegCount: 1
0000000000000061 e3fe JCXZ 0x61
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: COND_BR, CET tracked: no
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Offset, Size: 2, RawSize: 1, Encoding: D
Operand: 1, Acc: R-, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: General Purpose, RegSize: 2, RegId: 1, RegCount: 1
Operand: 2, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
0000000000000063 67e3fd JECXZ 0x63
DSIZE: 16, ASIZE: 32, VLEN: -
ISA Set: I86, Ins cat: COND_BR, CET tracked: no
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Offset, Size: 2, RawSize: 1, Encoding: D
Operand: 1, Acc: R-, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: General Purpose, RegSize: 4, RegId: 1, RegCount: 1
Operand: 2, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
0000000000000066 cd21 INT 0x21
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: INTERRUPT, CET tracked: no
FLAGS access
TF: m, IF: m, NT: m, RF: m, VM: tm, AC: m,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Immediate, Size: 1, RawSize: 1, Encoding: I
Operand: 1, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Segment, RegSize: 2, RegId: 1, RegCount: 1
Operand: 2, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 3, Acc: RW, Type: Memory, Size: 6, RawSize: 6, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Operand: 4, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Flags, RegSize: 2, RegId: 0, RegCount: 1
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 5, Acc: -W, Type: Memory, Size: 6, RawSize: 6, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
0000000000000068 cc INT3
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: INTERRUPT, CET tracked: no
FLAGS access
TF: m, IF: m, NT: m, RF: m, VM: tm, AC: m,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Segment, RegSize: 2, RegId: 1, RegCount: 1
Operand: 1, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 2, Acc: RW, Type: Memory, Size: 6, RawSize: 6, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Operand: 3, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Flags, RegSize: 2, RegId: 0, RegCount: 1
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 4, Acc: -W, Type: Memory, Size: 6, RawSize: 6, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
0000000000000069 f1 INT1
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: INTERRUPT, CET tracked: no
FLAGS access
TF: m, IF: m, NT: m, RF: m, VM: tm, AC: m,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Segment, RegSize: 2, RegId: 1, RegCount: 1
Operand: 1, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 2, Acc: RW, Type: Memory, Size: 6, RawSize: 6, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Operand: 3, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Flags, RegSize: 2, RegId: 0, RegCount: 1
000000000000006A f1 INT1
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: INTERRUPT, CET tracked: no
FLAGS access
TF: m, IF: m, NT: m, RF: m, VM: tm, AC: m,
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: no, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Segment, RegSize: 2, RegId: 1, RegCount: 1
Operand: 1, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 2, Acc: RW, Type: Memory, Size: 6, RawSize: 6, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Operand: 3, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Flags, RegSize: 2, RegId: 0, RegCount: 1
000000000000006B c3 RETN
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: RET, CET tracked: no
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: yes, BHINT: no, DNT: no
Operand: 0, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 1, Acc: R-, Type: Memory, Size: 2, RawSize: 2, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 2, Acc: R-, Type: Memory, Size: 2, RawSize: 2, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
000000000000006C c22000 RETN 0x0020
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: RET, CET tracked: no
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: yes, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Immediate, Size: 2, RawSize: 2, Encoding: I
Operand: 1, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 2, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: General Purpose, RegSize: 2, RegId: 4, RegCount: 1
Operand: 3, Acc: R-, Type: Memory, Size: 2, RawSize: 2, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 4, Acc: R-, Type: Memory, Size: 2, RawSize: 2, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
000000000000006F cb RETF
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: RET, CET tracked: no
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Segment, RegSize: 2, RegId: 1, RegCount: 1
Operand: 1, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Memory, Size: 4, RawSize: 4, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 3, Acc: R-, Type: Memory, Size: 4, RawSize: 4, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
0000000000000070 ca2000 RETF 0x0020
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: RET, CET tracked: no
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: R-, Type: Immediate, Size: 2, RawSize: 2, Encoding: I
Operand: 1, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Segment, RegSize: 2, RegId: 1, RegCount: 1
Operand: 2, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 3, Acc: R-, Type: Memory, Size: 4, RawSize: 4, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 4, Acc: R-, Type: Memory, Size: 4, RawSize: 4, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
0000000000000073 cf IRETW
DSIZE: 16, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: RET, CET tracked: no
FLAGS access
Entire register
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Segment, RegSize: 2, RegId: 1, RegCount: 1
Operand: 1, Acc: -W, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: IP, RegSize: 2, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Memory, Size: 6, RawSize: 6, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Operand: 3, Acc: RW, Type: Register, Size: 2, RawSize: 2, Encoding: S, RegType: Flags, RegSize: 2, RegId: 0, RegCount: 1
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 4, Acc: RW, Type: Memory, Size: 6, RawSize: 6, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
0000000000000074 66cf IRETD
DSIZE: 32, ASIZE: 16, VLEN: -
ISA Set: I86, Ins cat: RET, CET tracked: no
FLAGS access
Entire register
Valid modes
R0: yes, R1: yes, R2: yes, R3: yes
Real: yes, V8086: yes, Prot: yes, Compat: yes, Long: yes
SMM: yes, SGX: yes, TSX: yes, VMXRoot: yes, VMXNonRoot: yes
Valid prefixes
REP: no, REPcc: no, LOCK: no
HLE: no, XACQUIRE only: no, XRELEASE only: no
BND: no, BHINT: no, DNT: no
Operand: 0, Acc: RW, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Segment, RegSize: 4, RegId: 1, RegCount: 1
Operand: 1, Acc: -W, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: IP, RegSize: 4, RegId: 0, RegCount: 1
Operand: 2, Acc: R-, Type: Memory, Size: 12, RawSize: 12, Encoding: S, Stack: yes,
Segment: 2, Base: 4,
Operand: 3, Acc: RW, Type: Register, Size: 4, RawSize: 4, Encoding: S, RegType: Flags, RegSize: 4, RegId: 0, RegCount: 1
Added the Shadow Stack Pointer operand to the SYSCALL and SYSEXIT instructions. Moved the CET test cases in dedicated folders. Improved shadow-stack operand reporting - a distinction can be made between push/pop shadow stack accesses, and other shadow stack accesses. A new field is now present in the memory information - the shadow stack access type, which indicates: explicit access, implicit via SSP, implicit push/pop via SSP or implicit via IA32_PL0_SSP.
2020-07-21 19:29:59 +00:00
Operand: 4, Acc: RW, Type: Memory, Size: 12, RawSize: 12, Encoding: S, Shadow stack: 3,
Initial commit.
2020-07-21 08:19:18 +00:00
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