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267 lines
8.5 KiB
267 lines
8.5 KiB
From 2fb8b53110fdf163eae9e8a506bf769449e2ee4b Mon Sep 17 00:00:00 2001
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From: Joanna Rutkowska <joanna@invisiblethingslab.com>
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Date: Tue, 29 Jun 2010 08:34:37 +0200
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Subject: [PATCH 3/4] drm/i915: Add the support of eDP on DP-D for Ibex/CPT
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On some machines the eDP is connected on the PCH DP-D instead of DP-A.
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Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
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Conflicts:
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drivers/gpu/drm/i915/intel_dp.c
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---
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drivers/gpu/drm/i915/intel_display.c | 2 +-
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drivers/gpu/drm/i915/intel_dp.c | 99 ++++++++++++++++++++++++++++++---
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drivers/gpu/drm/i915/intel_drv.h | 1 +
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3 files changed, 92 insertions(+), 10 deletions(-)
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diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
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index f1a37d9..32ae849 100644
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--- a/drivers/gpu/drm/i915/intel_display.c
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+++ b/drivers/gpu/drm/i915/intel_display.c
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@@ -3073,7 +3073,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
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temp |= PIPE_8BPC;
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else
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temp |= PIPE_6BPC;
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- } else if (is_edp) {
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+ } else if (is_edp || intel_edp_is_pch(crtc)) {
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switch (dev_priv->edp_bpp/3) {
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case 8:
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temp |= PIPE_8BPC;
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diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
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index 77e40cf..c13c3bf 100644
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--- a/drivers/gpu/drm/i915/intel_dp.c
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+++ b/drivers/gpu/drm/i915/intel_dp.c
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@@ -43,6 +43,7 @@
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#define DP_LINK_CONFIGURATION_SIZE 9
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#define IS_eDP(i) ((i)->type == INTEL_OUTPUT_EDP)
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+#define IS_PCH_eDP(dp_priv) ((dp_priv)->is_edpd)
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struct intel_dp_priv {
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uint32_t output_reg;
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@@ -58,6 +59,7 @@ struct intel_dp_priv {
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struct intel_encoder *intel_encoder;
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struct i2c_adapter adapter;
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struct i2c_algo_dp_aux_data algo;
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+ bool is_edpd;
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};
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static void
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@@ -130,8 +132,9 @@ intel_dp_link_required(struct drm_device *dev,
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struct intel_encoder *intel_encoder, int pixel_clock)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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+ struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
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- if (IS_eDP(intel_encoder))
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+ if (IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv))
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return (pixel_clock * dev_priv->edp_bpp) / 8;
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else
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return pixel_clock * 3;
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@@ -534,14 +537,14 @@ intel_reduce_ratio(uint32_t *num, uint32_t *den)
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}
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static void
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-intel_dp_compute_m_n(int bytes_per_pixel,
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+intel_dp_compute_m_n(int bpp,
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int nlanes,
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int pixel_clock,
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int link_clock,
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struct intel_dp_m_n *m_n)
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{
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m_n->tu = 64;
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- m_n->gmch_m = pixel_clock * bytes_per_pixel;
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+ m_n->gmch_m = (pixel_clock * bpp) >> 3;
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m_n->gmch_n = link_clock * nlanes;
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intel_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n);
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m_n->link_m = pixel_clock;
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@@ -549,6 +552,31 @@ intel_dp_compute_m_n(int bytes_per_pixel,
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intel_reduce_ratio(&m_n->link_m, &m_n->link_n);
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}
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+bool intel_edp_is_pch(struct drm_crtc *crtc)
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+{
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+ struct drm_device *dev = crtc->dev;
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+ struct drm_mode_config *mode_config = &dev->mode_config;
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+ struct drm_encoder *encoder;
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+ bool ret = false;
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+
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+ list_for_each_entry(encoder, &mode_config->encoder_list, head) {
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+ struct intel_encoder *intel_encoder;
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+ struct intel_dp_priv *dp_priv;
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+
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+ if (!encoder || encoder->crtc != crtc)
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+ continue;
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+
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+ intel_encoder = enc_to_intel_encoder(encoder);
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+ dp_priv = intel_encoder->dev_priv;
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+
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+ if (intel_encoder->type == INTEL_OUTPUT_DISPLAYPORT) {
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+ ret = IS_PCH_eDP(dp_priv);
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+ break;
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+ }
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+ }
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+ return ret;
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+}
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+
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void
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intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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@@ -558,7 +586,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
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struct drm_connector *connector;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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- int lane_count = 4;
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+ int lane_count = 4, bpp = 24;
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struct intel_dp_m_n m_n;
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/*
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@@ -573,6 +601,8 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
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if (intel_encoder->type == INTEL_OUTPUT_DISPLAYPORT) {
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lane_count = dp_priv->lane_count;
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+ if (IS_PCH_eDP(dp_priv))
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+ bpp = dev_priv->edp_bpp;
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break;
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}
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}
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@@ -582,7 +612,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
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* the number of bytes_per_pixel post-LUT, which we always
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* set up for 8-bits of R/G/B, or 3 bytes total.
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*/
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- intel_dp_compute_m_n(3, lane_count,
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+ intel_dp_compute_m_n(bpp, lane_count,
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mode->clock, adjusted_mode->clock, &m_n);
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if (HAS_PCH_SPLIT(dev)) {
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@@ -711,13 +741,13 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode)
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if (mode != DRM_MODE_DPMS_ON) {
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if (dp_reg & DP_PORT_EN) {
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intel_dp_link_down(intel_encoder, dp_priv->DP);
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- if (IS_eDP(intel_encoder))
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+ if (IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv))
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ironlake_edp_backlight_off(dev);
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}
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} else {
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if (!(dp_reg & DP_PORT_EN)) {
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intel_dp_link_train(intel_encoder, dp_priv->DP, dp_priv->link_configuration);
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- if (IS_eDP(intel_encoder))
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+ if (IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv))
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ironlake_edp_backlight_on(dev);
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}
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}
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@@ -1225,6 +1255,7 @@ static int intel_dp_get_modes(struct drm_connector *connector)
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struct intel_encoder *intel_encoder = to_intel_encoder(connector);
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struct drm_device *dev = intel_encoder->base.dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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+ struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
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int ret;
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/* We should parse the EDID data and find out if it has an audio sink
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@@ -1235,7 +1266,7 @@ static int intel_dp_get_modes(struct drm_connector *connector)
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return ret;
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/* if eDP has no EDID, try to use fixed panel mode from VBT */
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- if (IS_eDP(intel_encoder)) {
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+ if (IS_eDP(intel_encoder) || IS_PCH_eDP(dp_priv)) {
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if (dev_priv->panel_fixed_mode != NULL) {
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struct drm_display_mode *mode;
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mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
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@@ -1299,6 +1330,50 @@ intel_dp_hot_plug(struct intel_encoder *intel_encoder)
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intel_dp_check_link_status(intel_encoder);
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}
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+/* Return which DP Port should be selected for Transcoder DP control */
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+int
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+intel_trans_dp_port_sel (struct drm_crtc *crtc)
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+{
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+ struct drm_device *dev = crtc->dev;
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+ struct drm_mode_config *mode_config = &dev->mode_config;
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+ struct drm_encoder *encoder;
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+ struct intel_encoder *intel_encoder = NULL;
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+
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+ list_for_each_entry(encoder, &mode_config->encoder_list, head) {
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+ if (encoder->crtc != crtc)
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+ continue;
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+
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+ intel_encoder = enc_to_intel_encoder(encoder);
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+ if (intel_encoder->type == INTEL_OUTPUT_DISPLAYPORT) {
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+ struct intel_dp_priv *dp_priv = intel_encoder->dev_priv;
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+ return dp_priv->output_reg;
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+ }
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+ }
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+ return -1;
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+}
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+
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+static bool intel_dpd_is_edp(struct drm_device *dev)
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+{
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+ struct drm_i915_private *dev_priv = dev->dev_private;
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+ struct child_device_config *p_child;
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+ int i, ret = false;
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+
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+ if (!dev_priv->child_dev_num)
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+ return false;
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+
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+ for (i = 0; i < dev_priv->child_dev_num; i++) {
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+ p_child = dev_priv->child_dev + i;
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+ if (p_child->device_type != DEVICE_TYPE_eDP)
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+ continue;
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+
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+ if (p_child->dvo_port == PORT_IDPD) {
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+ ret = true;
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+ break;
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+ }
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+ }
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+ return ret;
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+}
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+
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void
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intel_dp_init(struct drm_device *dev, int output_reg)
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{
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@@ -1320,6 +1395,7 @@ intel_dp_init(struct drm_device *dev, int output_reg)
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DRM_MODE_CONNECTOR_DisplayPort);
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drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
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+ dp_priv->is_edpd = false;
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if (output_reg == DP_A)
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intel_encoder->type = INTEL_OUTPUT_EDP;
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else
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@@ -1335,6 +1411,11 @@ intel_dp_init(struct drm_device *dev, int output_reg)
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if (IS_eDP(intel_encoder))
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intel_encoder->clone_mask = (1 << INTEL_EDP_CLONE_BIT);
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+ if (HAS_PCH_SPLIT(dev) && (output_reg == PCH_DP_D)) {
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+ if (intel_dpd_is_edp(dev))
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+ dp_priv->is_edpd = true;
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+ }
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+
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intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
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connector->interlace_allowed = true;
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connector->doublescan_allowed = 0;
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@@ -1383,7 +1464,7 @@ intel_dp_init(struct drm_device *dev, int output_reg)
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intel_encoder->ddc_bus = &dp_priv->adapter;
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intel_encoder->hot_plug = intel_dp_hot_plug;
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- if (output_reg == DP_A) {
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+ if ((output_reg == DP_A) || IS_PCH_eDP(dp_priv)) {
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/* initialize panel mode from VBT if available for eDP */
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if (dev_priv->lfp_lvds_vbt_mode) {
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dev_priv->panel_fixed_mode =
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diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
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index e302537..0858a17 100644
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--- a/drivers/gpu/drm/i915/intel_drv.h
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+++ b/drivers/gpu/drm/i915/intel_drv.h
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@@ -175,6 +175,7 @@ extern void intel_dp_init(struct drm_device *dev, int dp_reg);
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void
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intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode);
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+extern bool intel_edp_is_pch(struct drm_crtc *crtc);
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extern void intel_edp_link_config (struct intel_encoder *, int *, int *);
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--
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1.7.0.1
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