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36 lines
1.1 KiB
36 lines
1.1 KiB
From 9e4eb0947431c5a6b55f442aee3eb505e5a334d5 Mon Sep 17 00:00:00 2001
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From: Jesse Barnes <jbarnes@virtuousgeek.org>
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Date: Tue, 4 Jan 2011 15:09:29 -0800
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Subject: [PATCH 2/3] drm/i915: don't enable plane, pipe and PLL prematurely
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On Ironlake+ we need to enable these in a specific order.
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Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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---
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drivers/gpu/drm/i915/intel_display.c | 8 +++++---
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1 files changed, 5 insertions(+), 3 deletions(-)
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diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
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index 49fb54f..711beca 100644
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--- a/drivers/gpu/drm/i915/intel_display.c
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+++ b/drivers/gpu/drm/i915/intel_display.c
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@@ -4322,9 +4322,11 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
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pipeconf &= ~PIPECONF_DOUBLE_WIDE;
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}
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- dspcntr |= DISPLAY_PLANE_ENABLE;
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- pipeconf |= PIPECONF_ENABLE;
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- dpll |= DPLL_VCO_ENABLE;
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+ if (!HAS_PCH_SPLIT(dev)) {
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+ dspcntr |= DISPLAY_PLANE_ENABLE;
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+ pipeconf |= PIPECONF_ENABLE;
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+ dpll |= DPLL_VCO_ENABLE;
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+ }
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DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe == 0 ? 'A' : 'B');
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drm_mode_debug_printmodeline(mode);
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--
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1.7.6.5
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