From: agraf@suse.de Subject: Implement some missing intercepts so osx doesn't blow up Patch-mainline: unknown References: bnc#556564 --- arch/x86/kvm/svm.c | 20 ++++++++++++++++++-- arch/x86/kvm/x86.c | 4 +++- 2 files changed, 21 insertions(+), 3 deletions(-) --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c @@ -1995,6 +1995,22 @@ static int skinit_interception(struct vc return 1; } +static int monitor_interception(struct vcpu_svm *svm) +{ + svm->next_rip = kvm_rip_read(&svm->vcpu) + 3; + skip_emulated_instruction(&svm->vcpu); + + return 1; +} + +static int mwait_interception(struct vcpu_svm *svm) +{ + svm->next_rip = kvm_rip_read(&svm->vcpu) + 3; + skip_emulated_instruction(&svm->vcpu); + + return kvm_emulate_halt(&svm->vcpu); +} + static int invalid_op_interception(struct vcpu_svm *svm) { kvm_queue_exception(&svm->vcpu, UD_VECTOR); @@ -2376,8 +2392,8 @@ static int (*svm_exit_handlers[])(struct [SVM_EXIT_CLGI] = clgi_interception, [SVM_EXIT_SKINIT] = skinit_interception, [SVM_EXIT_WBINVD] = emulate_on_interception, - [SVM_EXIT_MONITOR] = invalid_op_interception, - [SVM_EXIT_MWAIT] = invalid_op_interception, + [SVM_EXIT_MONITOR] = monitor_interception, + [SVM_EXIT_MWAIT] = mwait_interception, [SVM_EXIT_NPF] = pf_interception, }; --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -1144,6 +1144,7 @@ int kvm_set_msr_common(struct kvm_vcpu * case MSR_VM_HSAVE_PA: case MSR_AMD64_PATCH_LOADER: break; + case 0xe2: case 0x200 ... 0x2ff: return set_msr_mtrr(vcpu, msr, data); case MSR_IA32_APICBASE: @@ -1400,6 +1401,7 @@ int kvm_get_msr_common(struct kvm_vcpu * case MSR_K8_INT_PENDING_MSG: case MSR_AMD64_NB_CFG: case MSR_FAM10H_MMIO_CONF_BASE: + case 0xe2: data = 0; break; case MSR_MTRRcap: @@ -1848,7 +1850,7 @@ static void do_cpuid_ent(struct kvm_cpui 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW); /* cpuid 1.ecx */ const u32 kvm_supported_word4_x86_features = - F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ | + F(XMM3) | bit((4*32+ 3)) /* MONITOR */ | 0 /* Reserved, DTES64 */ | 0 /* DS-CPL, VMX, SMX, EST */ | 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ | 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |