Details here: http://groups.google.com/group/qubes-devel/t/33256d29a29fa883devel-3.7
Marek Marczykowski
12 years ago
parent
b5606021c9
commit
394e2aaef1
@ -0,0 +1,72 @@
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From 433928d3823f561919ead305194e46e5311b573d Mon Sep 17 00:00:00 2001
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From: Marek Marczykowski <marmarek@invisiblethingslab.com>
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Date: Sat, 23 Jun 2012 19:50:44 +0200
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Subject: [PATCH 1/2] Revert "xen/pat: Disable PAT support for now."
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Organization: Invisible Things Lab
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This reverts commit 8eaffa67b43e99ae581622c5133e20b0f48bcef1.
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We haven't observed failure which is workarounded by this patch, but it caused
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horrible GPU performance. Anyway there is "nopat" option.
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Signed-off-by: Marek Marczykowski <marmarek@invisiblethingslab.com>
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---
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arch/x86/xen/enlighten.c | 2 --
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arch/x86/xen/mmu.c | 8 ++++----
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2 files changed, 4 insertions(+), 6 deletions(-)
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diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
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index 6c7f1e8..bf3319c 100644
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--- a/arch/x86/xen/enlighten.c
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+++ b/arch/x86/xen/enlighten.c
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@@ -1269,9 +1269,7 @@ asmlinkage void __init xen_start_kernel(void)
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/* Prevent unwanted bits from being set in PTEs. */
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__supported_pte_mask &= ~_PAGE_GLOBAL;
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-#if 0
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if (!xen_initial_domain())
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-#endif
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__supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
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__supported_pte_mask |= _PAGE_IOMAP;
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diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
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index 69f5857..a5d252a 100644
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--- a/arch/x86/xen/mmu.c
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+++ b/arch/x86/xen/mmu.c
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@@ -420,13 +420,13 @@ static pteval_t iomap_pte(pteval_t val)
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static pteval_t xen_pte_val(pte_t pte)
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{
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pteval_t pteval = pte.pte;
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-#if 0
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+
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/* If this is a WC pte, convert back from Xen WC to Linux WC */
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if ((pteval & (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)) == _PAGE_PAT) {
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WARN_ON(!pat_enabled);
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pteval = (pteval & ~_PAGE_PAT) | _PAGE_PWT;
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}
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-#endif
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+
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if (xen_initial_domain() && (pteval & _PAGE_IOMAP))
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return pteval;
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@@ -468,7 +468,7 @@ void xen_set_pat(u64 pat)
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static pte_t xen_make_pte(pteval_t pte)
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{
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phys_addr_t addr = (pte & PTE_PFN_MASK);
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-#if 0
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+
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/* If Linux is trying to set a WC pte, then map to the Xen WC.
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* If _PAGE_PAT is set, then it probably means it is really
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* _PAGE_PSE, so avoid fiddling with the PAT mapping and hope
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@@ -481,7 +481,7 @@ static pte_t xen_make_pte(pteval_t pte)
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if ((pte & (_PAGE_PCD | _PAGE_PWT)) == _PAGE_PWT)
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pte = (pte & ~(_PAGE_PCD | _PAGE_PWT)) | _PAGE_PAT;
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}
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-#endif
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+
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/*
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* Unprivileged domains are allowed to do IOMAPpings for
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* PCI passthrough, but not map ISA space. The ISA
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--
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1.7.4.4
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@ -0,0 +1,196 @@
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From f37a97dead89d07bce4d8fedc4c295c9bc700ab5 Mon Sep 17 00:00:00 2001
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From: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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Date: Fri, 4 Nov 2011 11:59:34 -0400
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Subject: [PATCH 2/2] x86/cpa: Use pte_attrs instead of pte_flags on
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CPA/set_p.._wb/wc operations.
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When using the paravirt interface, most of the page operations are wrapped
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in the pvops interface. The one that is not is the pte_flags. The reason
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being that for most cases, the "raw" PTE flag values for baremetal and whatever
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pvops platform is running (in this case) - share the same bit meaning.
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Except for PAT. Under Linux, the PAT MSR is written to be:
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PAT4 PAT0
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+---+----+----+----+-----+----+----+
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WC | WC | WB | UC | UC- | WC | WB | <= Linux
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+---+----+----+----+-----+----+----+
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WC | WT | WB | UC | UC- | WT | WB | <= BIOS
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+---+----+----+----+-----+----+----+
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WC | WP | WC | UC | UC- | WT | WB | <= Xen
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+---+----+----+----+-----+----+----+
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The lookup of this index table translates to looking up
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Bit 7, Bit 4, and Bit 3 of PTE:
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PAT/PSE (bit 7) ... PCD (bit 4) .. PWT (bit 3).
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If all bits are off, then we are using PAT0. If bit 3 turned on,
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then we are using PAT1, if bit 3 and bit 4, then PAT2..
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Back to the PAT MSR table:
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As you can see, the PAT1 translates to PAT4 under Xen. Under Linux
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we only use PAT0, PAT1, and PAT2 for the caching as:
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WB = none (so PAT0)
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WC = PWT (bit 3 on)
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UC = PWT | PCD (bit 3 and 4 are on).
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But to make it work with Xen, we end up doing for WC a translation:
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PWT (so bit 3 on) --> PAT (so bit 7 is on) and clear bit 3
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And to translate back (when the paravirt pte_val is used) we would:
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PAT (bit 7 on) --> PWT (bit 3 on) and clear bit 7.
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This works quite well, except if code uses the pte_flags, as pte_flags
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reads the raw value and does not go through the paravirt. Which means
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that if (when running under Xen):
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1) we allocate some pages.
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2) call set_pages_array_wc, which ends up calling:
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__page_change_att_set_clr(.., __pgprot(__PAGE_WC), /* set */
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, __pgprot(__PAGE_MASK), /* clear */
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which ends up reading the _raw_ PTE flags and _only_ look at the
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_PTE_FLAG_MASK contents with __PAGE_MASK cleared (0x18) and
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__PAGE_WC (0x8) set.
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read raw *pte -> 0x67
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*pte = 0x67 & ^0x18 | 0x8
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*pte = 0x67 & 0xfffffe7 | 0x8
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*pte = 0x6f
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[now set_pte_atomic is called, and 0x6f is written in, but under
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xen_make_pte, the bit 3 is translated to bit 7, so it ends up
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writting 0xa7, which is correct]
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3) do something to them.
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4) call set_pages_array_wb
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__page_change_att_set_clr(.., __pgprot(__PAGE_WB), /* set */
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, __pgprot(__PAGE_MASK), /* clear */
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which ends up reading the _raw_ PTE and _only_ look at the
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_PTE_FLAG_MASK contents with _PAGE_MASK cleared (0x18) and
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__PAGE_WB (0x0) set:
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read raw *pte -> 0xa7
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*pte = 0xa7 & &0x18 | 0
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*pte = 0xa7 & 0xfffffe7 | 0
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*pte = 0xa7
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[we check whether the old PTE is different from the new one
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if (pte_val(old_pte) != pte_val(new_pte)) {
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set_pte_atomic(kpte, new_pte);
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...
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and find out that 0xA7 == 0xA7 so we do not write the new PTE value in]
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End result is that we failed at removing the WC caching bit!
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5) free them.
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[and have pages with PAT4 (bit 7) set, so other subsystems end up using
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the pages that have the write combined bit set resulting in crashes. Yikes!].
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The fix, which this patch proposes, is to wrap the pte_pgprot in the CPA
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code with newly introduced pte_attrs which can go through the pvops interface
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to get the "emulated" value instead of the raw. Naturally if CONFIG_PARAVIRT is
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not set, it would end calling native_pte_val.
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The other way to fix this is by wrapping pte_flags and go through the pvops
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interface and it really is the Right Thing to do. The problem is, that past
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experience with mprotect stuff demonstrates that it be really expensive in inner
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loops, and pte_flags() is used in some very perf-critical areas.
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Example code to run this and see the various mysterious subsystems/applications
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crashing
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MODULE_AUTHOR("Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>");
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MODULE_DESCRIPTION("wb_to_wc_and_back");
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MODULE_LICENSE("GPL");
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MODULE_VERSION(WB_TO_WC);
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static int thread(void *arg)
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{
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struct page *a[MAX_PAGES];
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unsigned int i, j;
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do {
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for (j = 0, i = 0;i < MAX_PAGES; i++, j++) {
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a[i] = alloc_page(GFP_KERNEL);
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if (!a[i])
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break;
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}
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set_pages_array_wc(a, j);
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set_current_state(TASK_INTERRUPTIBLE);
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schedule_timeout_interruptible(HZ);
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for (i = 0; i < j; i++) {
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unsigned long *addr = page_address(a[i]);
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if (addr) {
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memset(addr, 0xc2, PAGE_SIZE);
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}
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}
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set_pages_array_wb(a, j);
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for (i = 0; i< MAX_PAGES; i++) {
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if (a[i])
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__free_page(a[i]);
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a[i] = NULL;
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}
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} while (!kthread_should_stop());
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return 0;
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}
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static struct task_struct *t;
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static int __init wb_to_wc_init(void)
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{
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t = kthread_run(thread, NULL, "wb_to_wc_and_back");
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return 0;
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}
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static void __exit wb_to_wc_exit(void)
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{
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if (t)
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kthread_stop(t);
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}
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module_init(wb_to_wc_init);
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module_exit(wb_to_wc_exit);
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This fixes RH BZ #742032, #787403, and #745574
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Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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Tested-by: Tom Goetz <tom.goetz@virtualcomputer.com>
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CC: stable@kernel.org
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---
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arch/x86/include/asm/pgtable.h | 5 +++++
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arch/x86/mm/pageattr.c | 2 +-
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2 files changed, 6 insertions(+), 1 deletions(-)
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diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
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index 49afb3f..fa7bd2c 100644
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--- a/arch/x86/include/asm/pgtable.h
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+++ b/arch/x86/include/asm/pgtable.h
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@@ -349,6 +349,11 @@ static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
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return __pgprot(preservebits | addbits);
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}
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+static inline pgprot_t pte_attrs(pte_t pte)
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+{
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+ return __pgprot(pte_val(pte) & PTE_FLAGS_MASK);
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+}
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+
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#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK)
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#define canon_pgprot(p) __pgprot(massage_pgprot(p))
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diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
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index e1ebde3..1ae1b4b 100644
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--- a/arch/x86/mm/pageattr.c
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+++ b/arch/x86/mm/pageattr.c
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@@ -651,7 +651,7 @@ repeat:
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if (level == PG_LEVEL_4K) {
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pte_t new_pte;
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- pgprot_t new_prot = pte_pgprot(old_pte);
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+ pgprot_t new_prot = pte_attrs(old_pte);
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unsigned long pfn = pte_pfn(old_pte);
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pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
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--
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1.7.4.4
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